I: pbuilder: network access will be disabled during build I: Current time: Fri May 24 23:29:12 -12 2024 I: pbuilder-time-stamp: 1716636552 I: Building the build Environment I: extracting base tarball [/var/cache/pbuilder/bookworm-reproducible-base.tgz] I: copying local configuration W: --override-config is not set; not updating apt.conf Read the manpage for details. I: mounting /proc filesystem I: mounting /sys filesystem I: creating /{dev,run}/shm I: mounting /dev/pts filesystem I: redirecting /dev/ptmx to /dev/pts/ptmx I: policy-rc.d already exists I: Copying source file I: copying [osmo-pcu_1.1.0-2.dsc] I: copying [./osmo-pcu_1.1.0.orig.tar.xz] I: copying [./osmo-pcu_1.1.0-2.debian.tar.xz] I: Extracting source gpgv: Signature made Tue Oct 11 10:23:00 2022 -12 gpgv: using RSA key 6201FBFFDBBDE07822EABB9696FCAC0D387B5847 gpgv: issuer "debian@alteholz.de" gpgv: Can't check signature: No public key dpkg-source: warning: cannot verify inline signature for ./osmo-pcu_1.1.0-2.dsc: no acceptable signature found dpkg-source: info: extracting osmo-pcu in osmo-pcu-1.1.0 dpkg-source: info: unpacking osmo-pcu_1.1.0.orig.tar.xz dpkg-source: info: unpacking osmo-pcu_1.1.0-2.debian.tar.xz dpkg-source: info: using patch list from debian/patches/series dpkg-source: info: applying Setting-library-version-explicitly.patch I: using fakeroot in build. I: Installing the build-deps I: user script /srv/workspace/pbuilder/3374487/tmp/hooks/D02_print_environment starting I: set BUILDDIR='/build' BUILDUSERGECOS='first user,first room,first work-phone,first home-phone,first other' BUILDUSERNAME='pbuilder1' BUILD_ARCH='amd64' DEBIAN_FRONTEND='noninteractive' DEB_BUILD_OPTIONS='buildinfo=+all reproducible=+all parallel=16' DISTRIBUTION='bookworm' HOME='/root' HOST_ARCH='amd64' IFS=' ' INVOCATION_ID='0a41c375bc4343a7acca61e63f756aaa' LANG='C' LANGUAGE='en_US:en' LC_ALL='C' MAIL='/var/mail/root' OPTIND='1' PATH='/usr/sbin:/usr/bin:/sbin:/bin:/usr/games' PBCURRENTCOMMANDLINEOPERATION='build' PBUILDER_OPERATION='build' PBUILDER_PKGDATADIR='/usr/share/pbuilder' PBUILDER_PKGLIBDIR='/usr/lib/pbuilder' PBUILDER_SYSCONFDIR='/etc' PPID='3374487' PS1='# ' PS2='> ' PS4='+ ' PWD='/' SHELL='/bin/bash' SHLVL='2' SUDO_COMMAND='/usr/bin/timeout -k 18.1h 18h /usr/bin/ionice -c 3 /usr/bin/nice /usr/sbin/pbuilder --build --configfile /srv/reproducible-results/rbuild-debian/r-b-build.CDWjVg4s/pbuilderrc_30u1 --distribution bookworm --hookdir /etc/pbuilder/first-build-hooks --debbuildopts -b --basetgz /var/cache/pbuilder/bookworm-reproducible-base.tgz --buildresult /srv/reproducible-results/rbuild-debian/r-b-build.CDWjVg4s/b1 --logfile b1/build.log osmo-pcu_1.1.0-2.dsc' SUDO_GID='110' SUDO_UID='105' SUDO_USER='jenkins' TERM='unknown' TZ='/usr/share/zoneinfo/Etc/GMT+12' USER='root' _='/usr/bin/systemd-run' http_proxy='http://85.184.249.68:3128' I: uname -a Linux ionos5-amd64 6.1.0-0.deb11.5-amd64 #1 SMP PREEMPT_DYNAMIC Debian 6.1.12-1~bpo11+1 (2023-03-05) x86_64 GNU/Linux I: ls -l /bin total 5632 -rwxr-xr-x 1 root root 1265648 Feb 12 2023 bash -rwxr-xr-x 3 root root 39224 Sep 18 2022 bunzip2 -rwxr-xr-x 3 root root 39224 Sep 18 2022 bzcat lrwxrwxrwx 1 root root 6 Sep 18 2022 bzcmp -> bzdiff -rwxr-xr-x 1 root root 2225 Sep 18 2022 bzdiff lrwxrwxrwx 1 root root 6 Sep 18 2022 bzegrep -> bzgrep -rwxr-xr-x 1 root root 4893 Nov 27 2021 bzexe lrwxrwxrwx 1 root root 6 Sep 18 2022 bzfgrep -> bzgrep -rwxr-xr-x 1 root root 3775 Sep 18 2022 bzgrep -rwxr-xr-x 3 root root 39224 Sep 18 2022 bzip2 -rwxr-xr-x 1 root root 14568 Sep 18 2022 bzip2recover lrwxrwxrwx 1 root root 6 Sep 18 2022 bzless -> bzmore -rwxr-xr-x 1 root root 1297 Sep 18 2022 bzmore -rwxr-xr-x 1 root root 44016 Sep 20 2022 cat -rwxr-xr-x 1 root root 68656 Sep 20 2022 chgrp -rwxr-xr-x 1 root root 64496 Sep 20 2022 chmod -rwxr-xr-x 1 root root 72752 Sep 20 2022 chown -rwxr-xr-x 1 root root 151152 Sep 20 2022 cp -rwxr-xr-x 1 root root 125640 Jan 5 2023 dash -rwxr-xr-x 1 root root 121904 Sep 20 2022 date -rwxr-xr-x 1 root root 89240 Sep 20 2022 dd -rwxr-xr-x 1 root root 102200 Sep 20 2022 df -rwxr-xr-x 1 root root 151344 Sep 20 2022 dir -rwxr-xr-x 1 root root 88656 Mar 22 2023 dmesg lrwxrwxrwx 1 root root 8 Dec 19 2022 dnsdomainname -> hostname lrwxrwxrwx 1 root root 8 Dec 19 2022 domainname -> hostname -rwxr-xr-x 1 root root 43856 Sep 20 2022 echo -rwxr-xr-x 1 root root 41 Jan 24 2023 egrep -rwxr-xr-x 1 root root 35664 Sep 20 2022 false -rwxr-xr-x 1 root root 41 Jan 24 2023 fgrep -rwxr-xr-x 1 root root 85600 Mar 22 2023 findmnt -rwsr-xr-x 1 root root 35128 Mar 22 2023 fusermount -rwxr-xr-x 1 root root 203152 Jan 24 2023 grep -rwxr-xr-x 2 root root 2346 Apr 9 2022 gunzip -rwxr-xr-x 1 root root 6447 Apr 9 2022 gzexe -rwxr-xr-x 1 root root 98136 Apr 9 2022 gzip -rwxr-xr-x 1 root root 22680 Dec 19 2022 hostname -rwxr-xr-x 1 root root 72824 Sep 20 2022 ln -rwxr-xr-x 1 root root 53024 Mar 23 2023 login -rwxr-xr-x 1 root root 151344 Sep 20 2022 ls -rwxr-xr-x 1 root root 207168 Mar 22 2023 lsblk -rwxr-xr-x 1 root root 97552 Sep 20 2022 mkdir -rwxr-xr-x 1 root root 72912 Sep 20 2022 mknod -rwxr-xr-x 1 root root 43952 Sep 20 2022 mktemp -rwxr-xr-x 1 root root 59712 Mar 22 2023 more -rwsr-xr-x 1 root root 59704 Mar 22 2023 mount -rwxr-xr-x 1 root root 18744 Mar 22 2023 mountpoint -rwxr-xr-x 1 root root 142968 Sep 20 2022 mv lrwxrwxrwx 1 root root 8 Dec 19 2022 nisdomainname -> hostname lrwxrwxrwx 1 root root 14 Apr 2 2023 pidof -> /sbin/killall5 -rwxr-xr-x 1 root root 43952 Sep 20 2022 pwd lrwxrwxrwx 1 root root 4 Feb 12 2023 rbash -> bash -rwxr-xr-x 1 root root 52112 Sep 20 2022 readlink -rwxr-xr-x 1 root root 72752 Sep 20 2022 rm -rwxr-xr-x 1 root root 56240 Sep 20 2022 rmdir -rwxr-xr-x 1 root root 27560 Nov 2 2022 run-parts -rwxr-xr-x 1 root root 126424 Jan 5 2023 sed lrwxrwxrwx 1 root root 4 Jan 5 2023 sh -> dash -rwxr-xr-x 1 root root 43888 Sep 20 2022 sleep -rwxr-xr-x 1 root root 85008 Sep 20 2022 stty -rwsr-xr-x 1 root root 72000 Mar 22 2023 su -rwxr-xr-x 1 root root 39824 Sep 20 2022 sync -rwxr-xr-x 1 root root 531984 Apr 6 2023 tar -rwxr-xr-x 1 root root 14520 Nov 2 2022 tempfile -rwxr-xr-x 1 root root 109616 Sep 20 2022 touch -rwxr-xr-x 1 root root 35664 Sep 20 2022 true -rwxr-xr-x 1 root root 14568 Mar 22 2023 ulockmgr_server -rwsr-xr-x 1 root root 35128 Mar 22 2023 umount -rwxr-xr-x 1 root root 43888 Sep 20 2022 uname -rwxr-xr-x 2 root root 2346 Apr 9 2022 uncompress -rwxr-xr-x 1 root root 151344 Sep 20 2022 vdir -rwxr-xr-x 1 root root 72024 Mar 22 2023 wdctl lrwxrwxrwx 1 root root 8 Dec 19 2022 ypdomainname -> hostname -rwxr-xr-x 1 root root 1984 Apr 9 2022 zcat -rwxr-xr-x 1 root root 1678 Apr 9 2022 zcmp -rwxr-xr-x 1 root root 6460 Apr 9 2022 zdiff -rwxr-xr-x 1 root root 29 Apr 9 2022 zegrep -rwxr-xr-x 1 root root 29 Apr 9 2022 zfgrep -rwxr-xr-x 1 root root 2081 Apr 9 2022 zforce -rwxr-xr-x 1 root root 8103 Apr 9 2022 zgrep -rwxr-xr-x 1 root root 2206 Apr 9 2022 zless -rwxr-xr-x 1 root root 1842 Apr 9 2022 zmore -rwxr-xr-x 1 root root 4577 Apr 9 2022 znew I: user script /srv/workspace/pbuilder/3374487/tmp/hooks/D02_print_environment finished -> Attempting to satisfy build-dependencies -> Creating pbuilder-satisfydepends-dummy package Package: pbuilder-satisfydepends-dummy Version: 0.invalid.0 Architecture: amd64 Maintainer: Debian Pbuilder Team Description: Dummy package to satisfy dependencies with aptitude - created by pbuilder This package was created automatically by pbuilder to satisfy the build-dependencies of the package being currently built. Depends: debhelper-compat (= 13), pkg-config, libosmocore-dev (>= 1.7.0) dpkg-deb: building package 'pbuilder-satisfydepends-dummy' in '/tmp/satisfydepends-aptitude/pbuilder-satisfydepends-dummy.deb'. Selecting previously unselected package pbuilder-satisfydepends-dummy. (Reading database ... 19596 files and directories currently installed.) Preparing to unpack .../pbuilder-satisfydepends-dummy.deb ... Unpacking pbuilder-satisfydepends-dummy (0.invalid.0) ... dpkg: pbuilder-satisfydepends-dummy: dependency problems, but configuring anyway as you requested: pbuilder-satisfydepends-dummy depends on debhelper-compat (= 13); however: Package debhelper-compat is not installed. pbuilder-satisfydepends-dummy depends on pkg-config; however: Package pkg-config is not installed. pbuilder-satisfydepends-dummy depends on libosmocore-dev (>= 1.7.0); however: Package libosmocore-dev is not installed. Setting up pbuilder-satisfydepends-dummy (0.invalid.0) ... Reading package lists... Building dependency tree... Reading state information... Initializing package states... Writing extended state information... Building tag database... pbuilder-satisfydepends-dummy is already installed at the requested version (0.invalid.0) pbuilder-satisfydepends-dummy is already installed at the requested version (0.invalid.0) The following NEW packages will be installed: autoconf{a} automake{a} autopoint{a} autotools-dev{a} bsdextrautils{a} debhelper{a} dh-autoreconf{a} dh-strip-nondeterminism{a} dwz{a} file{a} gettext{a} gettext-base{a} groff-base{a} intltool-debian{a} libarchive-zip-perl{a} libdebhelper-perl{a} libelf1{a} libfile-stripnondeterminism-perl{a} libicu72{a} libmagic-mgc{a} libmagic1{a} libmnl0{a} libosmocodec0{a} libosmocoding0{a} libosmocore-dev{a} libosmocore19{a} libosmoctrl0{a} libosmogb14{a} libosmogsm18{a} libosmosim2{a} libosmovty9{a} libpcsclite1{a} libpipeline1{a} libpkgconf3{a} libsctp-dev{a} libsctp1{a} libsub-override-perl{a} libtalloc-dev{a} libtalloc2{a} libtool{a} libuchardet0{a} libxml2{a} m4{a} man-db{a} pkg-config{a} pkgconf{a} pkgconf-bin{a} po-debconf{a} sensible-utils{a} The following packages are RECOMMENDED but will NOT be installed: curl libarchive-cpio-perl libltdl-dev libmail-sendmail-perl lynx wget 0 packages upgraded, 49 newly installed, 0 to remove and 0 not upgraded. Need to get 19.9 MB of archives. After unpacking 76.5 MB will be used. Writing extended state information... Get: 1 http://deb.debian.org/debian bookworm/main amd64 sensible-utils all 0.0.17+nmu1 [19.0 kB] Get: 2 http://deb.debian.org/debian bookworm/main amd64 libmagic-mgc amd64 1:5.44-3 [305 kB] Get: 3 http://deb.debian.org/debian bookworm/main amd64 libmagic1 amd64 1:5.44-3 [104 kB] Get: 4 http://deb.debian.org/debian bookworm/main amd64 file amd64 1:5.44-3 [42.5 kB] Get: 5 http://deb.debian.org/debian bookworm/main amd64 gettext-base amd64 0.21-12 [160 kB] Get: 6 http://deb.debian.org/debian bookworm/main amd64 libuchardet0 amd64 0.0.7-1 [67.8 kB] Get: 7 http://deb.debian.org/debian bookworm/main amd64 groff-base amd64 1.22.4-10 [916 kB] Get: 8 http://deb.debian.org/debian bookworm/main amd64 bsdextrautils amd64 2.38.1-5+b1 [86.6 kB] Get: 9 http://deb.debian.org/debian bookworm/main amd64 libpipeline1 amd64 1.5.7-1 [38.5 kB] Get: 10 http://deb.debian.org/debian bookworm/main amd64 man-db amd64 2.11.2-2 [1386 kB] Get: 11 http://deb.debian.org/debian bookworm/main amd64 m4 amd64 1.4.19-3 [287 kB] Get: 12 http://deb.debian.org/debian bookworm/main amd64 autoconf all 2.71-3 [332 kB] Get: 13 http://deb.debian.org/debian bookworm/main amd64 autotools-dev all 20220109.1 [51.6 kB] Get: 14 http://deb.debian.org/debian bookworm/main amd64 automake all 1:1.16.5-1.3 [823 kB] Get: 15 http://deb.debian.org/debian bookworm/main amd64 autopoint all 0.21-12 [495 kB] Get: 16 http://deb.debian.org/debian bookworm/main amd64 libdebhelper-perl all 13.11.4 [81.2 kB] Get: 17 http://deb.debian.org/debian bookworm/main amd64 libtool all 2.4.7-5 [517 kB] Get: 18 http://deb.debian.org/debian bookworm/main amd64 dh-autoreconf all 20 [17.1 kB] Get: 19 http://deb.debian.org/debian bookworm/main amd64 libarchive-zip-perl all 1.68-1 [104 kB] Get: 20 http://deb.debian.org/debian bookworm/main amd64 libsub-override-perl all 0.09-4 [9304 B] Get: 21 http://deb.debian.org/debian bookworm/main amd64 libfile-stripnondeterminism-perl all 1.13.1-1 [19.4 kB] Get: 22 http://deb.debian.org/debian bookworm/main amd64 dh-strip-nondeterminism all 1.13.1-1 [8620 B] Get: 23 http://deb.debian.org/debian bookworm/main amd64 libelf1 amd64 0.188-2.1 [174 kB] Get: 24 http://deb.debian.org/debian bookworm/main amd64 dwz amd64 0.15-1 [109 kB] Get: 25 http://deb.debian.org/debian bookworm/main amd64 libicu72 amd64 72.1-3 [9376 kB] Get: 26 http://deb.debian.org/debian bookworm/main amd64 libxml2 amd64 2.9.14+dfsg-1.1+b3 [687 kB] Get: 27 http://deb.debian.org/debian bookworm/main amd64 gettext amd64 0.21-12 [1300 kB] Get: 28 http://deb.debian.org/debian bookworm/main amd64 intltool-debian all 0.35.0+20060710.6 [22.9 kB] Get: 29 http://deb.debian.org/debian bookworm/main amd64 po-debconf all 1.0.21+nmu1 [248 kB] Get: 30 http://deb.debian.org/debian bookworm/main amd64 debhelper all 13.11.4 [942 kB] Get: 31 http://deb.debian.org/debian bookworm/main amd64 libmnl0 amd64 1.0.4-3 [12.5 kB] Get: 32 http://deb.debian.org/debian bookworm/main amd64 libsctp1 amd64 1.0.19+dfsg-2 [29.7 kB] Get: 33 http://deb.debian.org/debian bookworm/main amd64 libtalloc2 amd64 2.4.0-f2 [25.6 kB] Get: 34 http://deb.debian.org/debian bookworm/main amd64 libosmocore19 amd64 1.7.0-3 [114 kB] Get: 35 http://deb.debian.org/debian bookworm/main amd64 libosmocodec0 amd64 1.7.0-3 [21.9 kB] Get: 36 http://deb.debian.org/debian bookworm/main amd64 libosmogsm18 amd64 1.7.0-3 [203 kB] Get: 37 http://deb.debian.org/debian bookworm/main amd64 libosmocoding0 amd64 1.7.0-3 [40.9 kB] Get: 38 http://deb.debian.org/debian bookworm/main amd64 libosmovty9 amd64 1.7.0-3 [75.9 kB] Get: 39 http://deb.debian.org/debian bookworm/main amd64 libosmogb14 amd64 1.7.0-3 [150 kB] Get: 40 http://deb.debian.org/debian bookworm/main amd64 libosmoctrl0 amd64 1.7.0-3 [31.5 kB] Get: 41 http://deb.debian.org/debian bookworm/main amd64 libpcsclite1 amd64 1.9.9-2 [49.7 kB] Get: 42 http://deb.debian.org/debian bookworm/main amd64 libosmosim2 amd64 1.7.0-3 [36.0 kB] Get: 43 http://deb.debian.org/debian bookworm/main amd64 libpkgconf3 amd64 1.8.1-1 [36.1 kB] Get: 44 http://deb.debian.org/debian bookworm/main amd64 pkgconf-bin amd64 1.8.1-1 [29.5 kB] Get: 45 http://deb.debian.org/debian bookworm/main amd64 pkgconf amd64 1.8.1-1 [25.9 kB] Get: 46 http://deb.debian.org/debian bookworm/main amd64 pkg-config amd64 1.8.1-1 [13.7 kB] Get: 47 http://deb.debian.org/debian bookworm/main amd64 libtalloc-dev amd64 2.4.0-f2 [59.5 kB] Get: 48 http://deb.debian.org/debian bookworm/main amd64 libsctp-dev amd64 1.0.19+dfsg-2 [72.2 kB] Get: 49 http://deb.debian.org/debian bookworm/main amd64 libosmocore-dev amd64 1.7.0-3 [183 kB] Fetched 19.9 MB in 0s (84.1 MB/s) debconf: delaying package configuration, since apt-utils is not installed Selecting previously unselected package sensible-utils. (Reading database ... (Reading database ... 5% (Reading database ... 10% (Reading database ... 15% (Reading database ... 20% (Reading database ... 25% (Reading database ... 30% (Reading database ... 35% (Reading database ... 40% (Reading database ... 45% (Reading database ... 50% (Reading database ... 55% (Reading database ... 60% (Reading database ... 65% (Reading database ... 70% (Reading database ... 75% (Reading database ... 80% (Reading database ... 85% (Reading database ... 90% (Reading database ... 95% (Reading database ... 100% (Reading database ... 19596 files and directories currently installed.) Preparing to unpack .../00-sensible-utils_0.0.17+nmu1_all.deb ... Unpacking sensible-utils (0.0.17+nmu1) ... Selecting previously unselected package libmagic-mgc. Preparing to unpack .../01-libmagic-mgc_1%3a5.44-3_amd64.deb ... Unpacking libmagic-mgc (1:5.44-3) ... Selecting previously unselected package libmagic1:amd64. Preparing to unpack .../02-libmagic1_1%3a5.44-3_amd64.deb ... Unpacking libmagic1:amd64 (1:5.44-3) ... Selecting previously unselected package file. Preparing to unpack .../03-file_1%3a5.44-3_amd64.deb ... Unpacking file (1:5.44-3) ... Selecting previously unselected package gettext-base. Preparing to unpack .../04-gettext-base_0.21-12_amd64.deb ... Unpacking gettext-base (0.21-12) ... Selecting previously unselected package libuchardet0:amd64. Preparing to unpack .../05-libuchardet0_0.0.7-1_amd64.deb ... Unpacking libuchardet0:amd64 (0.0.7-1) ... Selecting previously unselected package groff-base. Preparing to unpack .../06-groff-base_1.22.4-10_amd64.deb ... Unpacking groff-base (1.22.4-10) ... Selecting previously unselected package bsdextrautils. Preparing to unpack .../07-bsdextrautils_2.38.1-5+b1_amd64.deb ... Unpacking bsdextrautils (2.38.1-5+b1) ... Selecting previously unselected package libpipeline1:amd64. Preparing to unpack .../08-libpipeline1_1.5.7-1_amd64.deb ... Unpacking libpipeline1:amd64 (1.5.7-1) ... Selecting previously unselected package man-db. Preparing to unpack .../09-man-db_2.11.2-2_amd64.deb ... Unpacking man-db (2.11.2-2) ... Selecting previously unselected package m4. Preparing to unpack .../10-m4_1.4.19-3_amd64.deb ... Unpacking m4 (1.4.19-3) ... Selecting previously unselected package autoconf. Preparing to unpack .../11-autoconf_2.71-3_all.deb ... Unpacking autoconf (2.71-3) ... Selecting previously unselected package autotools-dev. Preparing to unpack .../12-autotools-dev_20220109.1_all.deb ... Unpacking autotools-dev (20220109.1) ... Selecting previously unselected package automake. Preparing to unpack .../13-automake_1%3a1.16.5-1.3_all.deb ... Unpacking automake (1:1.16.5-1.3) ... Selecting previously unselected package autopoint. Preparing to unpack .../14-autopoint_0.21-12_all.deb ... Unpacking autopoint (0.21-12) ... Selecting previously unselected package libdebhelper-perl. Preparing to unpack .../15-libdebhelper-perl_13.11.4_all.deb ... Unpacking libdebhelper-perl (13.11.4) ... Selecting previously unselected package libtool. Preparing to unpack .../16-libtool_2.4.7-5_all.deb ... Unpacking libtool (2.4.7-5) ... Selecting previously unselected package dh-autoreconf. Preparing to unpack .../17-dh-autoreconf_20_all.deb ... Unpacking dh-autoreconf (20) ... Selecting previously unselected package libarchive-zip-perl. Preparing to unpack .../18-libarchive-zip-perl_1.68-1_all.deb ... Unpacking libarchive-zip-perl (1.68-1) ... Selecting previously unselected package libsub-override-perl. Preparing to unpack .../19-libsub-override-perl_0.09-4_all.deb ... Unpacking libsub-override-perl (0.09-4) ... Selecting previously unselected package libfile-stripnondeterminism-perl. Preparing to unpack .../20-libfile-stripnondeterminism-perl_1.13.1-1_all.deb ... Unpacking libfile-stripnondeterminism-perl (1.13.1-1) ... Selecting previously unselected package dh-strip-nondeterminism. Preparing to unpack .../21-dh-strip-nondeterminism_1.13.1-1_all.deb ... Unpacking dh-strip-nondeterminism (1.13.1-1) ... Selecting previously unselected package libelf1:amd64. Preparing to unpack .../22-libelf1_0.188-2.1_amd64.deb ... Unpacking libelf1:amd64 (0.188-2.1) ... Selecting previously unselected package dwz. Preparing to unpack .../23-dwz_0.15-1_amd64.deb ... Unpacking dwz (0.15-1) ... Selecting previously unselected package libicu72:amd64. Preparing to unpack .../24-libicu72_72.1-3_amd64.deb ... Unpacking libicu72:amd64 (72.1-3) ... Selecting previously unselected package libxml2:amd64. Preparing to unpack .../25-libxml2_2.9.14+dfsg-1.1+b3_amd64.deb ... Unpacking libxml2:amd64 (2.9.14+dfsg-1.1+b3) ... Selecting previously unselected package gettext. Preparing to unpack .../26-gettext_0.21-12_amd64.deb ... Unpacking gettext (0.21-12) ... Selecting previously unselected package intltool-debian. Preparing to unpack .../27-intltool-debian_0.35.0+20060710.6_all.deb ... Unpacking intltool-debian (0.35.0+20060710.6) ... Selecting previously unselected package po-debconf. Preparing to unpack .../28-po-debconf_1.0.21+nmu1_all.deb ... Unpacking po-debconf (1.0.21+nmu1) ... Selecting previously unselected package debhelper. Preparing to unpack .../29-debhelper_13.11.4_all.deb ... Unpacking debhelper (13.11.4) ... Selecting previously unselected package libmnl0:amd64. Preparing to unpack .../30-libmnl0_1.0.4-3_amd64.deb ... Unpacking libmnl0:amd64 (1.0.4-3) ... Selecting previously unselected package libsctp1:amd64. Preparing to unpack .../31-libsctp1_1.0.19+dfsg-2_amd64.deb ... Unpacking libsctp1:amd64 (1.0.19+dfsg-2) ... Selecting previously unselected package libtalloc2:amd64. Preparing to unpack .../32-libtalloc2_2.4.0-f2_amd64.deb ... Unpacking libtalloc2:amd64 (2.4.0-f2) ... Selecting previously unselected package libosmocore19:amd64. Preparing to unpack .../33-libosmocore19_1.7.0-3_amd64.deb ... Unpacking libosmocore19:amd64 (1.7.0-3) ... Selecting previously unselected package libosmocodec0:amd64. Preparing to unpack .../34-libosmocodec0_1.7.0-3_amd64.deb ... Unpacking libosmocodec0:amd64 (1.7.0-3) ... Selecting previously unselected package libosmogsm18:amd64. Preparing to unpack .../35-libosmogsm18_1.7.0-3_amd64.deb ... Unpacking libosmogsm18:amd64 (1.7.0-3) ... Selecting previously unselected package libosmocoding0:amd64. Preparing to unpack .../36-libosmocoding0_1.7.0-3_amd64.deb ... Unpacking libosmocoding0:amd64 (1.7.0-3) ... Selecting previously unselected package libosmovty9:amd64. Preparing to unpack .../37-libosmovty9_1.7.0-3_amd64.deb ... Unpacking libosmovty9:amd64 (1.7.0-3) ... Selecting previously unselected package libosmogb14:amd64. Preparing to unpack .../38-libosmogb14_1.7.0-3_amd64.deb ... Unpacking libosmogb14:amd64 (1.7.0-3) ... Selecting previously unselected package libosmoctrl0:amd64. Preparing to unpack .../39-libosmoctrl0_1.7.0-3_amd64.deb ... Unpacking libosmoctrl0:amd64 (1.7.0-3) ... Selecting previously unselected package libpcsclite1:amd64. Preparing to unpack .../40-libpcsclite1_1.9.9-2_amd64.deb ... Unpacking libpcsclite1:amd64 (1.9.9-2) ... Selecting previously unselected package libosmosim2:amd64. Preparing to unpack .../41-libosmosim2_1.7.0-3_amd64.deb ... Unpacking libosmosim2:amd64 (1.7.0-3) ... Selecting previously unselected package libpkgconf3:amd64. Preparing to unpack .../42-libpkgconf3_1.8.1-1_amd64.deb ... Unpacking libpkgconf3:amd64 (1.8.1-1) ... Selecting previously unselected package pkgconf-bin. Preparing to unpack .../43-pkgconf-bin_1.8.1-1_amd64.deb ... Unpacking pkgconf-bin (1.8.1-1) ... Selecting previously unselected package pkgconf:amd64. Preparing to unpack .../44-pkgconf_1.8.1-1_amd64.deb ... Unpacking pkgconf:amd64 (1.8.1-1) ... Selecting previously unselected package pkg-config:amd64. Preparing to unpack .../45-pkg-config_1.8.1-1_amd64.deb ... Unpacking pkg-config:amd64 (1.8.1-1) ... Selecting previously unselected package libtalloc-dev:amd64. Preparing to unpack .../46-libtalloc-dev_2.4.0-f2_amd64.deb ... Unpacking libtalloc-dev:amd64 (2.4.0-f2) ... Selecting previously unselected package libsctp-dev:amd64. Preparing to unpack .../47-libsctp-dev_1.0.19+dfsg-2_amd64.deb ... Unpacking libsctp-dev:amd64 (1.0.19+dfsg-2) ... Selecting previously unselected package libosmocore-dev:amd64. Preparing to unpack .../48-libosmocore-dev_1.7.0-3_amd64.deb ... Unpacking libosmocore-dev:amd64 (1.7.0-3) ... Setting up libpipeline1:amd64 (1.5.7-1) ... Setting up libicu72:amd64 (72.1-3) ... Setting up bsdextrautils (2.38.1-5+b1) ... Setting up libmagic-mgc (1:5.44-3) ... Setting up libarchive-zip-perl (1.68-1) ... Setting up libdebhelper-perl (13.11.4) ... Setting up libmagic1:amd64 (1:5.44-3) ... Setting up gettext-base (0.21-12) ... Setting up m4 (1.4.19-3) ... Setting up file (1:5.44-3) ... Setting up libtalloc2:amd64 (2.4.0-f2) ... Setting up autotools-dev (20220109.1) ... Setting up libpkgconf3:amd64 (1.8.1-1) ... Setting up libmnl0:amd64 (1.0.4-3) ... Setting up autopoint (0.21-12) ... Setting up libpcsclite1:amd64 (1.9.9-2) ... Setting up pkgconf-bin (1.8.1-1) ... Setting up autoconf (2.71-3) ... Setting up libsctp1:amd64 (1.0.19+dfsg-2) ... Setting up sensible-utils (0.0.17+nmu1) ... Setting up libuchardet0:amd64 (0.0.7-1) ... Setting up libsub-override-perl (0.09-4) ... Setting up libelf1:amd64 (0.188-2.1) ... Setting up libxml2:amd64 (2.9.14+dfsg-1.1+b3) ... Setting up automake (1:1.16.5-1.3) ... update-alternatives: using /usr/bin/automake-1.16 to provide /usr/bin/automake (automake) in auto mode Setting up libfile-stripnondeterminism-perl (1.13.1-1) ... Setting up libosmocore19:amd64 (1.7.0-3) ... Setting up gettext (0.21-12) ... Setting up libtool (2.4.7-5) ... Setting up libosmovty9:amd64 (1.7.0-3) ... Setting up pkgconf:amd64 (1.8.1-1) ... Setting up intltool-debian (0.35.0+20060710.6) ... Setting up dh-autoreconf (20) ... Setting up libtalloc-dev:amd64 (2.4.0-f2) ... Setting up libsctp-dev:amd64 (1.0.19+dfsg-2) ... Setting up pkg-config:amd64 (1.8.1-1) ... Setting up dh-strip-nondeterminism (1.13.1-1) ... Setting up dwz (0.15-1) ... Setting up groff-base (1.22.4-10) ... Setting up libosmogsm18:amd64 (1.7.0-3) ... Setting up libosmocodec0:amd64 (1.7.0-3) ... Setting up libosmoctrl0:amd64 (1.7.0-3) ... Setting up libosmogb14:amd64 (1.7.0-3) ... Setting up po-debconf (1.0.21+nmu1) ... Setting up man-db (2.11.2-2) ... Not building database; man-db/auto-update is not 'true'. Setting up libosmocoding0:amd64 (1.7.0-3) ... Setting up libosmosim2:amd64 (1.7.0-3) ... Setting up debhelper (13.11.4) ... Setting up libosmocore-dev:amd64 (1.7.0-3) ... Processing triggers for libc-bin (2.36-9) ... Reading package lists... Building dependency tree... Reading state information... Reading extended state information... Initializing package states... Writing extended state information... Building tag database... -> Finished parsing the build-deps Reading package lists... Building dependency tree... Reading state information... fakeroot is already the newest version (1.31-1.2). 0 upgraded, 0 newly installed, 0 to remove and 0 not upgraded. I: Building the package I: Running cd /build/osmo-pcu-1.1.0/ && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-buildpackage -us -uc -b && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-genchanges -S > ../osmo-pcu_1.1.0-2_source.changes dpkg-buildpackage: info: source package osmo-pcu dpkg-buildpackage: info: source version 1.1.0-2 dpkg-buildpackage: info: source distribution unstable dpkg-buildpackage: info: source changed by Thorsten Alteholz dpkg-source --before-build . dpkg-buildpackage: info: host architecture amd64 fakeroot debian/rules clean dh clean --with autoreconf debian/rules override_dh_clean make[1]: Entering directory '/build/osmo-pcu-1.1.0' dh_clean rm -f tests/package.m4 rm -f tests/testsuite rm -f .tarball-version make[1]: Leaving directory '/build/osmo-pcu-1.1.0' debian/rules build dh build --with autoreconf dh_update_autotools_config debian/rules override_dh_autoreconf make[1]: Entering directory '/build/osmo-pcu-1.1.0' echo 1.1.0 > .tarball-version dh_autoreconf libtoolize: putting auxiliary files in AC_CONFIG_AUX_DIR, '.'. libtoolize: copying file './ltmain.sh' libtoolize: Consider adding 'AC_CONFIG_MACRO_DIRS([m4])' to configure.ac, libtoolize: and rerunning libtoolize and aclocal. libtoolize: Consider adding '-I m4' to ACLOCAL_AMFLAGS in Makefile.am. configure.ac:42: warning: The macro `AC_HEADER_STDC' is obsolete. configure.ac:42: You should run autoupdate. ./lib/autoconf/headers.m4:704: AC_HEADER_STDC is expanded from... configure.ac:42: the top level configure.ac:93: warning: The macro `AC_HELP_STRING' is obsolete. configure.ac:93: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:93: the top level configure.ac:134: warning: The macro `AC_HELP_STRING' is obsolete. configure.ac:134: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:134: the top level configure.ac:153: warning: The macro `AC_HELP_STRING' is obsolete. configure.ac:153: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:153: the top level configure.ac:171: warning: The macro `AC_HELP_STRING' is obsolete. configure.ac:171: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:171: the top level configure.ac:251: warning: AC_OUTPUT should be used without arguments. configure.ac:251: You should run autoupdate. configure.ac:24: installing './compile' configure.ac:27: installing './config.guess' configure.ac:27: installing './config.sub' configure.ac:9: installing './install-sh' configure.ac:9: installing './missing' src/Makefile.am: installing './depcomp' tests/Makefile.am:29: warning: source file 'alloc/AllocTest.cpp' is in a subdirectory, tests/Makefile.am:29: but option 'subdir-objects' is disabled automake: warning: possible forward-incompatibility. automake: At least one source file is in a subdirectory, but the 'subdir-objects' automake: automake option hasn't been enabled. For now, the corresponding output automake: object file(s) will be placed in the top-level directory. However, this automake: behavior may change in a future Automake major version, with object automake: files being placed in the same subdirectory as the corresponding sources. automake: You are advised to start using 'subdir-objects' option throughout your automake: project, to avoid future incompatibilities. tests/Makefile.am:38: warning: source file 'alloc/MslotTest.cpp' is in a subdirectory, tests/Makefile.am:38: but option 'subdir-objects' is disabled tests/Makefile.am:138: warning: source file 'app_info/AppInfoTest.cpp' is in a subdirectory, tests/Makefile.am:138: but option 'subdir-objects' is disabled tests/Makefile.am:57: warning: source file 'bitcomp/BitcompTest.cpp' is in a subdirectory, tests/Makefile.am:57: but option 'subdir-objects' is disabled tests/Makefile.am:57: warning: source file '../src/egprs_rlc_compression.cpp' is in a subdirectory, tests/Makefile.am:57: but option 'subdir-objects' is disabled tests/Makefile.am:122: warning: source file 'codel/codel_test.c' is in a subdirectory, tests/Makefile.am:122: but option 'subdir-objects' is disabled tests/Makefile.am:64: warning: source file 'edge/EdgeTest.cpp' is in a subdirectory, tests/Makefile.am:64: but option 'subdir-objects' is disabled tests/Makefile.am:73: warning: source file 'emu/pcu_emu.cpp' is in a subdirectory, tests/Makefile.am:73: but option 'subdir-objects' is disabled tests/Makefile.am:73: warning: source file 'emu/test_replay_gprs_attach.cpp' is in a subdirectory, tests/Makefile.am:73: but option 'subdir-objects' is disabled tests/Makefile.am:73: warning: source file 'emu/openbsc_clone.c' is in a subdirectory, tests/Makefile.am:73: but option 'subdir-objects' is disabled tests/Makefile.am:73: warning: source file 'emu/test_pdp_activation.cpp' is in a subdirectory, tests/Makefile.am:73: but option 'subdir-objects' is disabled tests/Makefile.am:129: warning: source file 'fn/FnTest.cpp' is in a subdirectory, tests/Makefile.am:129: but option 'subdir-objects' is disabled tests/Makefile.am:105: warning: source file 'llc/LlcTest.cpp' is in a subdirectory, tests/Makefile.am:105: but option 'subdir-objects' is disabled tests/Makefile.am:117: warning: source file 'llist/LListTest.cpp' is in a subdirectory, tests/Makefile.am:117: but option 'subdir-objects' is disabled tests/Makefile.am:93: warning: source file 'ms/MsTest.cpp' is in a subdirectory, tests/Makefile.am:93: but option 'subdir-objects' is disabled tests/Makefile.am:23: warning: source file 'rlcmac/RLCMACTest.cpp' is in a subdirectory, tests/Makefile.am:23: but option 'subdir-objects' is disabled tests/Makefile.am:47: warning: source file 'tbf/TbfTest.cpp' is in a subdirectory, tests/Makefile.am:47: but option 'subdir-objects' is disabled tests/Makefile.am:84: warning: source file 'types/TypesTest.cpp' is in a subdirectory, tests/Makefile.am:84: but option 'subdir-objects' is disabled tests/Makefile.am:147: warning: source file 'ulc/PdchUlcTest.cpp' is in a subdirectory, tests/Makefile.am:147: but option 'subdir-objects' is disabled make[1]: Leaving directory '/build/osmo-pcu-1.1.0' debian/rules override_dh_auto_configure make[1]: Entering directory '/build/osmo-pcu-1.1.0' dh_auto_configure -- --with-systemdsystemunitdir=/lib/systemd/system ./configure --build=x86_64-linux-gnu --prefix=/usr --includedir=\${prefix}/include --mandir=\${prefix}/share/man --infodir=\${prefix}/share/info --sysconfdir=/etc --localstatedir=/var --disable-option-checking --disable-silent-rules --libdir=\${prefix}/lib/x86_64-linux-gnu --runstatedir=/run --disable-maintainer-mode --disable-dependency-tracking --with-systemdsystemunitdir=/lib/systemd/system checking for a BSD-compatible install... /usr/bin/install -c checking whether build environment is sane... yes checking for a race-free mkdir -p... /bin/mkdir -p checking for gawk... no checking for mawk... mawk checking whether make sets $(MAKE)... yes checking whether make supports nested variables... yes checking whether make supports nested variables... (cached) yes checking whether make sets $(MAKE)... (cached) yes checking for gcc... gcc checking whether the C compiler works... yes checking for C compiler default output file name... a.out checking for suffix of executables... checking whether we are cross compiling... no checking for suffix of object files... o checking whether the compiler supports GNU C... yes checking whether gcc accepts -g... yes checking for gcc option to enable C11 features... none needed checking whether gcc understands -c and -o together... yes checking whether make supports the include directive... yes (GNU style) checking dependency style of gcc... none checking for g++... g++ checking whether the compiler supports GNU C++... yes checking whether g++ accepts -g... yes checking for g++ option to enable C++11 features... unsupported checking for g++ option to enable C++98 features... none needed checking dependency style of g++... none checking build system type... x86_64-pc-linux-gnu checking host system type... x86_64-pc-linux-gnu checking how to print strings... printf checking for a sed that does not truncate output... /bin/sed checking for grep that handles long lines and -e... /bin/grep checking for egrep... /bin/grep -E checking for fgrep... /bin/grep -F checking for ld used by gcc... /usr/bin/ld checking if the linker (/usr/bin/ld) is GNU ld... yes checking for BSD- or MS-compatible name lister (nm)... /usr/bin/nm -B checking the name lister (/usr/bin/nm -B) interface... BSD nm checking whether ln -s works... yes checking the maximum length of command line arguments... 1572864 checking how to convert x86_64-pc-linux-gnu file names to x86_64-pc-linux-gnu format... func_convert_file_noop checking how to convert x86_64-pc-linux-gnu file names to toolchain format... func_convert_file_noop checking for /usr/bin/ld option to reload object files... -r checking for file... file checking for objdump... objdump checking how to recognize dependent libraries... pass_all checking for dlltool... no checking how to associate runtime and link libraries... printf %s\n checking for ar... ar checking for archiver @FILE support... @ checking for strip... strip checking for ranlib... ranlib checking command to parse /usr/bin/nm -B output from gcc object... ok checking for sysroot... no checking for a working dd... /bin/dd checking how to truncate binary pipes... /bin/dd bs=4096 count=1 checking for mt... no checking if : is a manifest tool... no checking for stdio.h... yes checking for stdlib.h... yes checking for string.h... yes checking for inttypes.h... yes checking for stdint.h... yes checking for strings.h... yes checking for sys/stat.h... yes checking for sys/types.h... yes checking for unistd.h... yes checking for dlfcn.h... yes checking for objdir... .libs checking if gcc supports -fno-rtti -fno-exceptions... no checking for gcc option to produce PIC... -fPIC -DPIC checking if gcc PIC flag -fPIC -DPIC works... yes checking if gcc static flag -static works... yes checking if gcc supports -c -o file.o... yes checking if gcc supports -c -o file.o... (cached) yes checking whether the gcc linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking whether -lc should be explicitly linked in... no checking dynamic linker characteristics... GNU/Linux ld.so checking how to hardcode library paths into programs... immediate checking whether stripping libraries is possible... yes checking if libtool supports shared libraries... yes checking whether to build shared libraries... yes checking whether to build static libraries... yes checking how to run the C++ preprocessor... g++ -E checking for ld used by g++... /usr/bin/ld -m elf_x86_64 checking if the linker (/usr/bin/ld -m elf_x86_64) is GNU ld... yes checking whether the g++ linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking for g++ option to produce PIC... -fPIC -DPIC checking if g++ PIC flag -fPIC -DPIC works... yes checking if g++ static flag -static works... yes checking if g++ supports -c -o file.o... yes checking if g++ supports -c -o file.o... (cached) yes checking whether the g++ linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking dynamic linker characteristics... (cached) GNU/Linux ld.so checking how to hardcode library paths into programs... immediate checking for pkg-config... /usr/bin/pkg-config checking for pkg-config... /usr/bin/pkg-config checking pkg-config is at least version 0.20... yes checking for egrep... (cached) /bin/grep -E checking for libosmocore >= 1.7.0... yes checking for libosmovty >= 1.7.0... yes checking for libosmoctrl >= 1.7.0... yes checking for libosmogsm >= 1.7.0... yes checking for libosmogb >= 1.7.0... yes checking whether to enable direct DSP access for PDCH of sysmocom-bts... unset checking whether to enable direct PHY access for PDCH of NuRAN Wireless Litecell 1.5 BTS... no checking whether to enable direct PHY access for PDCH of NuRAN Wireless OC-2G BTS... no checking whether to enable VTY tests... no CPPFLAGS="-Wdate-time -D_FORTIFY_SOURCE=2" CFLAGS="-g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11" CXXFLAGS="-g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03" LDFLAGS="-Wl,-z,relro -Wl,-z,now" checking that generated files are newer than configure... done configure: creating ./config.status config.status: creating include/Makefile config.status: creating src/Makefile config.status: creating doc/Makefile config.status: creating doc/examples/Makefile config.status: creating tests/Makefile config.status: creating doc/manuals/Makefile config.status: creating contrib/Makefile config.status: creating contrib/systemd/Makefile config.status: creating contrib/osmo-pcu.spec config.status: creating Makefile config.status: executing tests/atconfig commands config.status: executing depfiles commands config.status: executing libtool commands make[1]: Leaving directory '/build/osmo-pcu-1.1.0' dh_auto_build make -j16 make[1]: Entering directory '/build/osmo-pcu-1.1.0' Making all in include make[2]: Entering directory '/build/osmo-pcu-1.1.0/include' make[2]: Nothing to be done for 'all'. make[2]: Leaving directory '/build/osmo-pcu-1.1.0/include' Making all in src make[2]: Entering directory '/build/osmo-pcu-1.1.0/src' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o pcu_main.o pcu_main.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_debug.lo gprs_debug.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o csn1.lo csn1.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o csn1_dec.lo csn1_dec.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o csn1_enc.lo csn1_enc.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gsm_rlcmac.lo gsm_rlcmac.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gprs_bssgp_pcu.lo gprs_bssgp_pcu.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gprs_bssgp_rim.lo gprs_bssgp_rim.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_rlcmac.lo gprs_rlcmac.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_rlcmac_sched.lo gprs_rlcmac_sched.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_rlcmac_meas.lo gprs_rlcmac_meas.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_rlcmac_ts_alloc.lo gprs_rlcmac_ts_alloc.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gprs_ms.lo gprs_ms.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o gprs_ms_storage.lo gprs_ms_storage.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gprs_pcu.lo gprs_pcu.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o pcu_l1_if.lo pcu_l1_if.cpp libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_bssgp_rim.c -fPIC -DPIC -o .libs/gprs_bssgp_rim.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1_dec.c -fPIC -DPIC -o .libs/csn1_dec.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1_enc.c -fPIC -DPIC -o .libs/csn1_enc.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_ms_storage.cpp -fPIC -DPIC -o .libs/gprs_ms_storage.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1.c -fPIC -DPIC -o .libs/csn1.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_pcu.c -fPIC -DPIC -o .libs/gprs_pcu.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_ms.c -fPIC -DPIC -o .libs/gprs_ms.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_ts_alloc.cpp -fPIC -DPIC -o .libs/gprs_rlcmac_ts_alloc.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_sched.cpp -fPIC -DPIC -o .libs/gprs_rlcmac_sched.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_meas.cpp -fPIC -DPIC -o .libs/gprs_rlcmac_meas.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_bssgp_pcu.c -fPIC -DPIC -o .libs/gprs_bssgp_pcu.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_debug.cpp -fPIC -DPIC -o .libs/gprs_debug.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gsm_rlcmac.c -fPIC -DPIC -o .libs/gsm_rlcmac.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pcu_l1_if.cpp -fPIC -DPIC -o .libs/pcu_l1_if.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac.cpp -fPIC -DPIC -o .libs/gprs_rlcmac.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1.c -o csn1.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_debug.cpp -o gprs_debug.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_bssgp_rim.c -o gprs_bssgp_rim.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o pcu_vty.lo pcu_vty.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o pcu_vty_functions.lo pcu_vty_functions.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o mslot_class.lo mslot_class.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_pcu.c -o gprs_pcu.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_ms_storage.cpp -o gprs_ms_storage.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_meas.cpp -o gprs_rlcmac_meas.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c pcu_vty.c -fPIC -DPIC -o .libs/pcu_vty.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac.cpp -o gprs_rlcmac.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c mslot_class.c -fPIC -DPIC -o .libs/mslot_class.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pcu_vty_functions.cpp -fPIC -DPIC -o .libs/pcu_vty_functions.o /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o nacc_fsm.lo nacc_fsm.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o neigh_cache.lo neigh_cache.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c mslot_class.c -o mslot_class.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_bssgp_pcu.c -o gprs_bssgp_pcu.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1_dec.c -o csn1_dec.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gsm_rlcmac.c -o gsm_rlcmac.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c nacc_fsm.c -fPIC -DPIC -o .libs/nacc_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c csn1_enc.c -o csn1_enc.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o tbf.lo tbf.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o tbf_fsm.lo tbf_fsm.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c neigh_cache.c -fPIC -DPIC -o .libs/neigh_cache.o /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o tbf_ul.lo tbf_ul.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o tbf_ul_ack_fsm.lo tbf_ul_ack_fsm.c libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf.cpp -fPIC -DPIC -o .libs/tbf.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pcu_vty_functions.cpp -o pcu_vty_functions.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_fsm.c -fPIC -DPIC -o .libs/tbf_fsm.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_sched.cpp -o gprs_rlcmac_sched.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf_ul.cpp -fPIC -DPIC -o .libs/tbf_ul.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_ms.c -o gprs_ms.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_ul_ack_fsm.c -fPIC -DPIC -o .libs/tbf_ul_ack_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c neigh_cache.c -o neigh_cache.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c nacc_fsm.c -o nacc_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c pcu_vty.c -o pcu_vty.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c gprs_rlcmac_ts_alloc.cpp -o gprs_rlcmac_ts_alloc.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o tbf_ul_ass_fsm.lo tbf_ul_ass_fsm.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o tbf_dl.lo tbf_dl.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o tbf_dl_ass_fsm.lo tbf_dl_ass_fsm.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_ul_ack_fsm.c -o tbf_ul_ack_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_fsm.c -o tbf_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_ul_ass_fsm.c -fPIC -DPIC -o .libs/tbf_ul_ass_fsm.o /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o bts.lo bts.cpp libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_dl_ass_fsm.c -fPIC -DPIC -o .libs/tbf_dl_ass_fsm.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf_dl.cpp -fPIC -DPIC -o .libs/tbf_dl.o /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o bts_pch_timer.lo bts_pch_timer.c libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pcu_l1_if.cpp -o pcu_l1_if.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o pdch.lo pdch.cpp libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c bts.cpp -fPIC -DPIC -o .libs/bts.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c bts_pch_timer.c -fPIC -DPIC -o .libs/bts_pch_timer.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_ul_ass_fsm.c -o tbf_ul_ass_fsm.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o pdch_ul_controller.lo pdch_ul_controller.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o encoding.lo encoding.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o sba.lo sba.c libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pdch.cpp -fPIC -DPIC -o .libs/pdch.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c tbf_dl_ass_fsm.c -o tbf_dl_ass_fsm.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o decoding.lo decoding.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o llc.lo llc.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o rlc.lo rlc.cpp libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c bts_pch_timer.c -o bts_pch_timer.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c pdch_ul_controller.c -fPIC -DPIC -o .libs/pdch_ul_controller.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c sba.c -fPIC -DPIC -o .libs/sba.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c encoding.cpp -fPIC -DPIC -o .libs/encoding.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf.cpp -o tbf.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c decoding.cpp -fPIC -DPIC -o .libs/decoding.o /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o osmobts_sock.lo osmobts_sock.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c sba.c -o sba.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c llc.c -fPIC -DPIC -o .libs/llc.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c rlc.cpp -fPIC -DPIC -o .libs/rlc.o /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o gprs_codel.lo gprs_codel.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o coding_scheme.lo coding_scheme.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c pdch_ul_controller.c -o pdch_ul_controller.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c osmobts_sock.c -fPIC -DPIC -o .libs/osmobts_sock.o /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o egprs_rlc_compression.lo egprs_rlc_compression.cpp libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf_ul.cpp -o tbf_ul.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c coding_scheme.c -fPIC -DPIC -o .libs/coding_scheme.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_codel.c -fPIC -DPIC -o .libs/gprs_codel.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c llc.c -o llc.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c egprs_rlc_compression.cpp -fPIC -DPIC -o .libs/egprs_rlc_compression.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c tbf_dl.cpp -o tbf_dl.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c decoding.cpp -o decoding.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c gprs_codel.c -o gprs_codel.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c rlc.cpp -o rlc.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c osmobts_sock.c -o osmobts_sock.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c coding_scheme.c -o coding_scheme.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c bts.cpp -o bts.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c encoding.cpp -o encoding.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c egprs_rlc_compression.cpp -o egprs_rlc_compression.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" "-DPACKAGE_STRING=\"osmo-pcu 1.1.0\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c pdch.cpp -o pdch.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=link g++ -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -Wl,-z,relro -Wl,-z,now -o libgprs.la gprs_debug.lo csn1.lo csn1_dec.lo csn1_enc.lo gsm_rlcmac.lo gprs_bssgp_pcu.lo gprs_bssgp_rim.lo gprs_rlcmac.lo gprs_rlcmac_sched.lo gprs_rlcmac_meas.lo gprs_rlcmac_ts_alloc.lo gprs_ms.lo gprs_ms_storage.lo gprs_pcu.lo pcu_l1_if.lo pcu_vty.lo pcu_vty_functions.lo mslot_class.lo nacc_fsm.lo neigh_cache.lo tbf.lo tbf_fsm.lo tbf_ul.lo tbf_ul_ack_fsm.lo tbf_ul_ass_fsm.lo tbf_dl.lo tbf_dl_ass_fsm.lo bts.lo bts_pch_timer.lo pdch.lo pdch_ul_controller.lo encoding.lo sba.lo decoding.lo llc.lo rlc.lo osmobts_sock.lo gprs_codel.lo coding_scheme.lo egprs_rlc_compression.lo gprs_rlcmac_sched.lo copying selected object files to avoid basename conflicts... libtool: link: ln .libs/gprs_rlcmac_sched.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o || cp .libs/gprs_rlcmac_sched.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o libtool: link: ar cr .libs/libgprs.a .libs/gprs_debug.o .libs/csn1.o .libs/csn1_dec.o .libs/csn1_enc.o .libs/gsm_rlcmac.o .libs/gprs_bssgp_pcu.o .libs/gprs_bssgp_rim.o .libs/gprs_rlcmac.o .libs/gprs_rlcmac_sched.o .libs/gprs_rlcmac_meas.o .libs/gprs_rlcmac_ts_alloc.o .libs/gprs_ms.o .libs/gprs_ms_storage.o .libs/gprs_pcu.o .libs/pcu_l1_if.o .libs/pcu_vty.o .libs/pcu_vty_functions.o .libs/mslot_class.o .libs/nacc_fsm.o .libs/neigh_cache.o .libs/tbf.o .libs/tbf_fsm.o .libs/tbf_ul.o .libs/tbf_ul_ack_fsm.o .libs/tbf_ul_ass_fsm.o .libs/tbf_dl.o .libs/tbf_dl_ass_fsm.o .libs/bts.o .libs/bts_pch_timer.o .libs/pdch.o .libs/pdch_ul_controller.o .libs/encoding.o .libs/sba.o .libs/decoding.o .libs/llc.o .libs/rlc.o .libs/osmobts_sock.o .libs/gprs_codel.o .libs/coding_scheme.o .libs/egprs_rlc_compression.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o libtool: link: ranlib .libs/libgprs.a libtool: link: rm -fr .libs/libgprs.lax libtool: link: ( cd ".libs" && rm -f "libgprs.la" && ln -s "../libgprs.la" "libgprs.la" ) /bin/bash ../libtool --tag=CXX --mode=link g++ -Wall -ldl -pthread -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -Wl,-z,relro -Wl,-z,now -o osmo-pcu pcu_main.o libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmogsm -losmocore -ltalloc libtool: link: g++ -Wall -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o osmo-pcu pcu_main.o ./.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread make[2]: Leaving directory '/build/osmo-pcu-1.1.0/src' Making all in doc make[2]: Entering directory '/build/osmo-pcu-1.1.0/doc' Making all in examples make[3]: Entering directory '/build/osmo-pcu-1.1.0/doc/examples' make[3]: Nothing to be done for 'all'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/doc/examples' Making all in manuals make[3]: Entering directory '/build/osmo-pcu-1.1.0/doc/manuals' make[3]: Nothing to be done for 'all'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/doc/manuals' make[3]: Entering directory '/build/osmo-pcu-1.1.0/doc' make[3]: Nothing to be done for 'all-am'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/doc' make[2]: Leaving directory '/build/osmo-pcu-1.1.0/doc' Making all in tests make[2]: Entering directory '/build/osmo-pcu-1.1.0/tests' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o pcu_emu.o `test -f 'emu/pcu_emu.cpp' || echo './'`emu/pcu_emu.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o test_replay_gprs_attach.o `test -f 'emu/test_replay_gprs_attach.cpp' || echo './'`emu/test_replay_gprs_attach.cpp gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o openbsc_clone.o `test -f 'emu/openbsc_clone.c' || echo './'`emu/openbsc_clone.c g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o test_pdp_activation.o `test -f 'emu/test_pdp_activation.cpp' || echo './'`emu/test_pdp_activation.cpp /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o emu/pcu_emu pcu_emu.o test_replay_gprs_attach.o openbsc_clone.o test_pdp_activation.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o emu/pcu_emu pcu_emu.o test_replay_gprs_attach.o openbsc_clone.o test_pdp_activation.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread make[2]: Leaving directory '/build/osmo-pcu-1.1.0/tests' Making all in contrib make[2]: Entering directory '/build/osmo-pcu-1.1.0/contrib' Making all in systemd make[3]: Entering directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[3]: Nothing to be done for 'all'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[3]: Entering directory '/build/osmo-pcu-1.1.0/contrib' make[3]: Nothing to be done for 'all-am'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[2]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[2]: Entering directory '/build/osmo-pcu-1.1.0' make[2]: Nothing to be done for 'all-am'. make[2]: Leaving directory '/build/osmo-pcu-1.1.0' make[1]: Leaving directory '/build/osmo-pcu-1.1.0' debian/rules override_dh_auto_test make[1]: Entering directory '/build/osmo-pcu-1.1.0' echo amd64 amd64 if [ "amd64" = "s390x" ] || \ [ "amd64" = "hppa" ] || \ [ "amd64" = "powerpc" ] || \ [ "amd64" = "ppc64" ] || \ [ "amd64" = "sparc64" ] || \ [ "amd64" = "mips" ] ; then \ echo "Do not care of test result on this architecture" ;\ else \ echo "Do make tests on this architecture" ;\ dh_auto_test || (find . -name testsuite.log -exec cat {} \; ; false) \ fi Do make tests on this architecture make -j16 check "TESTSUITEFLAGS=-j16 --verbose" VERBOSE=1 make[2]: Entering directory '/build/osmo-pcu-1.1.0' Making check in include make[3]: Entering directory '/build/osmo-pcu-1.1.0/include' make[3]: Nothing to be done for 'check'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/include' Making check in src make[3]: Entering directory '/build/osmo-pcu-1.1.0/src' make[3]: Nothing to be done for 'check'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0/src' Making check in doc make[3]: Entering directory '/build/osmo-pcu-1.1.0/doc' Making check in examples make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc/examples' make[4]: Nothing to be done for 'check'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc/examples' Making check in manuals make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc/manuals' make[4]: Nothing to be done for 'check'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc/manuals' make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc' make[4]: Nothing to be done for 'check-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/doc' Making check in tests make[3]: Entering directory '/build/osmo-pcu-1.1.0/tests' make rlcmac/RLCMACTest alloc/AllocTest alloc/MslotTest tbf/TbfTest types/TypesTest ms/MsTest llist/LListTest llc/LlcTest codel/codel_test edge/EdgeTest bitcomp/BitcompTest fn/FnTest app_info/AppInfoTest ulc/PdchUlcTest make[4]: Entering directory '/build/osmo-pcu-1.1.0/tests' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o RLCMACTest.o `test -f 'rlcmac/RLCMACTest.cpp' || echo './'`rlcmac/RLCMACTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o AllocTest.o `test -f 'alloc/AllocTest.cpp' || echo './'`alloc/AllocTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o MslotTest.o `test -f 'alloc/MslotTest.cpp' || echo './'`alloc/MslotTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o TbfTest.o `test -f 'tbf/TbfTest.cpp' || echo './'`tbf/TbfTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o TypesTest.o `test -f 'types/TypesTest.cpp' || echo './'`types/TypesTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o MsTest.o `test -f 'ms/MsTest.cpp' || echo './'`ms/MsTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o LListTest.o `test -f 'llist/LListTest.cpp' || echo './'`llist/LListTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o LlcTest.o `test -f 'llc/LlcTest.cpp' || echo './'`llc/LlcTest.cpp gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -c -o codel_test.o `test -f 'codel/codel_test.c' || echo './'`codel/codel_test.c g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o EdgeTest.o `test -f 'edge/EdgeTest.cpp' || echo './'`edge/EdgeTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o BitcompTest.o `test -f 'bitcomp/BitcompTest.cpp' || echo './'`bitcomp/BitcompTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o egprs_rlc_compression.o `test -f '../src/egprs_rlc_compression.cpp' || echo './'`../src/egprs_rlc_compression.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o FnTest.o `test -f 'fn/FnTest.cpp' || echo './'`fn/FnTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o AppInfoTest.o `test -f 'app_info/AppInfoTest.cpp' || echo './'`app_info/AppInfoTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.1.0\" -DPACKAGE_STRING=\"osmo-pcu\ 1.1.0\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.1.0\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -c -o PdchUlcTest.o `test -f 'ulc/PdchUlcTest.cpp' || echo './'`ulc/PdchUlcTest.cpp /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o llist/LListTest LListTest.o -losmocore -ltalloc /bin/bash ../libtool --tag=CC --mode=link gcc -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o codel/codel_test codel_test.o ../src/libgprs.la -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: gcc -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu11 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o codel/codel_test codel_test.o ../src/.libs/libgprs.a -ldl -lrt -losmoctrl -losmogsm -losmocore -ltalloc -pthread /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o alloc/MslotTest MslotTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-u,bssgp_prim_cb -Wl,-z,relro -Wl,-z,now -o llc/LlcTest LlcTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o app_info/AppInfoTest AppInfoTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o llist/LListTest LListTest.o -lrt -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o fn/FnTest FnTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o bitcomp/BitcompTest BitcompTest.o egprs_rlc_compression.o ../src/libgprs.la -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o ulc/PdchUlcTest PdchUlcTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o alloc/AllocTest AllocTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-u,bssgp_prim_cb -Wl,-z,relro -Wl,-z,now -o ms/MsTest MsTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o alloc/MslotTest MslotTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-u -Wl,bssgp_prim_cb -Wl,-z -Wl,relro -Wl,-z -Wl,now -o llc/LlcTest LlcTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o app_info/AppInfoTest AppInfoTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o fn/FnTest FnTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o bitcomp/BitcompTest BitcompTest.o egprs_rlc_compression.o ../src/.libs/libgprs.a -ldl -lrt -losmoctrl -losmogsm -losmocore -ltalloc -pthread /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o types/TypesTest TypesTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o ulc/PdchUlcTest PdchUlcTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o alloc/AllocTest AllocTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-u -Wl,bssgp_prim_cb -Wl,-z -Wl,relro -Wl,-z -Wl,now -o ms/MsTest MsTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o types/TypesTest TypesTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o rlcmac/RLCMACTest RLCMACTest.o ../src/libgprs.la -losmocore -ltalloc /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -lrt -no-install -Wl,-z,relro -Wl,-z,now -o edge/EdgeTest EdgeTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o rlcmac/RLCMACTest RLCMACTest.o ../src/.libs/libgprs.a -ldl -lrt -losmocore -ltalloc -pthread libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o edge/EdgeTest EdgeTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,--wrap=pcu_sock_send -Wl,-z,relro -Wl,-z,now -o tbf/TbfTest TbfTest.o ../src/libgprs.la -losmogb -losmovty -losmocore -ltalloc -losmogsm -losmocore -ltalloc -losmoctrl -losmogsm -losmocore -ltalloc -losmocore -ltalloc libtool: link: g++ -g -O2 -ffile-prefix-map=/build/osmo-pcu-1.1.0=. -fstack-protector-strong -Wformat -Werror=format-security -std=gnu++03 -Wl,--wrap=pcu_sock_send -Wl,-z -Wl,relro -Wl,-z -Wl,now -o tbf/TbfTest TbfTest.o ../src/.libs/libgprs.a -ldl -lrt -losmogb -losmovty -losmoctrl -losmogsm -losmocore -ltalloc -pthread make[4]: Leaving directory '/build/osmo-pcu-1.1.0/tests' make check-local make[4]: Entering directory '/build/osmo-pcu-1.1.0/tests' :;{ \ echo '# Signature of the current package.' && \ echo 'm4_define([AT_PACKAGE_NAME],' && \ echo ' [osmo-pcu])' && \ echo 'm4_define([AT_PACKAGE_TARNAME],' && \ echo ' [osmo-pcu])' && \ echo 'm4_define([AT_PACKAGE_VERSION],' && \ echo ' [1.1.0])' && \ echo 'm4_define([AT_PACKAGE_STRING],' && \ echo ' [osmo-pcu 1.1.0])' && \ echo 'm4_define([AT_PACKAGE_BUGREPORT],' && \ echo ' [osmocom-net-gprs@lists.osmocom.org])'; \ echo 'm4_define([AT_PACKAGE_URL],' && \ echo ' [])'; \ } >'./package.m4' /bin/bash ../missing --run autom4te --language=autotest -I '.' -o testsuite.tmp testsuite.at mv testsuite.tmp testsuite /bin/bash './testsuite' -j16 --verbose ## -------------------------- ## ## osmo-pcu 1.1.0 test suite. ## ## -------------------------- ## 2. testsuite.at:12: testing multi_slot ... 1. testsuite.at:5: testing rlcmac ... 3. testsuite.at:18: testing ts_alloc ... 4. testsuite.at:25: testing tbf ... ./testsuite.at:15: $OSMO_QEMU $abs_top_builddir/tests/alloc/MslotTest 6. testsuite.at:38: testing edge ... 7. testsuite.at:45: testing types ... 5. testsuite.at:31: testing bitcomp ... ./testsuite.at:28: $OSMO_QEMU $abs_top_builddir/tests/tbf/TbfTest 9. testsuite.at:59: testing llc ... 8. testsuite.at:52: testing ms ... 14. testsuite.at:92: testing ulc ... cat: /build/osmo-pcu-1.1.0/tests/edge/EdgeTest.err: No such file or directory ./testsuite.at:35: $OSMO_QEMU $abs_top_builddir/tests/bitcomp/BitcompTest 13. testsuite.at:85: testing app_info ... ./testsuite.at:49: $OSMO_QEMU $abs_top_builddir/tests/types/TypesTest 12. testsuite.at:79: testing fn ... 10. testsuite.at:66: testing llist ... ./testsuite.at:96: $OSMO_QEMU $abs_top_builddir/tests/ulc/PdchUlcTest ./testsuite.at:63: $OSMO_QEMU $abs_top_builddir/tests/llc/LlcTest ./testsuite.at:56: $OSMO_QEMU $abs_top_builddir/tests/ms/MsTest ./testsuite.at:70: $OSMO_QEMU $abs_top_builddir/tests/llist/LListTest ./testsuite.at:42: $OSMO_QEMU $abs_top_builddir/tests/edge/EdgeTest ./testsuite.at:9: $OSMO_QEMU $abs_top_builddir/tests/rlcmac/RLCMACTest ./testsuite.at:82: $OSMO_QEMU $abs_top_builddir/tests/fn/FnTest ./testsuite.at:89: $OSMO_QEMU $abs_top_builddir/tests/app_info/AppInfoTest 11. testsuite.at:73: testing codel ... 5. testsuite.at:31: ok ./testsuite.at:76: $OSMO_QEMU $abs_top_builddir/tests/codel/codel_test 10. testsuite.at:66: ok stderr: <000f> validating counter group 0x55a283bdcd40(bts) with 102 counters <0002> Detected FN jump! 1320462 -> 8246 <0002> Detected FN jump! 8246 -> 10270 <0002> Detected FN jump! 10270 -> 311276 <0002> Detected FN jump! 311276 -> 42462 <0002> Race condition between rfn (42422) and m_cur_fn (42462) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 42462 -> 42433 <0002> Race condition between rfn (42431) and m_cur_fn (42433) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 42433 -> 5219152 <0002> Race condition between rfn (42428) and m_cur_fn (5219152) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 5219152 -> 5219587 <0002> Race condition between rfn (42257) and m_cur_fn (5219587) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 5219587 -> 0 <0002> Race condition between rfn (42419) and m_cur_fn (0) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 0 -> 453 <0002> Race condition between rfn (42330) and m_cur_fn (453) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 453 -> 10 <0002> Race condition between rfn (42422) and m_cur_fn (10) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 10 -> 23 <0002> Race condition between rfn (42390) and m_cur_fn (23) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 23 -> 2715648 <0002> Race condition between rfn (42431) and m_cur_fn (2715648) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 2715648 -> 0 <0002> Race condition between rfn (42431) and m_cur_fn (0) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 0 -> 2715648 <0002> Detected FN jump! 2715648 -> 0 7. testsuite.at:45: ok stderr: 14. testsuite.at:92: ok 9. testsuite.at:59: ok <0000> CoDel decided to drop packet, window = 0.099ms, count = 1 <0000> CoDel decided to drop packet, window = 0.070ms, count = 2 <0000> CoDel decided to drop packet, window = 0.057ms, count = 3 <0000> CoDel decided to drop packet, window = 0.050ms, count = 4 <0000> CoDel decided to drop packet, window = 0.044ms, count = 5 <0000> CoDel decided to drop packet, window = 0.040ms, count = 6 <0000> CoDel decided to drop packet, window = 0.037ms, count = 7 <0000> CoDel decided to drop packet, window = 0.035ms, count = 8 <0000> CoDel decided to drop packet, window = 0.033ms, count = 9 <0000> CoDel decided to drop packet, window = 0.031ms, count = 10 <0000> CoDel decided to drop packet, window = 0.030ms, count = 11 <0000> CoDel decided to drop packet, window = 0.028ms, count = 12 <0000> CoDel decided to drop packet, window = 0.027ms, count = 13 <0000> CoDel decided to drop packet, window = 0.026ms, count = 14 <0000> CoDel decided to drop packet, window = 0.025ms, count = 15 <0000> CoDel decided to drop packet, window = 0.025ms, count = 16 <0000> CoDel decided to drop packet, window = 0.024ms, count = 17 <0000> CoDel decided to drop packet, window = 0.023ms, count = 18 <0000> CoDel decided to drop packet, window = 0.022ms, count = 19 <0000> CoDel decided to drop packet, window = 0.022ms, count = 20 <0000> CoDel decided to drop packet, window = 0.099ms, count = 1 <0000> CoDel decided to drop packet, window = 0.070ms, count = 2 stderr: Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Encoded message block, CS-1, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Encoded message block, CS-1, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff Encoded message block, CS-2, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 Encoded message block, CS-2, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff Encoded message block, CS-3, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 Encoded message block, CS-3, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff Encoded message block, CS-4, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 Encoded message block, CS-4, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 ff Encoded message block, MCS-1, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 00 Encoded message block, MCS-1, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a ff Encoded message block, MCS-2, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 00 Encoded message block, MCS-2, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 ff Encoded message block, MCS-3, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 00 Encoded message block, MCS-3, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a ff Encoded message block, MCS-4, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 00 Encoded message block, MCS-4, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-5, idx 0, pattern 00: 00 00 00 c0 7f 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 3f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-5, idx 0, pattern ff: ff ff ff 3f 40 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d 0d c0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-6, idx 0, pattern 00: 00 00 00 c0 7f 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 0d 4e 8e ce 0e 4f 8f cf 0f 50 90 d0 10 51 91 d1 11 d2 3f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-6, idx 0, pattern ff: ff ff ff 3f 40 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 0d 4e 8e ce 0e 4f 8f cf 0f 50 90 d0 10 51 91 d1 11 12 c0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-7, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 fc 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-7, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 f3 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-7, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 00 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-7, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 03 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Encoded message block, MCS-8, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 fd 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Encoded message block, MCS-8, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 f4 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Encoded message block, MCS-8, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 01 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Encoded message block, MCS-8, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 04 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-9, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 0d 11 15 19 1d 21 fd 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-9, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 34 44 54 64 74 84 f4 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-9, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 0d 11 15 19 1d 21 01 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-9, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 34 44 54 64 74 84 04 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 12. testsuite.at:79: ok 13. testsuite.at:85: ok 6. testsuite.at:38: ok 11. testsuite.at:73: ok stderr: ./testsuite.at:22: $OSMO_QEMU $abs_top_builddir/tests/alloc/AllocTest 1. testsuite.at:5: ok <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DCC....."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....DCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....DDCD"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...DDCD."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..DDCD.."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".DDCD..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..DCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <000f> validating counter group 0x5601bd6703e0(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. 2. testsuite.at:12: ok stdout: 4. testsuite.at:25: ok 8. testsuite.at:52: ok 3. testsuite.at:18: ok ## ------------- ## ## Test results. ## ## ------------- ## All 14 tests were successful. make python-tests make[5]: Entering directory '/build/osmo-pcu-1.1.0/tests' Not running python-based tests (determined at configure-time) make[5]: Leaving directory '/build/osmo-pcu-1.1.0/tests' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/tests' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/tests' Making check in contrib make[3]: Entering directory '/build/osmo-pcu-1.1.0/contrib' Making check in systemd make[4]: Entering directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[4]: Nothing to be done for 'check'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[4]: Entering directory '/build/osmo-pcu-1.1.0/contrib' make[4]: Nothing to be done for 'check-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[3]: Entering directory '/build/osmo-pcu-1.1.0' make[3]: Nothing to be done for 'check-am'. make[3]: Leaving directory '/build/osmo-pcu-1.1.0' make[2]: Leaving directory '/build/osmo-pcu-1.1.0' make[1]: Leaving directory '/build/osmo-pcu-1.1.0' create-stamp debian/debhelper-build-stamp fakeroot debian/rules binary dh binary --with autoreconf dh_testroot dh_prep debian/rules override_dh_auto_install make[1]: Entering directory '/build/osmo-pcu-1.1.0' dh_auto_install make -j1 install DESTDIR=/build/osmo-pcu-1.1.0/debian/osmo-pcu AM_UPDATE_INFO_DIR=no make[2]: Entering directory '/build/osmo-pcu-1.1.0' Making install in include make[3]: Entering directory '/build/osmo-pcu-1.1.0/include' make[4]: Entering directory '/build/osmo-pcu-1.1.0/include' make[4]: Nothing to be done for 'install-exec-am'. make[4]: Nothing to be done for 'install-data-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/include' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/include' Making install in src make[3]: Entering directory '/build/osmo-pcu-1.1.0/src' make[4]: Entering directory '/build/osmo-pcu-1.1.0/src' /bin/mkdir -p '/build/osmo-pcu-1.1.0/debian/osmo-pcu/usr/bin' /bin/bash ../libtool --mode=install /usr/bin/install -c osmo-pcu '/build/osmo-pcu-1.1.0/debian/osmo-pcu/usr/bin' libtool: install: /usr/bin/install -c osmo-pcu /build/osmo-pcu-1.1.0/debian/osmo-pcu/usr/bin/osmo-pcu make[4]: Nothing to be done for 'install-data-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/src' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/src' Making install in doc make[3]: Entering directory '/build/osmo-pcu-1.1.0/doc' Making install in examples make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc/examples' make[5]: Entering directory '/build/osmo-pcu-1.1.0/doc/examples' make[5]: Nothing to be done for 'install-exec-am'. /bin/mkdir -p '/build/osmo-pcu-1.1.0/debian/osmo-pcu/usr/share/doc/osmo-pcu/examples/osmo-pcu' /usr/bin/install -c -m 644 osmo-pcu.cfg '/build/osmo-pcu-1.1.0/debian/osmo-pcu/usr/share/doc/osmo-pcu/examples/osmo-pcu' /bin/mkdir -p '/build/osmo-pcu-1.1.0/debian/osmo-pcu/etc/osmocom' /usr/bin/install -c -m 644 osmo-pcu.cfg '/build/osmo-pcu-1.1.0/debian/osmo-pcu/etc/osmocom' make[5]: Leaving directory '/build/osmo-pcu-1.1.0/doc/examples' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc/examples' Making install in manuals make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc/manuals' make[5]: Entering directory '/build/osmo-pcu-1.1.0/doc/manuals' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/osmo-pcu-1.1.0/doc/manuals' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc/manuals' make[4]: Entering directory '/build/osmo-pcu-1.1.0/doc' make[5]: Entering directory '/build/osmo-pcu-1.1.0/doc' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/osmo-pcu-1.1.0/doc' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/doc' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/doc' Making install in tests make[3]: Entering directory '/build/osmo-pcu-1.1.0/tests' make[4]: Entering directory '/build/osmo-pcu-1.1.0/tests' make[4]: Nothing to be done for 'install-exec-am'. make[4]: Nothing to be done for 'install-data-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0/tests' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/tests' Making install in contrib make[3]: Entering directory '/build/osmo-pcu-1.1.0/contrib' Making install in systemd make[4]: Entering directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[5]: Entering directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[5]: Nothing to be done for 'install-exec-am'. /bin/mkdir -p '/build/osmo-pcu-1.1.0/debian/osmo-pcu/lib/systemd/system' /usr/bin/install -c -m 644 osmo-pcu.service '/build/osmo-pcu-1.1.0/debian/osmo-pcu/lib/systemd/system' make[5]: Leaving directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/contrib/systemd' make[4]: Entering directory '/build/osmo-pcu-1.1.0/contrib' make[5]: Entering directory '/build/osmo-pcu-1.1.0/contrib' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[4]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[3]: Leaving directory '/build/osmo-pcu-1.1.0/contrib' make[3]: Entering directory '/build/osmo-pcu-1.1.0' make[4]: Entering directory '/build/osmo-pcu-1.1.0' make[4]: Nothing to be done for 'install-exec-am'. make[4]: Nothing to be done for 'install-data-am'. make[4]: Leaving directory '/build/osmo-pcu-1.1.0' make[3]: Leaving directory '/build/osmo-pcu-1.1.0' make[2]: Leaving directory '/build/osmo-pcu-1.1.0' make[1]: Leaving directory '/build/osmo-pcu-1.1.0' dh_install dh_installdocs dh_installchangelogs dh_installinit debian/rules override_dh_installsystemd make[1]: Entering directory '/build/osmo-pcu-1.1.0' dh_installsystemd --no-enable --no-start make[1]: Leaving directory '/build/osmo-pcu-1.1.0' dh_lintian dh_perl dh_link dh_strip_nondeterminism dh_compress dh_fixperms dh_missing dh_dwz -a dh_strip -a dh_makeshlibs -a dh_shlibdeps -a dh_installdeb dh_gencontrol dh_md5sums dh_builddeb dpkg-deb: building package 'osmo-pcu' in '../osmo-pcu_1.1.0-2_amd64.deb'. dpkg-deb: building package 'osmo-pcu-dbgsym' in '../osmo-pcu-dbgsym_1.1.0-2_amd64.deb'. dpkg-genbuildinfo --build=binary -O../osmo-pcu_1.1.0-2_amd64.buildinfo dpkg-genchanges --build=binary -O../osmo-pcu_1.1.0-2_amd64.changes dpkg-genchanges: info: binary-only upload (no source code included) dpkg-source --after-build . dpkg-buildpackage: info: binary-only upload (no source included) dpkg-genchanges: info: not including original source code in upload I: copying local configuration I: unmounting dev/ptmx filesystem I: unmounting dev/pts filesystem I: unmounting dev/shm filesystem I: unmounting proc filesystem I: unmounting sys filesystem I: cleaning the build env I: removing directory /srv/workspace/pbuilder/3374487 and its subdirectories I: Current time: Fri May 24 23:30:09 -12 2024 I: pbuilder-time-stamp: 1716636609