{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/r-b-build.zyubxItA/b1/rdma-core_52.0-2_i386.changes", "source2": "/srv/reproducible-results/rbuild-debian/r-b-build.zyubxItA/b2/rdma-core_52.0-2_i386.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -3,27 +3,27 @@\n  dfcc7e7a23e085e3abb1c28c32cc1d5c 91440 net optional ibacm_52.0-2_i386.deb\n  a8415dc6c7f20502940652480dd18df2 2212992 debug optional ibverbs-providers-dbgsym_52.0-2_i386.deb\n  1112ad06878fcc7a5794cf9fcbe07ee1 380056 net optional ibverbs-providers_52.0-2_i386.deb\n  a381ac77380a62e4d05d50d679c87472 192804 debug optional ibverbs-utils-dbgsym_52.0-2_i386.deb\n  2689d2a360e182cd6423b51756b353df 56044 net optional ibverbs-utils_52.0-2_i386.deb\n  edbdc42e98ebb6096d2542c4ad7324ae 752240 debug optional infiniband-diags-dbgsym_52.0-2_i386.deb\n  38909dcf24c6013ac456084acb444977 228392 net optional infiniband-diags_52.0-2_i386.deb\n- 05dbfe8ad2b3378da12f3eeb7b04aec4 56204 libdevel optional libibmad-dev_52.0-2_i386.deb\n+ 8414392753fd7ea0400b8f4897f9fddf 56124 libdevel optional libibmad-dev_52.0-2_i386.deb\n  49dd2d463d2e90435d50f33e3f3963b6 88984 debug optional libibmad5-dbgsym_52.0-2_i386.deb\n  e8ce24625e545c38a603966e5ec741f2 44672 libs optional libibmad5_52.0-2_i386.deb\n- 3d1cba12122d56bd02c9bbb2846c278f 50020 libdevel optional libibnetdisc-dev_52.0-2_i386.deb\n+ cb1454399e38f4e2404522247217a5a4 50028 libdevel optional libibnetdisc-dev_52.0-2_i386.deb\n  ef5ca1f8ed68cb46690702ee55c8f612 78584 debug optional libibnetdisc5t64-dbgsym_52.0-2_i386.deb\n  eeb12b4e31f6663f6bfb8d2e4ebd1ed7 35952 libs optional libibnetdisc5t64_52.0-2_i386.deb\n- 2eede509267e54c3ad46a0f3ec539882 57308 libdevel optional libibumad-dev_52.0-2_i386.deb\n+ 7941d7a53d5c2bfc6b1f6b4d1e30904e 57284 libdevel optional libibumad-dev_52.0-2_i386.deb\n  b9427f89c19f44ad6112cedd35b4f041 34340 debug optional libibumad3-dbgsym_52.0-2_i386.deb\n  5cf667bf11084d4f307e5573b767348d 28456 libs optional libibumad3_52.0-2_i386.deb\n- f033c989cd7fbfb8434ee33a649cb94d 701220 libdevel optional libibverbs-dev_52.0-2_i386.deb\n+ 07f9752fbaf8f3f536758a7a6b635374 700988 libdevel optional libibverbs-dev_52.0-2_i386.deb\n  2c14fa8d7683548026f8a179b9f38763 227892 debug optional libibverbs1-dbgsym_52.0-2_i386.deb\n  e191e2caf01e29d60d6094c7845edb12 66632 libs optional libibverbs1_52.0-2_i386.deb\n- d15ce0f5b632c054cba9de18b56b9c9e 132432 libdevel optional librdmacm-dev_52.0-2_i386.deb\n+ 2a739f6be3bfb73f7a299fa6a20e7e05 132316 libdevel optional librdmacm-dev_52.0-2_i386.deb\n  e9877f7ff78409908d86caf3ca9f212e 214960 debug optional librdmacm1t64-dbgsym_52.0-2_i386.deb\n  611cb8f98060cdedd7cc95074ce1ec53 76296 libs optional librdmacm1t64_52.0-2_i386.deb\n  865be96c4b9b307f333495c02a5fdeca 6837300 debug optional python3-pyverbs-dbgsym_52.0-2_i386.deb\n  f37e7b18d7917f7678bc992316365509 1467708 python optional python3-pyverbs_52.0-2_i386.deb\n  35a11a0b33432671c89fc9137de5bed6 70844 debug optional rdma-core-dbgsym_52.0-2_i386.deb\n  4aab18e3f065b16549e7ee096ebaaa09 61684 net optional rdma-core_52.0-2_i386.deb\n  d67c12145b26944ee56c0d9e7444c4bf 269772 debug optional rdmacm-utils-dbgsym_52.0-2_i386.deb\n"}, {"source1": "libibmad-dev_52.0-2_i386.deb", "source2": "libibmad-dev_52.0-2_i386.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r--   0        0        0        4 2024-06-27 11:49:34.000000 debian-binary\n -rw-r--r--   0        0        0      920 2024-06-27 11:49:34.000000 control.tar.xz\n--rw-r--r--   0        0        0    55092 2024-06-27 11:49:34.000000 data.tar.xz\n+-rw-r--r--   0        0        0    55012 2024-06-27 11:49:34.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/i386-linux-gnu/libibmad.a", "source2": "./usr/lib/i386-linux-gnu/libibmad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,14 +1,9 @@\n \n Archive index:\n-portid2portnum in portid.c.o\n-portid2str in portid.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in portid.c.o\n-str2drpath in portid.c.o\n-drpath2str in portid.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in rpc.c.o\n ibdebug in rpc.c.o\n madrpc_show_errors in rpc.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in rpc.c.o\n madrpc_save_mad in rpc.c.o\n madrpc_set_retries in rpc.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in rpc.c.o\n@@ -24,14 +19,29 @@\n mad_rpc in rpc.c.o\n mad_rpc_rmpp in rpc.c.o\n madrpc in rpc.c.o\n madrpc_rmpp in rpc.c.o\n madrpc_init in rpc.c.o\n mad_rpc_open_port in rpc.c.o\n mad_rpc_close_port in rpc.c.o\n+portid2portnum in portid.c.o\n+portid2str in portid.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in portid.c.o\n+str2drpath in portid.c.o\n+drpath2str in portid.c.o\n+ib_resolve_smlid_via in resolve.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in resolve.c.o\n+ib_resolve_smlid in resolve.c.o\n+ib_resolve_gid_via in resolve.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in resolve.c.o\n+ib_resolve_guid_via in resolve.c.o\n+ib_resolve_self_via in resolve.c.o\n+ib_resolve_portid_str_via in resolve.c.o\n+ib_resolve_portid_str in resolve.c.o\n+ib_resolve_self in resolve.c.o\n mad_dump_int in dump.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in dump.c.o\n mad_dump_uint in dump.c.o\n mad_dump_hex in dump.c.o\n mad_dump_rhex in dump.c.o\n mad_dump_linkwidth in dump.c.o\n mad_dump_linkwidthsup in dump.c.o\n@@ -101,119 +111,82 @@\n mad_dump_cc_cacongestionentry in dump.c.o\n mad_dump_cc_congestioncontroltable in dump.c.o\n mad_dump_cc_congestioncontroltableentry in dump.c.o\n mad_dump_cc_timestamp in dump.c.o\n mad_dump_classportinfo in dump.c.o\n mad_dump_portinfo_ext in dump.c.o\n xdump in dump.c.o\n+bm_call_via in bm.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in bm.c.o\n+mad_send_via in serv.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in serv.c.o\n+mad_send in serv.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in serv.c.o\n+mad_respond_via in serv.c.o\n+mad_respond in serv.c.o\n+mad_receive in serv.c.o\n+mad_receive_via in serv.c.o\n+mad_alloc in serv.c.o\n+mad_free in serv.c.o\n mad_class_agent in register.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in register.c.o\n rdmacore52_0_mad_register_port_client in register.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in register.c.o\n mad_register_client in register.c.o\n mad_register_client_via in register.c.o\n mad_register_server in register.c.o\n mad_register_server_via in register.c.o\n-pma_query_via in gs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in gs.c.o\n-performance_reset_via in gs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in fields.c.o\n-mad_get_field in fields.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in fields.c.o\n-mad_set_field in fields.c.o\n-mad_get_field64 in fields.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in fields.c.o\n-mad_set_field64 in fields.c.o\n-mad_set_array in fields.c.o\n-mad_get_array in fields.c.o\n-mad_decode_field in fields.c.o\n-mad_encode_field in fields.c.o\n-mad_print_field in fields.c.o\n-mad_dump_field in fields.c.o\n-mad_dump_val in fields.c.o\n-mad_field_name in fields.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in fields.c.o\n sa_rpc_call in sa.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in sa.c.o\n sa_call in sa.c.o\n ib_path_query_via in sa.c.o\n ib_path_query in sa.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in sa.c.o\n ib_node_query_via in sa.c.o\n cc_query_status_via in cc.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in cc.c.o\n cc_config_status_via in cc.c.o\n-mad_send_via in serv.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in serv.c.o\n-mad_send in serv.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in serv.c.o\n-mad_respond_via in serv.c.o\n-mad_respond in serv.c.o\n-mad_receive in serv.c.o\n-mad_receive_via in serv.c.o\n-mad_alloc in serv.c.o\n-mad_free in serv.c.o\n-bm_call_via in bm.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in bm.c.o\n+pma_query_via in gs.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in gs.c.o\n+performance_reset_via in gs.c.o\n+mad_trid in mad.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in mad.c.o\n+mad_get_timeout in mad.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in mad.c.o\n+mad_get_retries in mad.c.o\n+mad_encode in mad.c.o\n+mad_build_pkt in mad.c.o\n smp_mkey_set in smp.c.o\n smp_mkey_get in smp.c.o\n smp_set_status_via in smp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in smp.c.o\n smp_set_via in smp.c.o\n smp_set in smp.c.o\n smp_query_status_via in smp.c.o\n smp_query_via in smp.c.o\n smp_query in smp.c.o\n-ib_resolve_smlid_via in resolve.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in resolve.c.o\n-ib_resolve_smlid in resolve.c.o\n-ib_resolve_gid_via in resolve.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in resolve.c.o\n-ib_resolve_guid_via in resolve.c.o\n-ib_resolve_self_via in resolve.c.o\n-ib_resolve_portid_str_via in resolve.c.o\n-ib_resolve_portid_str in resolve.c.o\n-ib_resolve_self in resolve.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in fields.c.o\n+mad_get_field in fields.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in fields.c.o\n+mad_set_field in fields.c.o\n+mad_get_field64 in fields.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in fields.c.o\n+mad_set_field64 in fields.c.o\n+mad_set_array in fields.c.o\n+mad_get_array in fields.c.o\n+mad_decode_field in fields.c.o\n+mad_encode_field in fields.c.o\n+mad_print_field in fields.c.o\n+mad_dump_field in fields.c.o\n+mad_dump_val in fields.c.o\n+mad_field_name in fields.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in fields.c.o\n ib_vendor_call in vendor.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in vendor.c.o\n ib_vendor_call_via in vendor.c.o\n-mad_trid in mad.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in mad.c.o\n-mad_get_timeout in mad.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in mad.c.o\n-mad_get_retries in mad.c.o\n-mad_encode in mad.c.o\n-mad_build_pkt in mad.c.o\n-\n-portid.c.o:\n-00000000 r .LC0\n-00000007 r .LC1\n-0000000f r .LC2\n-00000024 r .LC3\n-00000028 r .LC4\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __fprintf_chk\n-00000000 r __func__.0\n-         U __snprintf_chk\n-         U __sprintf_chk\n-         U __stack_chk_fail_local\n-00000000 d buf.1\n-00000340 T drpath2str\n-         U free\n-         U getpid\n-         U ibdebug\n-         U inet_ntop\n-00000000 T portid2portnum\n-00000030 T portid2str\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U stderr\n-000001f0 T str2drpath\n-         U strchr\n-         U strdup\n-         U strtol\n \n rpc.c.o:\n 00000000 r .LC0\n 00000000 r .LC1\n 00000130 r .LC10\n 0000016c r .LC11\n 000001b0 r .LC12\n@@ -301,14 +274,76 @@\n          U umad_open_port\n          U umad_recv\n          U umad_send\n          U umad_size\n          U umad_status\n          U xdump\n \n+portid.c.o:\n+00000000 r .LC0\n+00000007 r .LC1\n+0000000f r .LC2\n+00000024 r .LC3\n+00000028 r .LC4\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __fprintf_chk\n+00000000 r __func__.0\n+         U __snprintf_chk\n+         U __sprintf_chk\n+         U __stack_chk_fail_local\n+00000000 d buf.1\n+00000340 T drpath2str\n+         U free\n+         U getpid\n+         U ibdebug\n+         U inet_ntop\n+00000000 T portid2portnum\n+00000030 T portid2str\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U stderr\n+000001f0 T str2drpath\n+         U strchr\n+         U strdup\n+         U strtol\n+\n+resolve.c.o:\n+00000780 t .L71\n+000006e0 t .L73\n+00000858 t .L74\n+00000848 t .L75\n+00000808 t .L76\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __fprintf_chk\n+00000014 r __func__.0\n+         U __stack_chk_fail_local\n+         U getpid\n+         U ib_path_query_via\n+00000220 T ib_resolve_gid_via\n+00000300 T ib_resolve_guid_via\n+00000930 T ib_resolve_portid_str\n+00000640 T ib_resolve_portid_str_via\n+00000960 T ib_resolve_self\n+000004f0 T ib_resolve_self_via\n+00000110 T ib_resolve_smlid\n+00000000 T ib_resolve_smlid_via\n+         U inet_pton\n+         U mad_decode_field\n+         U mad_encode_field\n+         U mad_set_field64\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_ibmp\n+         U smp_query_via\n+         U stderr\n+         U str2drpath\n+         U strtol\n+         U strtoull\n+\n dump.c.o:\n 00000d28 t .L179\n 00000da0 t .L180\n 00000d90 t .L182\n 00000d80 t .L183\n 00000d70 t .L184\n 00000d50 t .L185\n@@ -551,112 +586,102 @@\n 000011a0 T rdmacore52_0_mad_dump_linkspeedextsup2\n          U snprintf\n          U stderr\n          U strlen\n          U strncpy\n 000059c0 T xdump\n \n-register.c.o:\n+bm.c.o:\n 00000000 r .LC0\n-00000030 r .LC1\n-00000064 r .LC2\n-00000098 r .LC3\n+00000024 r .LC1\n+00000054 r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __fprintf_chk\n 00000000 r __func__.0\n-00000018 r __func__.1\n          U __stack_chk_fail_local\n+00000000 T bm_call_via\n          U getpid\n          U ibdebug\n-00000000 T mad_class_agent\n-00000160 T mad_register_client\n-00000290 T mad_register_client_via\n-000003c0 T mad_register_server\n-00000600 T mad_register_server_via\n-         U mad_rpc_portid\n+         U mad_rpc\n+         U mad_send_via\n+         U portid2str\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-         U rdmacore52_0_ibmp\n-00000040 T rdmacore52_0_mad_register_port_client\n          U stderr\n-         U umad_register\n-         U umad_register_oui\n \n-gs.c.o:\n+serv.c.o:\n 00000000 r .LC0\n 00000024 r .LC1\n-00000054 r .LC2\n+00000000 r .LC2\n+0000004c r .LC3\n+0000000f r .LC4\n+00000070 r .LC5\n+00000029 r .LC6\n+000000cc r .LC7\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __fprintf_chk\n 00000000 r __func__.0\n-00000018 r __func__.1\n+00000010 r __func__.1\n+00000020 r __func__.2\n+         U __memset_chk\n          U __stack_chk_fail_local\n+         U calloc\n+         U free\n          U getpid\n          U ibdebug\n-         U mad_rpc\n-         U mad_set_field\n-000001a0 T performance_reset_via\n-00000000 T pma_query_via\n+000008f0 T mad_alloc\n+         U mad_build_pkt\n+00000920 T mad_free\n+         U mad_get_field\n+         U mad_get_field64\n+         U mad_get_timeout\n+000006a0 T mad_receive\n+000007d0 T mad_receive_via\n+00000670 T mad_respond\n+00000240 T mad_respond_via\n+00000210 T mad_send\n+00000000 T mad_send_via\n+         U portid2str\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_ibmp\n          U stderr\n+         U strerror\n+         U umad_get_mad\n+         U umad_get_mad_addr\n+         U umad_recv\n+         U umad_send\n+         U umad_size\n+         U xdump\n \n-fields.c.o:\n+register.c.o:\n 00000000 r .LC0\n-00000006 r .LC1\n+00000030 r .LC1\n+00000064 r .LC2\n+00000098 r .LC3\n          U _GLOBAL_OFFSET_TABLE_\n-         U __printf_chk\n-         U __snprintf_chk\n+         U __fprintf_chk\n+00000000 r __func__.0\n+00000018 r __func__.1\n          U __stack_chk_fail_local\n-00000000 t _mad_dump\n-00000000 d ib_mad_f\n-00000610 T mad_decode_field\n-         U mad_dump_array\n-00000ae0 T mad_dump_field\n-         U mad_dump_hex\n-         U mad_dump_linkdowndefstate\n-         U mad_dump_linkspeed\n-         U mad_dump_linkspeeden\n-         U mad_dump_linkspeedext\n-         U mad_dump_linkspeedexten\n-         U mad_dump_linkspeedextsup\n-         U mad_dump_linkspeedsup\n-         U mad_dump_linkwidth\n-         U mad_dump_linkwidthen\n-         U mad_dump_linkwidthsup\n-         U mad_dump_mtu\n-         U mad_dump_node_type\n-         U mad_dump_opervls\n-         U mad_dump_physportstate\n-         U mad_dump_portcapmask\n-         U mad_dump_portcapmask2\n-         U mad_dump_portstate\n-         U mad_dump_rhex\n-         U mad_dump_string\n-         U mad_dump_uint\n-00000c90 T mad_dump_val\n-         U mad_dump_vlcap\n-00000830 T mad_encode_field\n-00000d00 T mad_field_name\n-000005a0 T mad_get_array\n-000001a0 T mad_get_field\n-000004b0 T mad_get_field64\n-00000a70 T mad_print_field\n-00000530 T mad_set_array\n-00000310 T mad_set_field\n-000004f0 T mad_set_field64\n-         U memcpy\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+         U getpid\n+         U ibdebug\n+00000000 T mad_class_agent\n+00000160 T mad_register_client\n+00000290 T mad_register_client_via\n+000003c0 T mad_register_server\n+00000600 T mad_register_server_via\n+         U mad_rpc_portid\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-         U rdmacore52_0_mad_dump_linkspeedext2\n-         U rdmacore52_0_mad_dump_linkspeedexten2\n-         U rdmacore52_0_mad_dump_linkspeedextsup2\n-         U strlen\n+         U rdmacore52_0_ibmp\n+00000040 T rdmacore52_0_mad_register_port_client\n+         U stderr\n+         U umad_register\n+         U umad_register_oui\n \n sa.c.o:\n 00000000 r .LC0\n 00000030 r .LC1\n 00000060 r .LC2\n 0000008c r .LC3\n          U _GLOBAL_OFFSET_TABLE_\n@@ -694,76 +719,64 @@\n          U getpid\n          U ibdebug\n          U mad_rpc\n          U portid2str\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n          U stderr\n \n-serv.c.o:\n+gs.c.o:\n 00000000 r .LC0\n 00000024 r .LC1\n-00000000 r .LC2\n-0000004c r .LC3\n-0000000f r .LC4\n-00000070 r .LC5\n-00000029 r .LC6\n-000000cc r .LC7\n+00000054 r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __fprintf_chk\n 00000000 r __func__.0\n-00000010 r __func__.1\n-00000020 r __func__.2\n-         U __memset_chk\n+00000018 r __func__.1\n          U __stack_chk_fail_local\n-         U calloc\n-         U free\n          U getpid\n          U ibdebug\n-000008f0 T mad_alloc\n-         U mad_build_pkt\n-00000920 T mad_free\n-         U mad_get_field\n-         U mad_get_field64\n-         U mad_get_timeout\n-000006a0 T mad_receive\n-000007d0 T mad_receive_via\n-00000670 T mad_respond\n-00000240 T mad_respond_via\n-00000210 T mad_send\n-00000000 T mad_send_via\n-         U portid2str\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+         U mad_rpc\n+         U mad_set_field\n+000001a0 T performance_reset_via\n+00000000 T pma_query_via\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibmp\n          U stderr\n-         U strerror\n-         U umad_get_mad\n-         U umad_get_mad_addr\n-         U umad_recv\n-         U umad_send\n-         U umad_size\n-         U xdump\n \n-bm.c.o:\n+mad.c.o:\n 00000000 r .LC0\n-00000024 r .LC1\n-00000054 r .LC2\n+00000038 r .LC1\n          U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n          U __fprintf_chk\n 00000000 r __func__.0\n          U __stack_chk_fail_local\n-00000000 T bm_call_via\n          U getpid\n-         U ibdebug\n-         U mad_rpc\n-         U mad_send_via\n-         U portid2str\n+00000460 T mad_build_pkt\n+000000e0 T mad_encode\n+000000b0 T mad_get_retries\n+00000070 T mad_get_timeout\n+         U mad_set_array\n+         U mad_set_field\n+         U mad_set_field64\n+00000000 T mad_trid\n+         U memcpy\n+         U random\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+         U rdmacore52_0_madrpc_retries\n+         U rdmacore52_0_madrpc_timeout\n+         U srandom\n          U stderr\n+         U time\n+00000000 b trid.1\n+         U umad_get_mad\n+         U umad_set_addr\n+         U umad_set_grh\n+         U umad_set_pkey\n \n smp.c.o:\n 00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n          U __fprintf_chk\n 00000000 r __func__.0\n 00000018 r __func__.1\n@@ -780,48 +793,67 @@\n 00000450 T smp_query_status_via\n 000005c0 T smp_query_via\n 00000300 T smp_set\n 00000040 T smp_set_status_via\n 000001b0 T smp_set_via\n          U stderr\n \n-resolve.c.o:\n-00000780 t .L71\n-000006e0 t .L73\n-00000858 t .L74\n-00000848 t .L75\n-00000808 t .L76\n+fields.c.o:\n 00000000 r .LC0\n+00000006 r .LC1\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __fprintf_chk\n-00000014 r __func__.0\n+         U __printf_chk\n+         U __snprintf_chk\n          U __stack_chk_fail_local\n-         U getpid\n-         U ib_path_query_via\n-00000220 T ib_resolve_gid_via\n-00000300 T ib_resolve_guid_via\n-00000930 T ib_resolve_portid_str\n-00000640 T ib_resolve_portid_str_via\n-00000960 T ib_resolve_self\n-000004f0 T ib_resolve_self_via\n-00000110 T ib_resolve_smlid\n-00000000 T ib_resolve_smlid_via\n-         U inet_pton\n-         U mad_decode_field\n-         U mad_encode_field\n-         U mad_set_field64\n+00000000 t _mad_dump\n+00000000 d ib_mad_f\n+00000610 T mad_decode_field\n+         U mad_dump_array\n+00000ae0 T mad_dump_field\n+         U mad_dump_hex\n+         U mad_dump_linkdowndefstate\n+         U mad_dump_linkspeed\n+         U mad_dump_linkspeeden\n+         U mad_dump_linkspeedext\n+         U mad_dump_linkspeedexten\n+         U mad_dump_linkspeedextsup\n+         U mad_dump_linkspeedsup\n+         U mad_dump_linkwidth\n+         U mad_dump_linkwidthen\n+         U mad_dump_linkwidthsup\n+         U mad_dump_mtu\n+         U mad_dump_node_type\n+         U mad_dump_opervls\n+         U mad_dump_physportstate\n+         U mad_dump_portcapmask\n+         U mad_dump_portcapmask2\n+         U mad_dump_portstate\n+         U mad_dump_rhex\n+         U mad_dump_string\n+         U mad_dump_uint\n+00000c90 T mad_dump_val\n+         U mad_dump_vlcap\n+00000830 T mad_encode_field\n+00000d00 T mad_field_name\n+000005a0 T mad_get_array\n+000001a0 T mad_get_field\n+000004b0 T mad_get_field64\n+00000a70 T mad_print_field\n+00000530 T mad_set_array\n+00000310 T mad_set_field\n+000004f0 T mad_set_field64\n+         U memcpy\n 00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibmp\n-         U smp_query_via\n-         U stderr\n-         U str2drpath\n-         U strtol\n-         U strtoull\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+         U rdmacore52_0_mad_dump_linkspeedext2\n+         U rdmacore52_0_mad_dump_linkspeedexten2\n+         U rdmacore52_0_mad_dump_linkspeedextsup2\n+         U strlen\n \n vendor.c.o:\n 00000000 r .LC0\n 00000024 r .LC1\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __fprintf_chk\n@@ -833,39 +865,7 @@\n          U ibdebug\n          U mad_rpc_rmpp\n          U mad_send_via\n          U portid2str\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n          U rdmacore52_0_ibmp\n          U stderr\n-\n-mad.c.o:\n-00000000 r .LC0\n-00000038 r .LC1\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __fprintf_chk\n-00000000 r __func__.0\n-         U __stack_chk_fail_local\n-         U getpid\n-00000460 T mad_build_pkt\n-000000e0 T mad_encode\n-000000b0 T mad_get_retries\n-00000070 T mad_get_timeout\n-         U mad_set_array\n-         U mad_set_field\n-         U mad_set_field64\n-00000000 T mad_trid\n-         U memcpy\n-         U random\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-         U rdmacore52_0_madrpc_retries\n-         U rdmacore52_0_madrpc_timeout\n-         U srandom\n-         U stderr\n-         U time\n-00000000 b trid.1\n-         U umad_get_mad\n-         U umad_set_addr\n-         U umad_set_grh\n-         U umad_set_pkey\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,15 +1,15 @@\n ----------   0        0        0     4978 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0     4492 1970-01-01 00:00:00.000000 portid.c.o\n ?rw-r--r--   0        0        0    13584 1970-01-01 00:00:00.000000 rpc.c.o\n+?rw-r--r--   0        0        0     4492 1970-01-01 00:00:00.000000 portid.c.o\n+?rw-r--r--   0        0        0     6656 1970-01-01 00:00:00.000000 resolve.c.o\n ?rw-r--r--   0        0        0    49844 1970-01-01 00:00:00.000000 dump.c.o\n+?rw-r--r--   0        0        0     2688 1970-01-01 00:00:00.000000 bm.c.o\n+?rw-r--r--   0        0        0     7344 1970-01-01 00:00:00.000000 serv.c.o\n ?rw-r--r--   0        0        0     5832 1970-01-01 00:00:00.000000 register.c.o\n-?rw-r--r--   0        0        0     3300 1970-01-01 00:00:00.000000 gs.c.o\n-?rw-r--r--   0        0        0    42740 1970-01-01 00:00:00.000000 fields.c.o\n ?rw-r--r--   0        0        0     5912 1970-01-01 00:00:00.000000 sa.c.o\n ?rw-r--r--   0        0        0     2700 1970-01-01 00:00:00.000000 cc.c.o\n-?rw-r--r--   0        0        0     7344 1970-01-01 00:00:00.000000 serv.c.o\n-?rw-r--r--   0        0        0     2688 1970-01-01 00:00:00.000000 bm.c.o\n+?rw-r--r--   0        0        0     3300 1970-01-01 00:00:00.000000 gs.c.o\n+?rw-r--r--   0        0        0     5496 1970-01-01 00:00:00.000000 mad.c.o\n ?rw-r--r--   0        0        0     5256 1970-01-01 00:00:00.000000 smp.c.o\n-?rw-r--r--   0        0        0     6656 1970-01-01 00:00:00.000000 resolve.c.o\n+?rw-r--r--   0        0        0    42740 1970-01-01 00:00:00.000000 fields.c.o\n ?rw-r--r--   0        0        0     3516 1970-01-01 00:00:00.000000 vendor.c.o\n-?rw-r--r--   0        0        0     5496 1970-01-01 00:00:00.000000 mad.c.o\n"}]}]}]}]}, {"source1": "libibnetdisc-dev_52.0-2_i386.deb", "source2": "libibnetdisc-dev_52.0-2_i386.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r--   0        0        0        4 2024-06-27 11:49:34.000000 debian-binary\n--rw-r--r--   0        0        0     1076 2024-06-27 11:49:34.000000 control.tar.xz\n--rw-r--r--   0        0        0    48752 2024-06-27 11:49:34.000000 data.tar.xz\n+-rw-r--r--   0        0        0     1072 2024-06-27 11:49:34.000000 control.tar.xz\n+-rw-r--r--   0        0        0    48764 2024-06-27 11:49:34.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/i386-linux-gnu/libibnetdisc.a", "source2": "./usr/lib/i386-linux-gnu/libibnetdisc.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,20 +1,30 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in query_smp.c.o\n+rdmacore52_0_issue_smp in query_smp.c.o\n+rdmacore52_0_smp_engine_init in query_smp.c.o\n+rdmacore52_0_smp_engine_destroy in query_smp.c.o\n+rdmacore52_0_process_mads in query_smp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ibnetdisc_cache.c.o\n rdmacore52_0___x86.get_pc_thunk.si in ibnetdisc_cache.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in ibnetdisc_cache.c.o\n ibnd_load_fabric in ibnetdisc_cache.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in ibnetdisc_cache.c.o\n ibnd_cache_fabric in ibnetdisc_cache.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in query_smp.c.o\n-rdmacore52_0_issue_smp in query_smp.c.o\n-rdmacore52_0_smp_engine_init in query_smp.c.o\n-rdmacore52_0_smp_engine_destroy in query_smp.c.o\n-rdmacore52_0_process_mads in query_smp.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in chassis.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in chassis.c.o\n+ibnd_get_chassis_type in chassis.c.o\n+ibnd_get_chassis_slot_str in chassis.c.o\n+ibnd_is_xsigo_guid in chassis.c.o\n+ibnd_is_xsigo_hca in chassis.c.o\n+ibnd_is_xsigo_tca in chassis.c.o\n+ibnd_get_chassis_guid in chassis.c.o\n+rdmacore52_0_group_nodes in chassis.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in chassis.c.o\n rdmacore52_0___x86.get_pc_thunk.si in ibnetdisc.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ibnetdisc.c.o\n ibnd_find_node_guid in ibnetdisc.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in ibnetdisc.c.o\n rdmacore52_0_add_to_nodeguid_hash in ibnetdisc.c.o\n rdmacore52_0___x86.get_pc_thunk.di in ibnetdisc.c.o\n rdmacore52_0_add_to_portguid_hash in ibnetdisc.c.o\n@@ -39,66 +49,107 @@\n ibnd_get_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_get_agg_linkspeedextsup in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext in ibnetdisc.c.o\n rdmacore52_0_mlnx_ext_port_info_err in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext_bits in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedextsup in ibnetdisc.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in chassis.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in chassis.c.o\n-ibnd_get_chassis_type in chassis.c.o\n-ibnd_get_chassis_slot_str in chassis.c.o\n-ibnd_is_xsigo_guid in chassis.c.o\n-ibnd_is_xsigo_hca in chassis.c.o\n-ibnd_is_xsigo_tca in chassis.c.o\n-ibnd_get_chassis_guid in chassis.c.o\n-rdmacore52_0_group_nodes in chassis.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in chassis.c.o\n-rdmacore52_0_close_node_name_map in node_name_map.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in node_name_map.c.o\n-rdmacore52_0_remap_node_name in node_name_map.c.o\n-rdmacore52_0_clean_nodedesc in node_name_map.c.o\n-rdmacore52_0_open_node_name_map in node_name_map.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in node_name_map.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in mmio.c.o\n rdmacore52_0___x86.get_pc_thunk.si in mmio.c.o\n mmio_write64_be in mmio.c.o\n-rdmacore52_0_cl_qmap_init in cl_map.c.o\n-rdmacore52_0_cl_qmap_get in cl_map.c.o\n-rdmacore52_0_cl_qmap_get_next in cl_map.c.o\n-rdmacore52_0_cl_qmap_apply_func in cl_map.c.o\n-rdmacore52_0_cl_qmap_insert in cl_map.c.o\n-rdmacore52_0_cl_qmap_remove_item in cl_map.c.o\n-rdmacore52_0_cl_qmap_remove in cl_map.c.o\n-rdmacore52_0_cl_qmap_merge in cl_map.c.o\n-rdmacore52_0_cl_qmap_delta in cl_map.c.o\n-rdmacore52_0_bitmap_find_first_bit in bitmap.c.o\n-rdmacore52_0_bitmap_zero_region in bitmap.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in bitmap.c.o\n-rdmacore52_0_bitmap_fill_region in bitmap.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in bitmap.c.o\n-rdmacore52_0_bitmap_find_free_region in bitmap.c.o\n rdmacore52_0_rdmanl_socket_alloc in rdma_nl.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_devices in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_chardev in rdma_nl.c.o\n rdmacore52_0_rdmanl_policy in rdma_nl.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in open_cdev.c.o\n-rdmacore52_0_open_cdev in open_cdev.c.o\n+rdmacore52_0_bitmap_find_first_bit in bitmap.c.o\n+rdmacore52_0_bitmap_zero_region in bitmap.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in bitmap.c.o\n+rdmacore52_0_bitmap_fill_region in bitmap.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in bitmap.c.o\n+rdmacore52_0_bitmap_find_free_region in bitmap.c.o\n rdmacore52_0_set_fd_nonblock in util.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in util.c.o\n rdmacore52_0_get_random in util.c.o\n rdmacore52_0_check_env in util.c.o\n rdmacore52_0_xorshift32 in util.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in open_cdev.c.o\n+rdmacore52_0_open_cdev in open_cdev.c.o\n+rdmacore52_0_close_node_name_map in node_name_map.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in node_name_map.c.o\n+rdmacore52_0_remap_node_name in node_name_map.c.o\n+rdmacore52_0_clean_nodedesc in node_name_map.c.o\n+rdmacore52_0_open_node_name_map in node_name_map.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in node_name_map.c.o\n rdmacore52_0_iset_create in interval_set.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in interval_set.c.o\n rdmacore52_0_iset_destroy in interval_set.c.o\n rdmacore52_0_iset_insert_range in interval_set.c.o\n rdmacore52_0_iset_alloc_range in interval_set.c.o\n+rdmacore52_0_cl_qmap_init in cl_map.c.o\n+rdmacore52_0_cl_qmap_get in cl_map.c.o\n+rdmacore52_0_cl_qmap_get_next in cl_map.c.o\n+rdmacore52_0_cl_qmap_apply_func in cl_map.c.o\n+rdmacore52_0_cl_qmap_insert in cl_map.c.o\n+rdmacore52_0_cl_qmap_remove_item in cl_map.c.o\n+rdmacore52_0_cl_qmap_remove in cl_map.c.o\n+rdmacore52_0_cl_qmap_merge in cl_map.c.o\n+rdmacore52_0_cl_qmap_delta in cl_map.c.o\n+\n+query_smp.c.o:\n+00000000 r .LC0\n+0000001b r .LC1\n+000000bc r .LC10\n+000000e4 r .LC11\n+00000114 r .LC12\n+00000093 r .LC13\n+0000014c r .LC14\n+00000000 r .LC2\n+00000039 r .LC3\n+00000051 r .LC4\n+00000024 r .LC5\n+00000058 r .LC6\n+0000008c r .LC7\n+0000006e r .LC8\n+0000007a r .LC9\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __fprintf_chk\n+         U __memset_chk\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U mad_build_pkt\n+         U mad_get_field\n+         U mad_get_field64\n+         U mad_trid\n+         U portid2str\n+00000160 t process_one_recv\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_cl_qmap_init\n+         U rdmacore52_0_cl_qmap_insert\n+         U rdmacore52_0_cl_qmap_remove\n+         U rdmacore52_0_cl_qmap_remove_item\n+00000440 T rdmacore52_0_issue_smp\n+         U rdmacore52_0_mlnx_ext_port_info_err\n+000008b0 T rdmacore52_0_process_mads\n+000007a0 T rdmacore52_0_smp_engine_destroy\n+00000630 T rdmacore52_0_smp_engine_init\n+00000000 t send_smp\n+         U stderr\n+         U strerror\n+         U umad_close_port\n+         U umad_get_mad\n+         U umad_init\n+         U umad_open_port\n+         U umad_recv\n+         U umad_register\n+         U umad_send\n+         U umad_size\n+         U umad_status\n \n ibnetdisc_cache.c.o:\n 00000000 r .LC0\n 00000000 r .LC1\n 00000078 r .LC10\n 00000090 r .LC11\n 000000a2 r .LC12\n@@ -161,64 +212,91 @@\n          U rdmacore52_0_group_nodes\n          U read\n          U stat64\n          U strerror\n          U unlink\n          U write\n \n-query_smp.c.o:\n+chassis.c.o:\n 00000000 r .LC0\n-0000001b r .LC1\n-000000bc r .LC10\n-000000e4 r .LC11\n-00000114 r .LC12\n-00000093 r .LC13\n-0000014c r .LC14\n-00000000 r .LC2\n-00000039 r .LC3\n-00000051 r .LC4\n-00000024 r .LC5\n-00000058 r .LC6\n-0000008c r .LC7\n-0000006e r .LC8\n-0000007a r .LC9\n+00000019 r .LC1\n+00000030 r .LC10\n+00000064 r .LC11\n+000000b4 r .LC12\n+00000120 r .LC13\n+0000018c r .LC14\n+000001fc r .LC15\n+00000264 r .LC16\n+000002c8 r .LC17\n+000002ec r .LC18\n+00000334 r .LC19\n+00000374 r .LC20\n+00000000 r .LC3\n+00000030 r .LC6\n+00000041 r .LC7\n+0000005d r .LC8\n+0000006b r .LC9\n+00000000 d ChassisSlotTypeStr\n+00000010 d ChassisTypeStr\n          U _GLOBAL_OFFSET_TABLE_\n+00000000 r __FUNCTION__.0\n          U __fprintf_chk\n-         U __memset_chk\n+         U __printf_chk\n+         U __snprintf_chk\n          U __stack_chk_fail_local\n+000007a0 r anafa_line_slot_2_sfb12\n+00000720 r anafa_line_slot_2_sfb18\n+000006a0 r anafa_line_slot_2_sfb18x2\n+00000820 r anafa_line_slot_2_sfb4\n+00000720 r anafa_line_slot_2_sfb4200\n+000006a0 r anafa_sfb4200_slot_2_slb\n+000005a0 r anafa_spine12_slot_2_slb\n+000006a0 r anafa_spine18_slot_2_slb\n+000004e0 r anafa_spine18x2_slot_2_slb\n+00000560 r anafa_spine4_slot_2_slb\n          U calloc\n          U free\n-         U mad_build_pkt\n+000000e0 t get_chassisguid\n+00000340 t get_router_slot.isra.0\n+00000240 t get_spine_index\n+         U ibdebug\n+00000b60 T ibnd_get_chassis_guid\n+00000a30 T ibnd_get_chassis_slot_str\n+00000980 T ibnd_get_chassis_type\n+00000b00 T ibnd_is_xsigo_guid\n+00000b20 T ibnd_is_xsigo_hca\n+00000b40 T ibnd_is_xsigo_tca\n+00000020 r int2ext_map_sfb4700x2\n+00000200 r int2ext_map_slb2024\n+000003c0 r int2ext_map_slb24\n+00000160 r int2ext_map_slb4018\n+000002e0 r int2ext_map_slb8\n+00000620 r ipr_slot_2_sfb4_port\n+000004e0 t is_line\n+00000000 t is_spine\n+000007e0 r line_slot_2_sfb12\n+00000760 r line_slot_2_sfb18\n+000006e0 r line_slot_2_sfb18x2\n+00000860 r line_slot_2_sfb4\n+00000660 r line_slot_2_sfb4200\n          U mad_get_field\n          U mad_get_field64\n-         U mad_trid\n-         U portid2str\n-00000160 t process_one_recv\n+00000580 t pass_on_lines_catch_spines\n+00000720 t pass_on_spines_catch_lines\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_cl_qmap_init\n-         U rdmacore52_0_cl_qmap_insert\n-         U rdmacore52_0_cl_qmap_remove\n-         U rdmacore52_0_cl_qmap_remove_item\n-00000440 T rdmacore52_0_issue_smp\n-         U rdmacore52_0_mlnx_ext_port_info_err\n-000008b0 T rdmacore52_0_process_mads\n-000007a0 T rdmacore52_0_smp_engine_destroy\n-00000630 T rdmacore52_0_smp_engine_init\n-00000000 t send_smp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+00000bf0 T rdmacore52_0_group_nodes\n+000004a0 r sfb4200_slot_2_slb\n+000005e0 r spine12_slot_2_slb\n+00000520 r spine18_slot_2_slb\n+000005e0 r spine4_slot_2_slb\n          U stderr\n-         U strerror\n-         U umad_close_port\n-         U umad_get_mad\n-         U umad_init\n-         U umad_open_port\n-         U umad_recv\n-         U umad_register\n-         U umad_send\n-         U umad_size\n-         U umad_status\n+         U strncpy\n+         U strtol\n \n ibnetdisc.c.o:\n 00001c00 t .L392\n 00001c90 t .L393\n 00001c80 t .L395\n 00001c70 t .L396\n 00001c60 t .L397\n@@ -338,163 +416,28 @@\n 00002110 t recv_port_info\n 00000040 t recv_switch_info\n          U smp_mkey_set\n          U snprintf\n          U stderr\n          U str2drpath\n \n-chassis.c.o:\n-00000000 r .LC0\n-00000019 r .LC1\n-00000030 r .LC10\n-00000064 r .LC11\n-000000b4 r .LC12\n-00000120 r .LC13\n-0000018c r .LC14\n-000001fc r .LC15\n-00000264 r .LC16\n-000002c8 r .LC17\n-000002ec r .LC18\n-00000334 r .LC19\n-00000374 r .LC20\n-00000000 r .LC3\n-00000030 r .LC6\n-00000041 r .LC7\n-0000005d r .LC8\n-0000006b r .LC9\n-00000000 d ChassisSlotTypeStr\n-00000010 d ChassisTypeStr\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 r __FUNCTION__.0\n-         U __fprintf_chk\n-         U __printf_chk\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-000007a0 r anafa_line_slot_2_sfb12\n-00000720 r anafa_line_slot_2_sfb18\n-000006a0 r anafa_line_slot_2_sfb18x2\n-00000820 r anafa_line_slot_2_sfb4\n-00000720 r anafa_line_slot_2_sfb4200\n-000006a0 r anafa_sfb4200_slot_2_slb\n-000005a0 r anafa_spine12_slot_2_slb\n-000006a0 r anafa_spine18_slot_2_slb\n-000004e0 r anafa_spine18x2_slot_2_slb\n-00000560 r anafa_spine4_slot_2_slb\n-         U calloc\n-         U free\n-000000e0 t get_chassisguid\n-00000340 t get_router_slot.isra.0\n-00000240 t get_spine_index\n-         U ibdebug\n-00000b60 T ibnd_get_chassis_guid\n-00000a30 T ibnd_get_chassis_slot_str\n-00000980 T ibnd_get_chassis_type\n-00000b00 T ibnd_is_xsigo_guid\n-00000b20 T ibnd_is_xsigo_hca\n-00000b40 T ibnd_is_xsigo_tca\n-00000020 r int2ext_map_sfb4700x2\n-00000200 r int2ext_map_slb2024\n-000003c0 r int2ext_map_slb24\n-00000160 r int2ext_map_slb4018\n-000002e0 r int2ext_map_slb8\n-00000620 r ipr_slot_2_sfb4_port\n-000004e0 t is_line\n-00000000 t is_spine\n-000007e0 r line_slot_2_sfb12\n-00000760 r line_slot_2_sfb18\n-000006e0 r line_slot_2_sfb18x2\n-00000860 r line_slot_2_sfb4\n-00000660 r line_slot_2_sfb4200\n-         U mad_get_field\n-         U mad_get_field64\n-00000580 t pass_on_lines_catch_spines\n-00000720 t pass_on_spines_catch_lines\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-00000bf0 T rdmacore52_0_group_nodes\n-000004a0 r sfb4200_slot_2_slb\n-000005e0 r spine12_slot_2_slb\n-00000520 r spine18_slot_2_slb\n-000005e0 r spine4_slot_2_slb\n-         U stderr\n-         U strncpy\n-         U strtol\n-\n-node_name_map.c.o:\n-00000000 r .LC0\n-0000001b r .LC1\n-0000001d r .LC2\n-00000000 r .LC3\n-00000020 r .LC4\n-0000002c r .LC5\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __ctype_b_loc\n-         U __errno_location\n-         U __fprintf_chk\n-         U __stack_chk_fail_local\n-         U fclose\n-         U fgets\n-         U fopen64\n-         U free\n-         U malloc\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_cl_qmap_get\n-         U rdmacore52_0_cl_qmap_init\n-         U rdmacore52_0_cl_qmap_insert\n-         U rdmacore52_0_cl_qmap_remove\n-00000140 T rdmacore52_0_clean_nodedesc\n-00000000 T rdmacore52_0_close_node_name_map\n-000001c0 T rdmacore52_0_open_node_name_map\n-00000070 T rdmacore52_0_remap_node_name\n-         U stat64\n-         U stderr\n-         U strchr\n-         U strdup\n-         U strerror\n-         U strncpy\n-         U strtok\n-         U strtoull\n-\n mmio.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 t lock_constructor\n 00000000 b mmio_spinlock\n 00000080 i mmio_write64_be\n 00000000 t pthread_mmio_write64_be\n          U pthread_spin_init\n          U pthread_spin_lock\n          U pthread_spin_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.si\n 00000080 t resolve_mmio_write64_be\n 00000050 t sse_mmio_write64_be\n \n-cl_map.c.o:\n-00000150 T rdmacore52_0_cl_qmap_apply_func\n-00000d80 T rdmacore52_0_cl_qmap_delta\n-00000060 T rdmacore52_0_cl_qmap_get\n-000000f0 T rdmacore52_0_cl_qmap_get_next\n-00000000 T rdmacore52_0_cl_qmap_init\n-00000190 T rdmacore52_0_cl_qmap_insert\n-000008b0 T rdmacore52_0_cl_qmap_merge\n-00000820 T rdmacore52_0_cl_qmap_remove\n-00000430 T rdmacore52_0_cl_qmap_remove_item\n-\n-bitmap.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U memset\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000150 T rdmacore52_0_bitmap_fill_region\n-00000000 T rdmacore52_0_bitmap_find_first_bit\n-00000210 T rdmacore52_0_bitmap_find_free_region\n-00000070 T rdmacore52_0_bitmap_zero_region\n-\n rdma_nl.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n          U nl_connect\n          U nl_recvmsgs_default\n          U nl_send_auto\n          U nl_send_simple\n@@ -512,14 +455,38 @@\n 00000070 T rdmacore52_0_rdmanl_get_copy_on_fork\n 00000140 T rdmacore52_0_rdmanl_get_devices\n 00000000 D rdmacore52_0_rdmanl_policy\n 00000010 T rdmacore52_0_rdmanl_socket_alloc\n 00000000 t rdmanl_saw_err_cb\n          U strlen\n \n+bitmap.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U memset\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000150 T rdmacore52_0_bitmap_fill_region\n+00000000 T rdmacore52_0_bitmap_find_first_bit\n+00000210 T rdmacore52_0_bitmap_find_free_region\n+00000070 T rdmacore52_0_bitmap_zero_region\n+\n+util.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U fcntl64\n+         U getenv\n+         U getrandom\n+         U rand_r\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+000000f0 T rdmacore52_0_check_env\n+00000060 T rdmacore52_0_get_random\n+00000000 T rdmacore52_0_set_fd_nonblock\n+00000130 T rdmacore52_0_xorshift32\n+00000000 b seed.0\n+         U time\n+\n open_cdev.c.o:\n 00000000 r .LC0\n 00000010 r .LC1\n 0000001b r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __asprintf_chk\n          U __stack_chk_fail_local\n@@ -533,34 +500,67 @@\n          U poll\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000450 T rdmacore52_0_open_cdev\n          U read\n          U timerfd_create\n          U timerfd_settime\n \n-util.c.o:\n+node_name_map.c.o:\n+00000000 r .LC0\n+0000001b r .LC1\n+0000001d r .LC2\n+00000000 r .LC3\n+00000020 r .LC4\n+0000002c r .LC5\n          U _GLOBAL_OFFSET_TABLE_\n-         U fcntl64\n-         U getenv\n-         U getrandom\n-         U rand_r\n+         U __ctype_b_loc\n+         U __errno_location\n+         U __fprintf_chk\n+         U __stack_chk_fail_local\n+         U fclose\n+         U fgets\n+         U fopen64\n+         U free\n+         U malloc\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-000000f0 T rdmacore52_0_check_env\n-00000060 T rdmacore52_0_get_random\n-00000000 T rdmacore52_0_set_fd_nonblock\n-00000130 T rdmacore52_0_xorshift32\n-00000000 b seed.0\n-         U time\n+         U rdmacore52_0_cl_qmap_get\n+         U rdmacore52_0_cl_qmap_init\n+         U rdmacore52_0_cl_qmap_insert\n+         U rdmacore52_0_cl_qmap_remove\n+00000140 T rdmacore52_0_clean_nodedesc\n+00000000 T rdmacore52_0_close_node_name_map\n+000001c0 T rdmacore52_0_open_node_name_map\n+00000070 T rdmacore52_0_remap_node_name\n+         U stat64\n+         U stderr\n+         U strchr\n+         U strdup\n+         U strerror\n+         U strncpy\n+         U strtok\n+         U strtoull\n \n interval_set.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U calloc\n          U free\n          U pthread_mutex_init\n          U pthread_mutex_lock\n          U pthread_mutex_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 000003f0 T rdmacore52_0_iset_alloc_range\n 00000000 T rdmacore52_0_iset_create\n 00000050 T rdmacore52_0_iset_destroy\n 000000a0 T rdmacore52_0_iset_insert_range\n+\n+cl_map.c.o:\n+00000150 T rdmacore52_0_cl_qmap_apply_func\n+00000d80 T rdmacore52_0_cl_qmap_delta\n+00000060 T rdmacore52_0_cl_qmap_get\n+000000f0 T rdmacore52_0_cl_qmap_get_next\n+00000000 T rdmacore52_0_cl_qmap_init\n+00000190 T rdmacore52_0_cl_qmap_insert\n+000008b0 T rdmacore52_0_cl_qmap_merge\n+00000820 T rdmacore52_0_cl_qmap_remove\n+00000430 T rdmacore52_0_cl_qmap_remove_item\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,14 +1,14 @@\n ----------   0        0        0     3122 1970-01-01 00:00:00.000000 /\n ----------   0        0        0        0 1970-01-01 00:00:00.000000 //\n-?rw-r--r--   0        0        0    15812 1970-01-01 00:00:00.000000 ibnetdisc_cache.c.o\n ?rw-r--r--   0        0        0     7072 1970-01-01 00:00:00.000000 query_smp.c.o\n-?rw-r--r--   0        0        0    30028 1970-01-01 00:00:00.000000 ibnetdisc.c.o\n+?rw-r--r--   0        0        0    15812 1970-01-01 00:00:00.000000 ibnetdisc_cache.c.o\n ?rw-r--r--   0        0        0    20900 1970-01-01 00:00:00.000000 chassis.c.o\n-?rw-r--r--   0        0        0     4884 1970-01-01 00:00:00.000000 node_name_map.c.o\n+?rw-r--r--   0        0        0    30028 1970-01-01 00:00:00.000000 ibnetdisc.c.o\n ?rw-r--r--   0        0        0     2260 1970-01-01 00:00:00.000000 mmio.c.o\n-?rw-r--r--   0        0        0     5724 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r--   0        0        0     2552 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r--   0        0        0     4084 1970-01-01 00:00:00.000000 rdma_nl.c.o\n-?rw-r--r--   0        0        0     3804 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r--   0        0        0     2552 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r--   0        0        0     1984 1970-01-01 00:00:00.000000 util.c.o\n+?rw-r--r--   0        0        0     3804 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r--   0        0        0     4884 1970-01-01 00:00:00.000000 node_name_map.c.o\n ?rw-r--r--   0        0        0     3584 1970-01-01 00:00:00.000000 interval_set.c.o\n+?rw-r--r--   0        0        0     5724 1970-01-01 00:00:00.000000 cl_map.c.o\n"}]}]}]}]}, {"source1": "libibumad-dev_52.0-2_i386.deb", "source2": "libibumad-dev_52.0-2_i386.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r--   0        0        0        4 2024-06-27 11:49:34.000000 debian-binary\n -rw-r--r--   0        0        0     1844 2024-06-27 11:49:34.000000 control.tar.xz\n--rw-r--r--   0        0        0    55272 2024-06-27 11:49:34.000000 data.tar.xz\n+-rw-r--r--   0        0        0    55248 2024-06-27 11:49:34.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/i386-linux-gnu/libibumad.a", "source2": "./usr/lib/i386-linux-gnu/libibumad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,22 @@\n \n Archive index:\n+umad_class_str in umad_str.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in umad_str.c.o\n+umad_method_str in umad_str.c.o\n+umad_common_mad_status_str in umad_str.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in umad_str.c.o\n+umad_sa_mad_status_str in umad_str.c.o\n+umad_attribute_str in umad_str.c.o\n+rdmacore52_0_sys_read_string in sysfs.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in sysfs.c.o\n+rdmacore52_0_sys_read_guid in sysfs.c.o\n+rdmacore52_0_sys_read_gid in sysfs.c.o\n+rdmacore52_0_sys_read_uint64 in sysfs.c.o\n+rdmacore52_0_sys_read_uint in sysfs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in umad.c.o\n umad_init in umad.c.o\n umad_done in umad.c.o\n umad_get_cas_names in umad.c.o\n umad_release_ca in umad.c.o\n umad_release_port in umad.c.o\n umad_close_port in umad.c.o\n@@ -34,27 +47,233 @@\n umad_get_ca_device_list in umad.c.o\n umad_get_issm_path in umad.c.o\n umad_open_port in umad.c.o\n umad_get_ca in umad.c.o\n umad_get_ca_portguids in umad.c.o\n umad_get_port in umad.c.o\n umad_free_ca_device_list in umad.c.o\n-rdmacore52_0_sys_read_string in sysfs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in sysfs.c.o\n-rdmacore52_0_sys_read_guid in sysfs.c.o\n-rdmacore52_0_sys_read_gid in sysfs.c.o\n-rdmacore52_0_sys_read_uint64 in sysfs.c.o\n-rdmacore52_0_sys_read_uint in sysfs.c.o\n-umad_class_str in umad_str.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in umad_str.c.o\n-umad_method_str in umad_str.c.o\n-umad_common_mad_status_str in umad_str.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in umad_str.c.o\n-umad_sa_mad_status_str in umad_str.c.o\n-umad_attribute_str in umad_str.c.o\n+\n+umad_str.c.o:\n+00000070 t .L10\n+000005d8 t .L100\n+000005e0 t .L101\n+000005e8 t .L102\n+000005f0 t .L103\n+000005f8 t .L104\n+00000600 t .L105\n+00000608 t .L106\n+00000610 t .L107\n+00000618 t .L108\n+00000620 t .L109\n+00000060 t .L11\n+00000628 t .L110\n+00000630 t .L111\n+00000638 t .L112\n+00000648 t .L114\n+000004c0 t .L116\n+00000680 t .L117\n+00000670 t .L119\n+00000050 t .L12\n+00000678 t .L120\n+00000650 t .L121\n+00000658 t .L122\n+00000660 t .L123\n+00000668 t .L124\n+000006b0 t .L125\n+000006b8 t .L126\n+000006c0 t .L127\n+000006c8 t .L128\n+000006d0 t .L129\n+00000040 t .L13\n+000006d8 t .L130\n+000006e0 t .L131\n+000006e8 t .L132\n+00000690 t .L133\n+00000698 t .L134\n+000006a0 t .L135\n+000006a8 t .L136\n+00000688 t .L137\n+000006f8 t .L138\n+00000118 t .L14\n+00000520 t .L140\n+00000530 t .L142\n+00000510 t .L143\n+00000560 t .L144\n+00000550 t .L145\n+00000540 t .L146\n+000005a0 t .L147\n+00000590 t .L148\n+00000580 t .L149\n+00000108 t .L15\n+00000570 t .L150\n+000005b0 t .L151\n+000004f0 t .L152\n+00000640 t .L153\n+000006f0 t .L157\n+00000500 t .L162\n+000000f8 t .L17\n+00000220 t .L31\n+00000230 t .L32\n+00000240 t .L33\n+00000250 t .L34\n+00000210 t .L37\n+000000d0 t .L4\n+00000260 t .L43\n+000000b0 t .L5\n+00000270 t .L57\n+000000a0 t .L7\n+00000370 t .L77\n+00000390 t .L79\n+00000090 t .L8\n+00000380 t .L80\n+000003d0 t .L81\n+000003c0 t .L82\n+000003b0 t .L83\n+000003a0 t .L84\n+00000360 t .L86\n+00000358 t .L87\n+00000080 t .L9\n+00000445 t .L93\n+000005b8 t .L95\n+000005c0 t .L97\n+000005c8 t .L98\n+000005d0 t .L99\n+00000000 r .LC0\n+00000005 r .LC1\n+0000003d r .LC10\n+00000512 r .LC100\n+0000051c r .LC101\n+0000052a r .LC102\n+00000542 r .LC103\n+00000051 r .LC11\n+00000058 r .LC12\n+00000064 r .LC13\n+0000006c r .LC14\n+00000079 r .LC15\n+00000081 r .LC16\n+00000088 r .LC17\n+0000008c r .LC18\n+00000095 r .LC19\n+0000000f r .LC2\n+000000a1 r .LC20\n+000000ac r .LC21\n+000000b3 r .LC22\n+000000b8 r .LC23\n+000000bd r .LC24\n+000000c6 r .LC25\n+000000ca r .LC26\n+000000d8 r .LC27\n+000000e5 r .LC28\n+000000ee r .LC29\n+00000014 r .LC3\n+000000f9 r .LC30\n+000000fe r .LC31\n+00000113 r .LC32\n+0000011f r .LC33\n+00000000 r .LC34\n+00000028 r .LC35\n+00000134 r .LC36\n+0000013c r .LC37\n+00000149 r .LC38\n+00000159 r .LC39\n+00000017 r .LC4\n+00000164 r .LC40\n+00000175 r .LC41\n+00000181 r .LC42\n+00000199 r .LC43\n+000001a8 r .LC44\n+000001bb r .LC45\n+000001cb r .LC46\n+000001d6 r .LC47\n+000001df r .LC48\n+000001ee r .LC49\n+0000001e r .LC5\n+00000201 r .LC50\n+0000020c r .LC51\n+00000215 r .LC52\n+0000021e r .LC53\n+0000022d r .LC54\n+00000239 r .LC55\n+0000024c r .LC56\n+0000025c r .LC57\n+00000270 r .LC58\n+00000285 r .LC59\n+00000025 r .LC6\n+0000029b r .LC60\n+000002ad r .LC61\n+000002c1 r .LC62\n+000002d1 r .LC63\n+000002e1 r .LC64\n+000002f3 r .LC65\n+000002fe r .LC66\n+0000030b r .LC67\n+00000319 r .LC68\n+00000324 r .LC69\n+0000002a r .LC7\n+0000032c r .LC70\n+00000337 r .LC71\n+00000342 r .LC72\n+00000358 r .LC73\n+0000036f r .LC74\n+0000037f r .LC75\n+0000004c r .LC76\n+00000393 r .LC77\n+000003ac r .LC78\n+000003bc r .LC79\n+00000031 r .LC8\n+000003c8 r .LC80\n+000003d7 r .LC81\n+000003f0 r .LC82\n+000003fb r .LC83\n+0000040c r .LC84\n+0000041a r .LC85\n+00000429 r .LC86\n+00000434 r .LC87\n+00000445 r .LC88\n+0000006c r .LC89\n+00000039 r .LC9\n+00000452 r .LC90\n+0000046e r .LC91\n+0000048a r .LC92\n+0000049b r .LC93\n+000004b4 r .LC94\n+000004c4 r .LC95\n+000004dd r .LC96\n+000004e4 r .LC97\n+000004eb r .LC98\n+00000501 r .LC99\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+000003e0 T umad_attribute_str\n+00000000 T umad_class_str\n+000002b0 T umad_common_mad_status_str\n+00000150 T umad_method_str\n+00000330 T umad_sa_mad_status_str\n+\n+sysfs.c.o:\n+00000000 r .LC0\n+00000006 r .LC1\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U close\n+         U open64\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+000001f0 T rdmacore52_0_sys_read_gid\n+00000110 T rdmacore52_0_sys_read_guid\n+00000000 T rdmacore52_0_sys_read_string\n+000003f0 T rdmacore52_0_sys_read_uint\n+000002b0 T rdmacore52_0_sys_read_uint64\n+         U read\n+         U strrchr\n+         U strsep\n+         U strtoul\n+         U strtoull\n \n umad.c.o:\n 00000000 r .LC0\n 00000016 r .LC1\n 0000004d r .LC10\n 00000053 r .LC11\n 00000057 r .LC12\n@@ -250,226 +469,7 @@\n 00001120 T umad_set_pkey\n 000010b0 T umad_size\n 000028f0 T umad_sort_ca_device_list\n 00002250 T umad_status\n 000021d0 T umad_unregister\n 00000008 b umaddebug\n          U write\n-\n-sysfs.c.o:\n-00000000 r .LC0\n-00000006 r .LC1\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U close\n-         U open64\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-000001f0 T rdmacore52_0_sys_read_gid\n-00000110 T rdmacore52_0_sys_read_guid\n-00000000 T rdmacore52_0_sys_read_string\n-000003f0 T rdmacore52_0_sys_read_uint\n-000002b0 T rdmacore52_0_sys_read_uint64\n-         U read\n-         U strrchr\n-         U strsep\n-         U strtoul\n-         U strtoull\n-\n-umad_str.c.o:\n-00000070 t .L10\n-000005d8 t .L100\n-000005e0 t .L101\n-000005e8 t .L102\n-000005f0 t .L103\n-000005f8 t .L104\n-00000600 t .L105\n-00000608 t .L106\n-00000610 t .L107\n-00000618 t .L108\n-00000620 t .L109\n-00000060 t .L11\n-00000628 t .L110\n-00000630 t .L111\n-00000638 t .L112\n-00000648 t .L114\n-000004c0 t .L116\n-00000680 t .L117\n-00000670 t .L119\n-00000050 t .L12\n-00000678 t .L120\n-00000650 t .L121\n-00000658 t .L122\n-00000660 t .L123\n-00000668 t .L124\n-000006b0 t .L125\n-000006b8 t .L126\n-000006c0 t .L127\n-000006c8 t .L128\n-000006d0 t .L129\n-00000040 t .L13\n-000006d8 t .L130\n-000006e0 t .L131\n-000006e8 t .L132\n-00000690 t .L133\n-00000698 t .L134\n-000006a0 t .L135\n-000006a8 t .L136\n-00000688 t .L137\n-000006f8 t .L138\n-00000118 t .L14\n-00000520 t .L140\n-00000530 t .L142\n-00000510 t .L143\n-00000560 t .L144\n-00000550 t .L145\n-00000540 t .L146\n-000005a0 t .L147\n-00000590 t .L148\n-00000580 t .L149\n-00000108 t .L15\n-00000570 t .L150\n-000005b0 t .L151\n-000004f0 t .L152\n-00000640 t .L153\n-000006f0 t .L157\n-00000500 t .L162\n-000000f8 t .L17\n-00000220 t .L31\n-00000230 t .L32\n-00000240 t .L33\n-00000250 t .L34\n-00000210 t .L37\n-000000d0 t .L4\n-00000260 t .L43\n-000000b0 t .L5\n-00000270 t .L57\n-000000a0 t .L7\n-00000370 t .L77\n-00000390 t .L79\n-00000090 t .L8\n-00000380 t .L80\n-000003d0 t .L81\n-000003c0 t .L82\n-000003b0 t .L83\n-000003a0 t .L84\n-00000360 t .L86\n-00000358 t .L87\n-00000080 t .L9\n-00000445 t .L93\n-000005b8 t .L95\n-000005c0 t .L97\n-000005c8 t .L98\n-000005d0 t .L99\n-00000000 r .LC0\n-00000005 r .LC1\n-0000003d r .LC10\n-00000512 r .LC100\n-0000051c r .LC101\n-0000052a r .LC102\n-00000542 r .LC103\n-00000051 r .LC11\n-00000058 r .LC12\n-00000064 r .LC13\n-0000006c r .LC14\n-00000079 r .LC15\n-00000081 r .LC16\n-00000088 r .LC17\n-0000008c r .LC18\n-00000095 r .LC19\n-0000000f r .LC2\n-000000a1 r .LC20\n-000000ac r .LC21\n-000000b3 r .LC22\n-000000b8 r .LC23\n-000000bd r .LC24\n-000000c6 r .LC25\n-000000ca r .LC26\n-000000d8 r .LC27\n-000000e5 r .LC28\n-000000ee r .LC29\n-00000014 r .LC3\n-000000f9 r .LC30\n-000000fe r .LC31\n-00000113 r .LC32\n-0000011f r .LC33\n-00000000 r .LC34\n-00000028 r .LC35\n-00000134 r .LC36\n-0000013c r .LC37\n-00000149 r .LC38\n-00000159 r .LC39\n-00000017 r .LC4\n-00000164 r .LC40\n-00000175 r .LC41\n-00000181 r .LC42\n-00000199 r .LC43\n-000001a8 r .LC44\n-000001bb r .LC45\n-000001cb r .LC46\n-000001d6 r .LC47\n-000001df r .LC48\n-000001ee r .LC49\n-0000001e r .LC5\n-00000201 r .LC50\n-0000020c r .LC51\n-00000215 r .LC52\n-0000021e r .LC53\n-0000022d r .LC54\n-00000239 r .LC55\n-0000024c r .LC56\n-0000025c r .LC57\n-00000270 r .LC58\n-00000285 r .LC59\n-00000025 r .LC6\n-0000029b r .LC60\n-000002ad r .LC61\n-000002c1 r .LC62\n-000002d1 r .LC63\n-000002e1 r .LC64\n-000002f3 r .LC65\n-000002fe r .LC66\n-0000030b r .LC67\n-00000319 r .LC68\n-00000324 r .LC69\n-0000002a r .LC7\n-0000032c r .LC70\n-00000337 r .LC71\n-00000342 r .LC72\n-00000358 r .LC73\n-0000036f r .LC74\n-0000037f r .LC75\n-0000004c r .LC76\n-00000393 r .LC77\n-000003ac r .LC78\n-000003bc r .LC79\n-00000031 r .LC8\n-000003c8 r .LC80\n-000003d7 r .LC81\n-000003f0 r .LC82\n-000003fb r .LC83\n-0000040c r .LC84\n-0000041a r .LC85\n-00000429 r .LC86\n-00000434 r .LC87\n-00000445 r .LC88\n-0000006c r .LC89\n-00000039 r .LC9\n-00000452 r .LC90\n-0000046e r .LC91\n-0000048a r .LC92\n-0000049b r .LC93\n-000004b4 r .LC94\n-000004c4 r .LC95\n-000004dd r .LC96\n-000004e4 r .LC97\n-000004eb r .LC98\n-00000501 r .LC99\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-000003e0 T umad_attribute_str\n-00000000 T umad_class_str\n-000002b0 T umad_common_mad_status_str\n-00000150 T umad_method_str\n-00000330 T umad_sa_mad_status_str\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ----------   0        0        0     1204 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    38772 1970-01-01 00:00:00.000000 umad.c.o\n-?rw-r--r--   0        0        0     4016 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r--   0        0        0    12408 1970-01-01 00:00:00.000000 umad_str.c.o\n+?rw-r--r--   0        0        0     4016 1970-01-01 00:00:00.000000 sysfs.c.o\n+?rw-r--r--   0        0        0    38772 1970-01-01 00:00:00.000000 umad.c.o\n"}]}]}]}]}, {"source1": "libibverbs-dev_52.0-2_i386.deb", "source2": "libibverbs-dev_52.0-2_i386.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r--   0        0        0        4 2024-06-27 11:49:34.000000 debian-binary\n--rw-r--r--   0        0        0     5672 2024-06-27 11:49:34.000000 control.tar.xz\n--rw-r--r--   0        0        0   695356 2024-06-27 11:49:34.000000 data.tar.xz\n+-rw-r--r--   0        0        0     5668 2024-06-27 11:49:34.000000 control.tar.xz\n+-rw-r--r--   0        0        0   695128 2024-06-27 11:49:34.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/i386-linux-gnu/libbnxt_re-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libbnxt_re-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,16 +1,32 @@\n \n Archive index:\n-rdmacore52_0___x86.get_pc_thunk.bx in main.c.o\n-verbs_provider_bnxt_re in main.c.o\n rdmacore52_0_bnxt_re_free_mem in memory.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in memory.c.o\n rdmacore52_0_bnxt_re_alloc_mem in memory.c.o\n rdmacore52_0_bnxt_re_get_obj in memory.c.o\n rdmacore52_0_bnxt_re_get_ring in memory.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in main.c.o\n+verbs_provider_bnxt_re in main.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in db.c.o\n+rdmacore52_0_bnxt_re_ring_rq_db in db.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in db.c.o\n+rdmacore52_0_bnxt_re_ring_sq_db in db.c.o\n+rdmacore52_0_bnxt_re_ring_srq_db in db.c.o\n+rdmacore52_0_bnxt_re_ring_srq_arm in db.c.o\n+rdmacore52_0_bnxt_re_ring_cq_db in db.c.o\n+rdmacore52_0_bnxt_re_ring_cq_arm_db in db.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in db.c.o\n+rdmacore52_0_bnxt_re_ring_pstart_db in db.c.o\n+rdmacore52_0_bnxt_re_ring_pend_db in db.c.o\n+rdmacore52_0_bnxt_re_fill_push_wcb in db.c.o\n+rdmacore52_0_bnxt_re_init_pbuf_list in db.c.o\n+rdmacore52_0_bnxt_re_get_pbuf in db.c.o\n+rdmacore52_0_bnxt_re_put_pbuf in db.c.o\n+rdmacore52_0_bnxt_re_destroy_pbuf_list in db.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.si in verbs.c.o\n rdmacore52_0_bnxt_re_query_device in verbs.c.o\n rdmacore52_0_bnxt_re_query_port in verbs.c.o\n rdmacore52_0_bnxt_re_get_toggle_mem in verbs.c.o\n rdmacore52_0_bnxt_re_notify_drv in verbs.c.o\n rdmacore52_0_bnxt_re_alloc_page in verbs.c.o\n@@ -36,43 +52,41 @@\n rdmacore52_0_bnxt_re_create_srq in verbs.c.o\n rdmacore52_0_bnxt_re_modify_srq in verbs.c.o\n rdmacore52_0_bnxt_re_destroy_srq in verbs.c.o\n rdmacore52_0_bnxt_re_query_srq in verbs.c.o\n rdmacore52_0_bnxt_re_post_srq_recv in verbs.c.o\n rdmacore52_0_bnxt_re_create_ah in verbs.c.o\n rdmacore52_0_bnxt_re_destroy_ah in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in db.c.o\n-rdmacore52_0_bnxt_re_ring_rq_db in db.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in db.c.o\n-rdmacore52_0_bnxt_re_ring_sq_db in db.c.o\n-rdmacore52_0_bnxt_re_ring_srq_db in db.c.o\n-rdmacore52_0_bnxt_re_ring_srq_arm in db.c.o\n-rdmacore52_0_bnxt_re_ring_cq_db in db.c.o\n-rdmacore52_0_bnxt_re_ring_cq_arm_db in db.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in db.c.o\n-rdmacore52_0_bnxt_re_ring_pstart_db in db.c.o\n-rdmacore52_0_bnxt_re_ring_pend_db in db.c.o\n-rdmacore52_0_bnxt_re_fill_push_wcb in db.c.o\n-rdmacore52_0_bnxt_re_init_pbuf_list in db.c.o\n-rdmacore52_0_bnxt_re_get_pbuf in db.c.o\n-rdmacore52_0_bnxt_re_put_pbuf in db.c.o\n-rdmacore52_0_bnxt_re_destroy_pbuf_list in db.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n+\n+memory.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U calloc\n+         U free\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U mmap64\n+         U munmap\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000050 T rdmacore52_0_bnxt_re_alloc_mem\n+00000000 T rdmacore52_0_bnxt_re_free_mem\n+00000100 T rdmacore52_0_bnxt_re_get_obj\n+00000130 T rdmacore52_0_bnxt_re_get_ring\n \n main.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n 00000150 t bnxt_re_alloc_context\n 00000000 d bnxt_re_cntx_ops\n 00000000 d bnxt_re_dev_ops\n@@ -118,27 +132,40 @@\n          U rdmacore52_0_bnxt_re_resize_cq\n          U rdmacore52_0_ibv_cmd_get_context\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n 00000000 D verbs_provider_bnxt_re\n \n-memory.c.o:\n+db.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+00000000 t bnxt_re_do_pacing\n          U calloc\n+         U clock_gettime\n          U free\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U mmap64\n-         U munmap\n+         U mmio_write64_be\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000050 T rdmacore52_0_bnxt_re_alloc_mem\n-00000000 T rdmacore52_0_bnxt_re_free_mem\n-00000100 T rdmacore52_0_bnxt_re_get_obj\n-00000130 T rdmacore52_0_bnxt_re_get_ring\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+000009e0 T rdmacore52_0_bnxt_re_destroy_pbuf_list\n+00000570 T rdmacore52_0_bnxt_re_fill_push_wcb\n+00000940 T rdmacore52_0_bnxt_re_get_pbuf\n+00000690 T rdmacore52_0_bnxt_re_init_pbuf_list\n+         U rdmacore52_0_bnxt_re_notify_drv\n+000009a0 T rdmacore52_0_bnxt_re_put_pbuf\n+000003f0 T rdmacore52_0_bnxt_re_ring_cq_arm_db\n+00000380 T rdmacore52_0_bnxt_re_ring_cq_db\n+00000500 T rdmacore52_0_bnxt_re_ring_pend_db\n+00000490 T rdmacore52_0_bnxt_re_ring_pstart_db\n+000001b0 T rdmacore52_0_bnxt_re_ring_rq_db\n+00000230 T rdmacore52_0_bnxt_re_ring_sq_db\n+00000320 T rdmacore52_0_bnxt_re_ring_srq_arm\n+000002b0 T rdmacore52_0_bnxt_re_ring_srq_db\n+         U rdmacore52_0_xorshift32\n \n verbs.c.o:\n 00000b6d t .L123\n 00000a83 t .L125\n 00000d63 t .L53\n 00000c39 t .L54\n 00000c43 t .L56\n@@ -249,48 +276,14 @@\n          U rdmacore52_0_ibv_cmd_query_qp\n          U rdmacore52_0_ibv_cmd_query_srq\n          U rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n          U rdmacore52_0_ibv_cmd_reg_mr\n          U rdmacore52_0_ibv_cmd_resize_cq\n          U rdmacore52_0_ilog64\n \n-db.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000000 t bnxt_re_do_pacing\n-         U calloc\n-         U clock_gettime\n-         U free\n-         U mmio_write64_be\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-000009e0 T rdmacore52_0_bnxt_re_destroy_pbuf_list\n-00000570 T rdmacore52_0_bnxt_re_fill_push_wcb\n-00000940 T rdmacore52_0_bnxt_re_get_pbuf\n-00000690 T rdmacore52_0_bnxt_re_init_pbuf_list\n-         U rdmacore52_0_bnxt_re_notify_drv\n-000009a0 T rdmacore52_0_bnxt_re_put_pbuf\n-000003f0 T rdmacore52_0_bnxt_re_ring_cq_arm_db\n-00000380 T rdmacore52_0_bnxt_re_ring_cq_db\n-00000500 T rdmacore52_0_bnxt_re_ring_pend_db\n-00000490 T rdmacore52_0_bnxt_re_ring_pstart_db\n-000001b0 T rdmacore52_0_bnxt_re_ring_rq_db\n-00000230 T rdmacore52_0_bnxt_re_ring_sq_db\n-00000320 T rdmacore52_0_bnxt_re_ring_srq_arm\n-000002b0 T rdmacore52_0_bnxt_re_ring_srq_db\n-         U rdmacore52_0_xorshift32\n-\n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n-\n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0_ilog32\n@@ -305,7 +298,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,8 +1,8 @@\n ----------   0        0        0     2462 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0     7116 1970-01-01 00:00:00.000000 main.c.o\n ?rw-r--r--   0        0        0     1980 1970-01-01 00:00:00.000000 memory.c.o\n-?rw-r--r--   0        0        0    29064 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r--   0        0        0     7116 1970-01-01 00:00:00.000000 main.c.o\n ?rw-r--r--   0        0        0     6176 1970-01-01 00:00:00.000000 db.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0    29064 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libcxgb4-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libcxgb4-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -4,14 +4,32 @@\n rdmacore52_0_c4iw_post_send in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n rdmacore52_0_c4iw_post_srq_recv in qp.c.o\n rdmacore52_0_c4iw_post_receive in qp.c.o\n rdmacore52_0_c4iw_flush_qp in qp.c.o\n rdmacore52_0_c4iw_flush_qps in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.di in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dev.c.o\n+rdmacore52_0_c4iw_page_size in dev.c.o\n+rdmacore52_0_c4iw_page_shift in dev.c.o\n+rdmacore52_0_c4iw_page_mask in dev.c.o\n+rdmacore52_0_c4iw_abi_version in dev.c.o\n+rdmacore52_0_ma_wr in dev.c.o\n+rdmacore52_0_t5_en_wc in dev.c.o\n+verbs_provider_cxgb4 in dev.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n+rdmacore52_0_c4iw_flush_rq in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in cq.c.o\n+rdmacore52_0_c4iw_flush_sq in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n+rdmacore52_0_c4iw_flush_hw_cq in cq.c.o\n+rdmacore52_0_c4iw_count_rcqes in cq.c.o\n+rdmacore52_0_c4iw_poll_cq in cq.c.o\n+rdmacore52_0_c4iw_arm_cq in cq.c.o\n+rdmacore52_0_c4iw_flush_srqidx in cq.c.o\n rdmacore52_0_c4iw_query_device in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_c4iw_query_port in verbs.c.o\n rdmacore52_0_c4iw_alloc_pd in verbs.c.o\n rdmacore52_0_c4iw_free_pd in verbs.c.o\n rdmacore52_0_c4iw_reg_mr in verbs.c.o\n rdmacore52_0_c4iw_dereg_mr in verbs.c.o\n@@ -25,32 +43,14 @@\n rdmacore52_0_c4iw_create_qp in verbs.c.o\n rdmacore52_0_c4iw_modify_qp in verbs.c.o\n rdmacore52_0_c4iw_destroy_qp in verbs.c.o\n rdmacore52_0_c4iw_query_qp in verbs.c.o\n rdmacore52_0_c4iw_attach_mcast in verbs.c.o\n rdmacore52_0_c4iw_detach_mcast in verbs.c.o\n rdmacore52_0_c4iw_async_event in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dev.c.o\n-rdmacore52_0_c4iw_page_size in dev.c.o\n-rdmacore52_0_c4iw_page_shift in dev.c.o\n-rdmacore52_0_c4iw_page_mask in dev.c.o\n-rdmacore52_0_c4iw_abi_version in dev.c.o\n-rdmacore52_0_ma_wr in dev.c.o\n-rdmacore52_0_t5_en_wc in dev.c.o\n-verbs_provider_cxgb4 in dev.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n-rdmacore52_0_c4iw_flush_rq in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in cq.c.o\n-rdmacore52_0_c4iw_flush_sq in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n-rdmacore52_0_c4iw_flush_hw_cq in cq.c.o\n-rdmacore52_0_c4iw_count_rcqes in cq.c.o\n-rdmacore52_0_c4iw_poll_cq in cq.c.o\n-rdmacore52_0_c4iw_arm_cq in cq.c.o\n-rdmacore52_0_c4iw_flush_srqidx in cq.c.o\n \n qp.c.o:\n 000001d8 t .L228\n 00000290 t .L54\n 00000790 t .L56\n 00000660 t .L57\n 00000672 t .L58\n@@ -75,76 +75,14 @@\n 00001be0 T rdmacore52_0_c4iw_post_receive\n 00000080 T rdmacore52_0_c4iw_post_send\n 00001650 T rdmacore52_0_c4iw_post_srq_recv\n          U rdmacore52_0_ibv_cmd_modify_qp\n          U rdmacore52_0_ma_wr\n          U rdmacore52_0_t5_en_wc\n \n-verbs.c.o:\n-00000000 r .LC0\n-00000000 r .LC1\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-         U fwrite\n-         U malloc\n-         U memset\n-         U mmap64\n-         U munmap\n-         U pthread_spin_init\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000120 T rdmacore52_0_c4iw_alloc_pd\n-000018f0 T rdmacore52_0_c4iw_async_event\n-00001810 T rdmacore52_0_c4iw_attach_mcast\n-00000390 T rdmacore52_0_c4iw_create_cq\n-00000b10 T rdmacore52_0_c4iw_create_qp\n-00000700 T rdmacore52_0_c4iw_create_srq\n-00000310 T rdmacore52_0_c4iw_dereg_mr\n-00000650 T rdmacore52_0_c4iw_destroy_cq\n-000015e0 T rdmacore52_0_c4iw_destroy_qp\n-00000a10 T rdmacore52_0_c4iw_destroy_srq\n-00001880 T rdmacore52_0_c4iw_detach_mcast\n-         U rdmacore52_0_c4iw_flush_qp\n-000001b0 T rdmacore52_0_c4iw_free_pd\n-00001480 T rdmacore52_0_c4iw_modify_qp\n-00000980 T rdmacore52_0_c4iw_modify_srq\n-         U rdmacore52_0_c4iw_page_mask\n-         U rdmacore52_0_c4iw_page_size\n-00000000 T rdmacore52_0_c4iw_query_device\n-000000d0 T rdmacore52_0_c4iw_query_port\n-00001760 T rdmacore52_0_c4iw_query_qp\n-00000ac0 T rdmacore52_0_c4iw_query_srq\n-000001f0 T rdmacore52_0_c4iw_reg_mr\n-         U rdmacore52_0_ibv_cmd_alloc_pd\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_create_cq\n-         U rdmacore52_0_ibv_cmd_create_qp\n-         U rdmacore52_0_ibv_cmd_create_srq\n-         U rdmacore52_0_ibv_cmd_dealloc_pd\n-         U rdmacore52_0_ibv_cmd_dereg_mr\n-         U rdmacore52_0_ibv_cmd_destroy_cq\n-         U rdmacore52_0_ibv_cmd_destroy_qp\n-         U rdmacore52_0_ibv_cmd_destroy_srq\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_modify_qp\n-         U rdmacore52_0_ibv_cmd_modify_srq\n-         U rdmacore52_0_ibv_cmd_query_device_any\n-         U rdmacore52_0_ibv_cmd_query_port\n-         U rdmacore52_0_ibv_cmd_query_qp\n-         U rdmacore52_0_ibv_cmd_query_srq\n-         U rdmacore52_0_ibv_cmd_reg_mr\n-00000000 B rdmacore52_0_is_64b_cqe\n-         U rdmacore52_0_ma_wr\n-         U stderr\n-\n dev.c.o:\n 00000000 r .LC0\n 0000000c r .LC1\n 00000000 r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __fprintf_chk\n          U __stack_chk_fail_local\n@@ -249,7 +187,69 @@\n 00000350 T rdmacore52_0_c4iw_flush_sq\n 00002680 T rdmacore52_0_c4iw_flush_srqidx\n 00000fc0 T rdmacore52_0_c4iw_poll_cq\n          U rdmacore52_0_ibv_cmd_modify_srq\n          U rdmacore52_0_is_64b_cqe\n          U rdmacore52_0_t5_en_wc\n          U stderr\n+\n+verbs.c.o:\n+00000000 r .LC0\n+00000000 r .LC1\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U fwrite\n+         U malloc\n+         U memset\n+         U mmap64\n+         U munmap\n+         U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000120 T rdmacore52_0_c4iw_alloc_pd\n+000018f0 T rdmacore52_0_c4iw_async_event\n+00001810 T rdmacore52_0_c4iw_attach_mcast\n+00000390 T rdmacore52_0_c4iw_create_cq\n+00000b10 T rdmacore52_0_c4iw_create_qp\n+00000700 T rdmacore52_0_c4iw_create_srq\n+00000310 T rdmacore52_0_c4iw_dereg_mr\n+00000650 T rdmacore52_0_c4iw_destroy_cq\n+000015e0 T rdmacore52_0_c4iw_destroy_qp\n+00000a10 T rdmacore52_0_c4iw_destroy_srq\n+00001880 T rdmacore52_0_c4iw_detach_mcast\n+         U rdmacore52_0_c4iw_flush_qp\n+000001b0 T rdmacore52_0_c4iw_free_pd\n+00001480 T rdmacore52_0_c4iw_modify_qp\n+00000980 T rdmacore52_0_c4iw_modify_srq\n+         U rdmacore52_0_c4iw_page_mask\n+         U rdmacore52_0_c4iw_page_size\n+00000000 T rdmacore52_0_c4iw_query_device\n+000000d0 T rdmacore52_0_c4iw_query_port\n+00001760 T rdmacore52_0_c4iw_query_qp\n+00000ac0 T rdmacore52_0_c4iw_query_srq\n+000001f0 T rdmacore52_0_c4iw_reg_mr\n+         U rdmacore52_0_ibv_cmd_alloc_pd\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_create_cq\n+         U rdmacore52_0_ibv_cmd_create_qp\n+         U rdmacore52_0_ibv_cmd_create_srq\n+         U rdmacore52_0_ibv_cmd_dealloc_pd\n+         U rdmacore52_0_ibv_cmd_dereg_mr\n+         U rdmacore52_0_ibv_cmd_destroy_cq\n+         U rdmacore52_0_ibv_cmd_destroy_qp\n+         U rdmacore52_0_ibv_cmd_destroy_srq\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_modify_qp\n+         U rdmacore52_0_ibv_cmd_modify_srq\n+         U rdmacore52_0_ibv_cmd_query_device_any\n+         U rdmacore52_0_ibv_cmd_query_port\n+         U rdmacore52_0_ibv_cmd_query_qp\n+         U rdmacore52_0_ibv_cmd_query_srq\n+         U rdmacore52_0_ibv_cmd_reg_mr\n+00000000 B rdmacore52_0_is_64b_cqe\n+         U rdmacore52_0_ma_wr\n+         U stderr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ----------   0        0        0     1556 1970-01-01 00:00:00.000000 /\n ?rw-r--r--   0        0        0    13460 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r--   0        0        0    14704 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     9532 1970-01-01 00:00:00.000000 dev.c.o\n ?rw-r--r--   0        0        0    15836 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r--   0        0        0    14704 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libefa.a", "source2": "./usr/lib/i386-linux-gnu/libefa.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,13 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in efa.c.o\n+rdmacore52_0_is_efa_dev in efa.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in efa.c.o\n+verbs_provider_efa in efa.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.di in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in verbs.c.o\n rdmacore52_0_efa_query_port in verbs.c.o\n rdmacore52_0_efa_query_device_ex in verbs.c.o\n rdmacore52_0_efa_query_device_ctx in verbs.c.o\n@@ -31,31 +35,82 @@\n rdmacore52_0_efa_query_qp_data_in_order in verbs.c.o\n rdmacore52_0_efa_destroy_qp in verbs.c.o\n rdmacore52_0_efa_post_send in verbs.c.o\n rdmacore52_0_efa_post_recv in verbs.c.o\n efadv_query_ah in verbs.c.o\n rdmacore52_0_efa_create_ah in verbs.c.o\n rdmacore52_0_efa_destroy_ah in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in efa.c.o\n-rdmacore52_0_is_efa_dev in efa.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in efa.c.o\n-verbs_provider_efa in efa.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n+\n+efa.c.o:\n+00000000 r .LC0\n+00000028 r .LC1\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+00000000 r __func__.0\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+00000060 t efa_alloc_context\n+00000000 d efa_ctx_ops\n+00000000 d efa_dev_ops\n+00000020 t efa_device_alloc\n+00000240 t efa_free_context\n+00000020 r efa_table\n+00000000 t efa_uninit_device\n+         U free\n+         U pthread_spin_destroy\n+         U pthread_spin_init\n+         U rdmacore52_0___verbs_log\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_efa_alloc_pd\n+         U rdmacore52_0_efa_arm_cq\n+         U rdmacore52_0_efa_cq_event\n+         U rdmacore52_0_efa_create_ah\n+         U rdmacore52_0_efa_create_cq\n+         U rdmacore52_0_efa_create_cq_ex\n+         U rdmacore52_0_efa_create_qp\n+         U rdmacore52_0_efa_create_qp_ex\n+         U rdmacore52_0_efa_dealloc_pd\n+         U rdmacore52_0_efa_dereg_mr\n+         U rdmacore52_0_efa_destroy_ah\n+         U rdmacore52_0_efa_destroy_cq\n+         U rdmacore52_0_efa_destroy_qp\n+         U rdmacore52_0_efa_modify_qp\n+         U rdmacore52_0_efa_poll_cq\n+         U rdmacore52_0_efa_post_recv\n+         U rdmacore52_0_efa_post_send\n+         U rdmacore52_0_efa_query_device_ctx\n+         U rdmacore52_0_efa_query_device_ex\n+         U rdmacore52_0_efa_query_port\n+         U rdmacore52_0_efa_query_qp\n+         U rdmacore52_0_efa_query_qp_data_in_order\n+         U rdmacore52_0_efa_reg_dmabuf_mr\n+         U rdmacore52_0_efa_reg_mr\n+         U rdmacore52_0_ibv_cmd_get_context\n+00000290 T rdmacore52_0_is_efa_dev\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+         U sysconf\n+00000000 D verbs_provider_efa\n \n verbs.c.o:\n 00000000 r .LC0\n 000000e8 r .LC10\n 0000011c r .LC12\n 00000144 r .LC13\n 00000178 r .LC14\n@@ -271,76 +326,14 @@\n          U rdmacore52_0_ibv_cmd_query_port\n          U rdmacore52_0_ibv_cmd_query_qp\n          U rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n          U rdmacore52_0_ibv_cmd_reg_mr\n          U rdmacore52_0_ilog64\n          U rdmacore52_0_is_efa_dev\n \n-efa.c.o:\n-00000000 r .LC0\n-00000028 r .LC1\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-00000000 r __func__.0\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-00000060 t efa_alloc_context\n-00000000 d efa_ctx_ops\n-00000000 d efa_dev_ops\n-00000020 t efa_device_alloc\n-00000240 t efa_free_context\n-00000020 r efa_table\n-00000000 t efa_uninit_device\n-         U free\n-         U pthread_spin_destroy\n-         U pthread_spin_init\n-         U rdmacore52_0___verbs_log\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_efa_alloc_pd\n-         U rdmacore52_0_efa_arm_cq\n-         U rdmacore52_0_efa_cq_event\n-         U rdmacore52_0_efa_create_ah\n-         U rdmacore52_0_efa_create_cq\n-         U rdmacore52_0_efa_create_cq_ex\n-         U rdmacore52_0_efa_create_qp\n-         U rdmacore52_0_efa_create_qp_ex\n-         U rdmacore52_0_efa_dealloc_pd\n-         U rdmacore52_0_efa_dereg_mr\n-         U rdmacore52_0_efa_destroy_ah\n-         U rdmacore52_0_efa_destroy_cq\n-         U rdmacore52_0_efa_destroy_qp\n-         U rdmacore52_0_efa_modify_qp\n-         U rdmacore52_0_efa_poll_cq\n-         U rdmacore52_0_efa_post_recv\n-         U rdmacore52_0_efa_post_send\n-         U rdmacore52_0_efa_query_device_ctx\n-         U rdmacore52_0_efa_query_device_ex\n-         U rdmacore52_0_efa_query_port\n-         U rdmacore52_0_efa_query_qp\n-         U rdmacore52_0_efa_query_qp_data_in_order\n-         U rdmacore52_0_efa_reg_dmabuf_mr\n-         U rdmacore52_0_efa_reg_mr\n-         U rdmacore52_0_ibv_cmd_get_context\n-00000290 T rdmacore52_0_is_efa_dev\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-         U sysconf\n-00000000 D verbs_provider_efa\n-\n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n-\n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0_ilog32\n@@ -355,7 +348,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,6 +1,6 @@\n ----------   0        0        0     1644 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    51028 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     6128 1970-01-01 00:00:00.000000 efa.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0    51028 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/liberdma-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/liberdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -21,27 +21,27 @@\n rdmacore52_0_erdma_poll_cq in erdma_verbs.c.o\n rdmacore52_0_erdma_free_context in erdma_verbs.c.o\n rdmacore52_0_erdma_alloc_dbrecords in erdma_db.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in erdma_db.c.o\n rdmacore52_0_erdma_dealloc_dbrecords in erdma_db.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in erdma.c.o\n verbs_provider_erdma in erdma.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n \n erdma_verbs.c.o:\n 00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __snprintf_chk\n          U __stack_chk_fail_local\n@@ -149,21 +149,14 @@\n          U rdmacore52_0_erdma_reg_mr\n          U rdmacore52_0_ibv_cmd_get_context\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n 00000000 D verbs_provider_erdma\n \n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n-\n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0_ilog32\n@@ -178,7 +171,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,7 +1,7 @@\n ----------   0        0        0     1280 1970-01-01 00:00:00.000000 /\n ?rw-r--r--   0        0        0    14440 1970-01-01 00:00:00.000000 erdma_verbs.c.o\n ?rw-r--r--   0        0        0     2244 1970-01-01 00:00:00.000000 erdma_db.c.o\n ?rw-r--r--   0        0        0     4896 1970-01-01 00:00:00.000000 erdma.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libhfi1verbs-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libhfi1verbs-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,11 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in hfiverbs.c.o\n+verbs_provider_hfi1verbs in hfiverbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_hfi1_query_device in verbs.c.o\n rdmacore52_0_hfi1_query_port in verbs.c.o\n rdmacore52_0_hfi1_alloc_pd in verbs.c.o\n rdmacore52_0_hfi1_free_pd in verbs.c.o\n rdmacore52_0_hfi1_reg_mr in verbs.c.o\n rdmacore52_0_hfi1_dereg_mr in verbs.c.o\n@@ -28,16 +30,73 @@\n rdmacore52_0_hfi1_modify_srq_v1 in verbs.c.o\n rdmacore52_0_hfi1_query_srq in verbs.c.o\n rdmacore52_0_hfi1_destroy_srq in verbs.c.o\n rdmacore52_0_hfi1_destroy_srq_v1 in verbs.c.o\n rdmacore52_0_hfi1_post_srq_recv in verbs.c.o\n rdmacore52_0_hfi1_create_ah in verbs.c.o\n rdmacore52_0_hfi1_destroy_ah in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in hfiverbs.c.o\n-verbs_provider_hfi1verbs in hfiverbs.c.o\n+\n+hfiverbs.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+         U free\n+00000000 r hca_table\n+00000000 t hf11_uninit_device\n+00000090 t hfi1_alloc_context\n+00000140 d hfi1_ctx_common_ops\n+00000000 d hfi1_ctx_v1_ops\n+00000000 d hfi1_dev_ops\n+00000020 t hfi1_device_alloc\n+00000060 t hfi1_free_context\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_hfi1_alloc_pd\n+         U rdmacore52_0_hfi1_create_ah\n+         U rdmacore52_0_hfi1_create_cq\n+         U rdmacore52_0_hfi1_create_cq_v1\n+         U rdmacore52_0_hfi1_create_qp\n+         U rdmacore52_0_hfi1_create_qp_v1\n+         U rdmacore52_0_hfi1_create_srq\n+         U rdmacore52_0_hfi1_create_srq_v1\n+         U rdmacore52_0_hfi1_dereg_mr\n+         U rdmacore52_0_hfi1_destroy_ah\n+         U rdmacore52_0_hfi1_destroy_cq\n+         U rdmacore52_0_hfi1_destroy_cq_v1\n+         U rdmacore52_0_hfi1_destroy_qp\n+         U rdmacore52_0_hfi1_destroy_qp_v1\n+         U rdmacore52_0_hfi1_destroy_srq\n+         U rdmacore52_0_hfi1_destroy_srq_v1\n+         U rdmacore52_0_hfi1_free_pd\n+         U rdmacore52_0_hfi1_modify_qp\n+         U rdmacore52_0_hfi1_modify_srq\n+         U rdmacore52_0_hfi1_modify_srq_v1\n+         U rdmacore52_0_hfi1_poll_cq\n+         U rdmacore52_0_hfi1_post_recv\n+         U rdmacore52_0_hfi1_post_send\n+         U rdmacore52_0_hfi1_post_srq_recv\n+         U rdmacore52_0_hfi1_query_device\n+         U rdmacore52_0_hfi1_query_port\n+         U rdmacore52_0_hfi1_query_qp\n+         U rdmacore52_0_hfi1_query_srq\n+         U rdmacore52_0_hfi1_reg_mr\n+         U rdmacore52_0_hfi1_resize_cq\n+         U rdmacore52_0_hfi1_resize_cq_v1\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_ibv_cmd_poll_cq\n+         U rdmacore52_0_ibv_cmd_post_recv\n+         U rdmacore52_0_ibv_cmd_post_srq_recv\n+         U rdmacore52_0_ibv_cmd_req_notify_cq\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+00000000 D verbs_provider_hfi1verbs\n \n verbs.c.o:\n 00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __snprintf_chk\n          U __stack_chk_fail_local\n@@ -97,66 +156,7 @@\n          U rdmacore52_0_ibv_cmd_post_send\n          U rdmacore52_0_ibv_cmd_query_device_any\n          U rdmacore52_0_ibv_cmd_query_port\n          U rdmacore52_0_ibv_cmd_query_qp\n          U rdmacore52_0_ibv_cmd_query_srq\n          U rdmacore52_0_ibv_cmd_reg_mr\n          U rdmacore52_0_ibv_cmd_resize_cq\n-\n-hfiverbs.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-         U free\n-00000000 r hca_table\n-00000000 t hf11_uninit_device\n-00000090 t hfi1_alloc_context\n-00000140 d hfi1_ctx_common_ops\n-00000000 d hfi1_ctx_v1_ops\n-00000000 d hfi1_dev_ops\n-00000020 t hfi1_device_alloc\n-00000060 t hfi1_free_context\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_hfi1_alloc_pd\n-         U rdmacore52_0_hfi1_create_ah\n-         U rdmacore52_0_hfi1_create_cq\n-         U rdmacore52_0_hfi1_create_cq_v1\n-         U rdmacore52_0_hfi1_create_qp\n-         U rdmacore52_0_hfi1_create_qp_v1\n-         U rdmacore52_0_hfi1_create_srq\n-         U rdmacore52_0_hfi1_create_srq_v1\n-         U rdmacore52_0_hfi1_dereg_mr\n-         U rdmacore52_0_hfi1_destroy_ah\n-         U rdmacore52_0_hfi1_destroy_cq\n-         U rdmacore52_0_hfi1_destroy_cq_v1\n-         U rdmacore52_0_hfi1_destroy_qp\n-         U rdmacore52_0_hfi1_destroy_qp_v1\n-         U rdmacore52_0_hfi1_destroy_srq\n-         U rdmacore52_0_hfi1_destroy_srq_v1\n-         U rdmacore52_0_hfi1_free_pd\n-         U rdmacore52_0_hfi1_modify_qp\n-         U rdmacore52_0_hfi1_modify_srq\n-         U rdmacore52_0_hfi1_modify_srq_v1\n-         U rdmacore52_0_hfi1_poll_cq\n-         U rdmacore52_0_hfi1_post_recv\n-         U rdmacore52_0_hfi1_post_send\n-         U rdmacore52_0_hfi1_post_srq_recv\n-         U rdmacore52_0_hfi1_query_device\n-         U rdmacore52_0_hfi1_query_port\n-         U rdmacore52_0_hfi1_query_qp\n-         U rdmacore52_0_hfi1_query_srq\n-         U rdmacore52_0_hfi1_reg_mr\n-         U rdmacore52_0_hfi1_resize_cq\n-         U rdmacore52_0_hfi1_resize_cq_v1\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_ibv_cmd_poll_cq\n-         U rdmacore52_0_ibv_cmd_post_recv\n-         U rdmacore52_0_ibv_cmd_post_srq_recv\n-         U rdmacore52_0_ibv_cmd_req_notify_cq\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-00000000 D verbs_provider_hfi1verbs\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n ----------   0        0        0     1138 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    12964 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     5928 1970-01-01 00:00:00.000000 hfiverbs.c.o\n+?rw-r--r--   0        0        0    12964 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libhns.a", "source2": "./usr/lib/i386-linux-gnu/libhns.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,25 +1,22 @@\n \n Archive index:\n-rdmacore52_0_hns_roce_alloc_db in hns_roce_u_db.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_db.c.o\n-rdmacore52_0_hns_roce_free_db in hns_roce_u_db.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in hns_roce_u_hw_v2.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_hw_v2.c.o\n rdmacore52_0___x86.get_pc_thunk.di in hns_roce_u_hw_v2.c.o\n rdmacore52_0___x86.get_pc_thunk.si in hns_roce_u_hw_v2.c.o\n rdmacore52_0_hns_roce_u_v2_post_send in hns_roce_u_hw_v2.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in hns_roce_u_hw_v2.c.o\n rdmacore52_0_hns_roce_v2_clear_qp in hns_roce_u_hw_v2.c.o\n rdmacore52_0_hns_roce_attach_cq_ex_ops in hns_roce_u_hw_v2.c.o\n rdmacore52_0_hns_roce_attach_qp_ex_ops in hns_roce_u_hw_v2.c.o\n rdmacore52_0_hns_roce_u_hw_v2 in hns_roce_u_hw_v2.c.o\n-rdmacore52_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_buf.c.o\n-rdmacore52_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n+rdmacore52_0_hns_roce_alloc_db in hns_roce_u_db.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_db.c.o\n+rdmacore52_0_hns_roce_free_db in hns_roce_u_db.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_init_qp_indices in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_query_device in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_query_port in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_alloc_pd in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_free_pd in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_open_xrcd in hns_roce_u_verbs.c.o\n@@ -54,42 +51,30 @@\n rdmacore52_0_hns_roce_u_create_ah in hns_roce_u_verbs.c.o\n rdmacore52_0_hns_roce_u_destroy_ah in hns_roce_u_verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u.c.o\n rdmacore52_0_is_hns_dev in hns_roce_u.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in hns_roce_u.c.o\n hnsdv_is_supported in hns_roce_u.c.o\n verbs_provider_hns in hns_roce_u.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n+rdmacore52_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in hns_roce_u_buf.c.o\n+rdmacore52_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n-\n-hns_roce_u_db.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U calloc\n-00000000 r db_size\n-         U free\n-         U memset\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_bitmap_find_first_bit\n-         U rdmacore52_0_hns_roce_alloc_buf\n-00000000 T rdmacore52_0_hns_roce_alloc_db\n-         U rdmacore52_0_hns_roce_free_buf\n-000001b0 T rdmacore52_0_hns_roce_free_db\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n \n hns_roce_u_hw_v2.c.o:\n 000029e0 t .L422\n 00002958 t .L423\n 000028c8 t .L425\n 00002858 t .L426\n 00002370 t .L427\n@@ -172,24 +157,28 @@\n 00000430 t wr_set_sge_list_ud\n 00000190 t wr_set_sge_rc\n 000003b0 t wr_set_sge_ud\n 00001250 t wr_set_ud_addr\n 00000380 t wr_set_xrc_srqn\n 000008b0 t wr_start\n \n-hns_roce_u_buf.c.o:\n+hns_roce_u_db.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U mmap64\n-         U munmap\n+         U calloc\n+00000000 r db_size\n+         U free\n+         U memset\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_hns_roce_alloc_buf\n-00000090 T rdmacore52_0_hns_roce_free_buf\n+         U rdmacore52_0_bitmap_find_first_bit\n+         U rdmacore52_0_hns_roce_alloc_buf\n+00000000 T rdmacore52_0_hns_roce_alloc_db\n+         U rdmacore52_0_hns_roce_free_buf\n+000001b0 T rdmacore52_0_hns_roce_free_db\n \n hns_roce_u_verbs.c.o:\n 00000000 r .LC0\n 00000000 r .LC1\n 00000024 r .LC2\n 00000048 r .LC4\n 00000074 r .LC5\n@@ -346,20 +335,24 @@\n 000004a0 T rdmacore52_0_is_hns_dev\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n          U sysconf\n 00000000 D verbs_provider_hns\n \n-str.c.o:\n+hns_roce_u_buf.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U mmap64\n+         U munmap\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n+00000000 T rdmacore52_0_hns_roce_alloc_buf\n+00000090 T rdmacore52_0_hns_roce_free_buf\n \n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n@@ -375,7 +368,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,10 +1,10 @@\n ----------   0        0        0     2578 1970-01-01 00:00:00.000000 /\n ----------   0        0        0        0 1970-01-01 00:00:00.000000 //\n-?rw-r--r--   0        0        0     2500 1970-01-01 00:00:00.000000 hns_roce_u_db.c.o\n ?rw-r--r--   0        0        0    34044 1970-01-01 00:00:00.000000 hns_roce_u_hw_v2.c.o\n-?rw-r--r--   0        0        0     1612 1970-01-01 00:00:00.000000 hns_roce_u_buf.c.o\n+?rw-r--r--   0        0        0     2500 1970-01-01 00:00:00.000000 hns_roce_u_db.c.o\n ?rw-r--r--   0        0        0    24812 1970-01-01 00:00:00.000000 hns_roce_u_verbs.c.o\n ?rw-r--r--   0        0        0     7352 1970-01-01 00:00:00.000000 hns_roce_u.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0     1612 1970-01-01 00:00:00.000000 hns_roce_u_buf.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libibverbs.a", "source2": "./usr/lib/i386-linux-gnu/libibverbs.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "comments": ["error from `nm -s {}`:", "nm: dynamic_driver.c.o: no symbols", "nm: compat-1_0.c.o: no symbols"], "unified_diff": "@@ -1,92 +1,79 @@\n \n Archive index:\n-ibv_static_providers in static_driver.c.o\n-verbs_provider_none in static_driver.c.o\n-rdmacore52_0_ibv_cmd_advise_mr in cmd_mr.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in cmd_mr.c.o\n-rdmacore52_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_mr.c.o\n-rdmacore52_0_ibv_cmd_query_mr in cmd_mr.c.o\n-rdmacore52_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n+rdmacore52_0_ibv_cmd_close_xrcd in cmd_xrcd.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_xrcd.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dummy_ops.c.o\n+rdmacore52_0_verbs_set_ops in dummy_ops.c.o\n+rdmacore52_0_verbs_dummy_ops in dummy_ops.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in neigh.c.o\n+rdmacore52_0_neigh_get_oif_from_src in neigh.c.o\n+rdmacore52_0_neigh_init_resources in neigh.c.o\n+rdmacore52_0_neigh_get_vlan_id_from_dev in neigh.c.o\n+rdmacore52_0_neigh_set_vlan_id in neigh.c.o\n+rdmacore52_0_neigh_set_dst in neigh.c.o\n+rdmacore52_0_neigh_set_src in neigh.c.o\n+rdmacore52_0_neigh_set_oif in neigh.c.o\n+rdmacore52_0_neigh_get_ll in neigh.c.o\n+rdmacore52_0_neigh_free_resources in neigh.c.o\n+rdmacore52_0_process_get_neigh in neigh.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_qp.c.o\n+rdmacore52_0_ibv_cmd_create_qp in cmd_qp.c.o\n+rdmacore52_0_ibv_cmd_create_qp_ex in cmd_qp.c.o\n+rdmacore52_0_ibv_cmd_create_qp_ex2 in cmd_qp.c.o\n+rdmacore52_0_ibv_cmd_destroy_qp in cmd_qp.c.o\n+rdmacore52_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in cmd_dm.c.o\n+rdmacore52_0_ibv_cmd_free_dm in cmd_dm.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_dm.c.o\n+rdmacore52_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in init.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in init.c.o\n+rdmacore52_0___verbs_log in init.c.o\n+rdmacore52_0_try_access_device in init.c.o\n+rdmacore52_0_decode_knode_type in init.c.o\n+rdmacore52_0_setup_sysfs_uverbs in init.c.o\n+rdmacore52_0_verbs_register_driver_34 in init.c.o\n+rdmacore52_0_ibverbs_get_device_list in init.c.o\n+rdmacore52_0_abi_ver in init.c.o\n+rdmacore52_0_ibverbs_init in init.c.o\n+rdmacore52_0_ibverbs_device_hold in init.c.o\n+rdmacore52_0_ibverbs_device_put in init.c.o\n+rdmacore52_0_ibv_cmd_dealloc_mw in cmd_mw.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_mw.c.o\n+ibv_get_sysfs_path in sysfs.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in sysfs.c.o\n+rdmacore52_0_ibv_read_sysfs_file_at in sysfs.c.o\n+ibv_read_sysfs_file in sysfs.c.o\n+rdmacore52_0_ibv_read_ibdev_sysfs_file in sysfs.c.o\n+rdmacore52_0_ibv_cmd_create_wq in cmd_wq.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in cmd_wq.c.o\n+rdmacore52_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_wq.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in memory.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in memory.c.o\n ibv_fork_init in memory.c.o\n ibv_is_fork_initialized in memory.c.o\n ibv_dontfork_range in memory.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in memory.c.o\n ibv_dofork_range in memory.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dummy_ops.c.o\n-rdmacore52_0_verbs_set_ops in dummy_ops.c.o\n-rdmacore52_0_verbs_dummy_ops in dummy_ops.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n-ibv_rate_to_mult in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in verbs.c.o\n-mult_to_ibv_rate in verbs.c.o\n-ibv_rate_to_mbps in verbs.c.o\n-mbps_to_ibv_rate in verbs.c.o\n-ibv_query_device in verbs.c.o\n-rdmacore52_0___lib_query_port in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in verbs.c.o\n-ibv_query_port in verbs.c.o\n-ibv_query_gid in verbs.c.o\n-ibv_query_pkey in verbs.c.o\n-ibv_get_pkey_index in verbs.c.o\n-ibv_alloc_pd in verbs.c.o\n-ibv_dealloc_pd in verbs.c.o\n-ibv_reg_mr_iova2 in verbs.c.o\n-ibv_reg_mr in verbs.c.o\n-ibv_reg_mr_iova in verbs.c.o\n-ibv_import_pd in verbs.c.o\n-ibv_unimport_pd in verbs.c.o\n-ibv_import_mr in verbs.c.o\n-ibv_unimport_mr in verbs.c.o\n-ibv_import_dm in verbs.c.o\n-ibv_unimport_dm in verbs.c.o\n-ibv_reg_dmabuf_mr in verbs.c.o\n-ibv_rereg_mr in verbs.c.o\n-ibv_dereg_mr in verbs.c.o\n-ibv_create_comp_channel in verbs.c.o\n-ibv_destroy_comp_channel in verbs.c.o\n-ibv_create_cq in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in verbs.c.o\n-ibv_resize_cq in verbs.c.o\n-ibv_destroy_cq in verbs.c.o\n-ibv_get_cq_event in verbs.c.o\n-ibv_ack_cq_events in verbs.c.o\n-ibv_create_srq in verbs.c.o\n-ibv_modify_srq in verbs.c.o\n-ibv_query_srq in verbs.c.o\n-ibv_destroy_srq in verbs.c.o\n-ibv_create_qp in verbs.c.o\n-ibv_qp_to_qp_ex in verbs.c.o\n-ibv_query_qp in verbs.c.o\n-ibv_query_qp_data_in_order in verbs.c.o\n-ibv_modify_qp in verbs.c.o\n-ibv_destroy_qp in verbs.c.o\n-ibv_create_ah in verbs.c.o\n-rdmacore52_0_ibv_query_gid_type in verbs.c.o\n-ibv_init_ah_from_wc in verbs.c.o\n-ibv_create_ah_from_wc in verbs.c.o\n-ibv_destroy_ah in verbs.c.o\n-ibv_attach_mcast in verbs.c.o\n-ibv_detach_mcast in verbs.c.o\n-ibv_resolve_eth_l2_from_gid in verbs.c.o\n-ibv_set_ece in verbs.c.o\n-ibv_query_ece in verbs.c.o\n-rdmacore52_0_ibv_cmd_dealloc_pd in cmd_pd.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_pd.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in ibdev_nl.c.o\n+rdmacore52_0_find_sysfs_devs_nl in ibdev_nl.c.o\n+rdmacore52_0_get_copy_on_fork in ibdev_nl.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in cmd_srq.c.o\n rdmacore52_0_ibv_cmd_create_srq in cmd_srq.c.o\n rdmacore52_0_ibv_cmd_create_srq_ex in cmd_srq.c.o\n rdmacore52_0_ibv_cmd_destroy_srq in cmd_srq.c.o\n-rdmacore52_0_ibv_cmd_create_wq in cmd_wq.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in cmd_wq.c.o\n-rdmacore52_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_wq.c.o\n+verbs_provider_all in all_providers.c.o\n+rdmacore52_0_ibv_cmd_advise_mr in cmd_mr.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in cmd_mr.c.o\n+rdmacore52_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_mr.c.o\n+rdmacore52_0_ibv_cmd_query_mr in cmd_mr.c.o\n+rdmacore52_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n rdmacore52_0___x86.get_pc_thunk.di in cmd.c.o\n rdmacore52_0_ibv_cmd_alloc_pd in cmd.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in cmd.c.o\n rdmacore52_0_ibv_cmd_open_xrcd in cmd.c.o\n rdmacore52_0_ibv_cmd_reg_mr in cmd.c.o\n rdmacore52_0_ibv_cmd_rereg_mr in cmd.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in cmd.c.o\n@@ -109,30 +96,25 @@\n rdmacore52_0_ibv_cmd_attach_mcast in cmd.c.o\n rdmacore52_0_ibv_cmd_detach_mcast in cmd.c.o\n rdmacore52_0_verbs_allow_disassociate_destroy in cmd.c.o\n rdmacore52_0_ibv_cmd_create_flow in cmd.c.o\n rdmacore52_0_ibv_cmd_modify_wq in cmd.c.o\n rdmacore52_0_ibv_cmd_create_rwq_ind_table in cmd.c.o\n rdmacore52_0_ibv_cmd_modify_cq in cmd.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_device.c.o\n-rdmacore52_0_ibv_cmd_query_port in cmd_device.c.o\n-rdmacore52_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n-rdmacore52_0_ibv_cmd_get_context in cmd_device.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in cmd_device.c.o\n-rdmacore52_0_ibv_cmd_query_context in cmd_device.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in cmd_device.c.o\n-rdmacore52_0___ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_table in cmd_device.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in cmd_device.c.o\n-rdmacore52_0_ibv_cmd_query_device_any in cmd_device.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_cq.c.o\n-rdmacore52_0_ibv_cmd_create_cq in cmd_cq.c.o\n-rdmacore52_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n-rdmacore52_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n+rdmacore52_0_ibv_cmd_create_counters in cmd_counters.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in cmd_counters.c.o\n+rdmacore52_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_counters.c.o\n+rdmacore52_0_ibv_cmd_read_counters in cmd_counters.c.o\n+rdmacore52_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n+rdmacore52_0_execute_ioctl in cmd_ioctl.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in cmd_ioctl.c.o\n+rdmacore52_0__write_set_uhw in cmd_ioctl.c.o\n+rdmacore52_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_rwq_ind.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in device.c.o\n ibv_get_device_list in device.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in device.c.o\n ibv_free_device_list in device.c.o\n ibv_get_device_name in device.c.o\n ibv_get_device_guid in device.c.o\n ibv_get_device_index in device.c.o\n@@ -143,209 +125,172 @@\n rdmacore52_0_verbs_open_device in device.c.o\n ibv_open_device in device.c.o\n ibv_import_device in device.c.o\n rdmacore52_0_verbs_uninit_context in device.c.o\n ibv_close_device in device.c.o\n ibv_get_async_event in device.c.o\n ibv_ack_async_event in device.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in ibdev_nl.c.o\n-rdmacore52_0_find_sysfs_devs_nl in ibdev_nl.c.o\n-rdmacore52_0_get_copy_on_fork in ibdev_nl.c.o\n-rdmacore52_0_ibv_cmd_create_counters in cmd_counters.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in cmd_counters.c.o\n-rdmacore52_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_counters.c.o\n-rdmacore52_0_ibv_cmd_read_counters in cmd_counters.c.o\n-ibv_node_type_str in enum_strs.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in enum_strs.c.o\n-ibv_port_state_str in enum_strs.c.o\n-ibv_event_type_str in enum_strs.c.o\n-ibv_wc_status_str in enum_strs.c.o\n-rdmacore52_0_ibv_wr_opcode_str in enum_strs.c.o\n+rdmacore52_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_flow.c.o\n+rdmacore52_0_ibv_cmd_destroy_ah in cmd_ah.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_ah.c.o\n+rdmacore52_0_ibv_cmd_dealloc_pd in cmd_pd.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_pd.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_cq.c.o\n+rdmacore52_0_ibv_cmd_create_cq in cmd_cq.c.o\n+rdmacore52_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n+rdmacore52_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n+ibv_static_providers in static_driver.c.o\n+verbs_provider_none in static_driver.c.o\n rdmacore52_0___x86.get_pc_thunk.di in cmd_fallback.c.o\n rdmacore52_0__check_legacy in cmd_fallback.c.o\n rdmacore52_0__execute_ioctl_fallback in cmd_fallback.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in cmd_fallback.c.o\n rdmacore52_0__write_get_req in cmd_fallback.c.o\n rdmacore52_0__write_get_req_ex in cmd_fallback.c.o\n rdmacore52_0__write_get_resp in cmd_fallback.c.o\n rdmacore52_0__write_get_resp_ex in cmd_fallback.c.o\n rdmacore52_0__execute_cmd_write in cmd_fallback.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in cmd_fallback.c.o\n rdmacore52_0__execute_cmd_write_ex in cmd_fallback.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in cmd_fallback.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_qp.c.o\n-rdmacore52_0_ibv_cmd_create_qp in cmd_qp.c.o\n-rdmacore52_0_ibv_cmd_create_qp_ex in cmd_qp.c.o\n-rdmacore52_0_ibv_cmd_create_qp_ex2 in cmd_qp.c.o\n-rdmacore52_0_ibv_cmd_destroy_qp in cmd_qp.c.o\n-ibv_copy_ah_attr_from_kern in marshall.c.o\n-ibv_copy_qp_attr_from_kern in marshall.c.o\n-ibv_copy_path_rec_from_kern in marshall.c.o\n-ibv_copy_path_rec_to_kern in marshall.c.o\n-ibv_get_sysfs_path in sysfs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in sysfs.c.o\n-rdmacore52_0_ibv_read_sysfs_file_at in sysfs.c.o\n-ibv_read_sysfs_file in sysfs.c.o\n-rdmacore52_0_ibv_read_ibdev_sysfs_file in sysfs.c.o\n-rdmacore52_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n-rdmacore52_0_execute_ioctl in cmd_ioctl.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in cmd_ioctl.c.o\n-rdmacore52_0__write_set_uhw in cmd_ioctl.c.o\n-rdmacore52_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_flow.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in init.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in init.c.o\n-rdmacore52_0___verbs_log in init.c.o\n-rdmacore52_0_try_access_device in init.c.o\n-rdmacore52_0_decode_knode_type in init.c.o\n-rdmacore52_0_setup_sysfs_uverbs in init.c.o\n-rdmacore52_0_verbs_register_driver_34 in init.c.o\n-rdmacore52_0_ibverbs_get_device_list in init.c.o\n-rdmacore52_0_abi_ver in init.c.o\n-rdmacore52_0_ibverbs_init in init.c.o\n-rdmacore52_0_ibverbs_device_hold in init.c.o\n-rdmacore52_0_ibverbs_device_put in init.c.o\n-rdmacore52_0_ibv_cmd_destroy_ah in cmd_ah.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_ah.c.o\n-rdmacore52_0_ibv_cmd_dealloc_mw in cmd_mw.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_mw.c.o\n-rdmacore52_0_ibv_cmd_close_xrcd in cmd_xrcd.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_xrcd.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in cmd_flow_action.c.o\n rdmacore52_0_ibv_cmd_create_flow_action_esp in cmd_flow_action.c.o\n rdmacore52_0___x86.get_pc_thunk.di in cmd_flow_action.c.o\n rdmacore52_0_ibv_cmd_modify_flow_action_esp in cmd_flow_action.c.o\n rdmacore52_0_ibv_cmd_destroy_flow_action in cmd_flow_action.c.o\n-rdmacore52_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in cmd_dm.c.o\n-rdmacore52_0_ibv_cmd_free_dm in cmd_dm.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_dm.c.o\n-rdmacore52_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in neigh.c.o\n-rdmacore52_0_neigh_get_oif_from_src in neigh.c.o\n-rdmacore52_0_neigh_init_resources in neigh.c.o\n-rdmacore52_0_neigh_get_vlan_id_from_dev in neigh.c.o\n-rdmacore52_0_neigh_set_vlan_id in neigh.c.o\n-rdmacore52_0_neigh_set_dst in neigh.c.o\n-rdmacore52_0_neigh_set_src in neigh.c.o\n-rdmacore52_0_neigh_set_oif in neigh.c.o\n-rdmacore52_0_neigh_get_ll in neigh.c.o\n-rdmacore52_0_neigh_free_resources in neigh.c.o\n-rdmacore52_0_process_get_neigh in neigh.c.o\n-rdmacore52_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cmd_rwq_ind.c.o\n-verbs_provider_all in all_providers.c.o\n-rdmacore52_0_close_node_name_map in node_name_map.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in node_name_map.c.o\n-rdmacore52_0_remap_node_name in node_name_map.c.o\n-rdmacore52_0_clean_nodedesc in node_name_map.c.o\n-rdmacore52_0_open_node_name_map in node_name_map.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in node_name_map.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cmd_device.c.o\n+rdmacore52_0_ibv_cmd_query_port in cmd_device.c.o\n+rdmacore52_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n+rdmacore52_0_ibv_cmd_get_context in cmd_device.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in cmd_device.c.o\n+rdmacore52_0_ibv_cmd_query_context in cmd_device.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in cmd_device.c.o\n+rdmacore52_0___ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_table in cmd_device.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in cmd_device.c.o\n+rdmacore52_0_ibv_cmd_query_device_any in cmd_device.c.o\n+ibv_copy_ah_attr_from_kern in marshall.c.o\n+ibv_copy_qp_attr_from_kern in marshall.c.o\n+ibv_copy_path_rec_from_kern in marshall.c.o\n+ibv_copy_path_rec_to_kern in marshall.c.o\n+ibv_node_type_str in enum_strs.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in enum_strs.c.o\n+ibv_port_state_str in enum_strs.c.o\n+ibv_event_type_str in enum_strs.c.o\n+ibv_wc_status_str in enum_strs.c.o\n+rdmacore52_0_ibv_wr_opcode_str in enum_strs.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n+ibv_rate_to_mult in verbs.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in verbs.c.o\n+mult_to_ibv_rate in verbs.c.o\n+ibv_rate_to_mbps in verbs.c.o\n+mbps_to_ibv_rate in verbs.c.o\n+ibv_query_device in verbs.c.o\n+rdmacore52_0___lib_query_port in verbs.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in verbs.c.o\n+ibv_query_port in verbs.c.o\n+ibv_query_gid in verbs.c.o\n+ibv_query_pkey in verbs.c.o\n+ibv_get_pkey_index in verbs.c.o\n+ibv_alloc_pd in verbs.c.o\n+ibv_dealloc_pd in verbs.c.o\n+ibv_reg_mr_iova2 in verbs.c.o\n+ibv_reg_mr in verbs.c.o\n+ibv_reg_mr_iova in verbs.c.o\n+ibv_import_pd in verbs.c.o\n+ibv_unimport_pd in verbs.c.o\n+ibv_import_mr in verbs.c.o\n+ibv_unimport_mr in verbs.c.o\n+ibv_import_dm in verbs.c.o\n+ibv_unimport_dm in verbs.c.o\n+ibv_reg_dmabuf_mr in verbs.c.o\n+ibv_rereg_mr in verbs.c.o\n+ibv_dereg_mr in verbs.c.o\n+ibv_create_comp_channel in verbs.c.o\n+ibv_destroy_comp_channel in verbs.c.o\n+ibv_create_cq in verbs.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in verbs.c.o\n+ibv_resize_cq in verbs.c.o\n+ibv_destroy_cq in verbs.c.o\n+ibv_get_cq_event in verbs.c.o\n+ibv_ack_cq_events in verbs.c.o\n+ibv_create_srq in verbs.c.o\n+ibv_modify_srq in verbs.c.o\n+ibv_query_srq in verbs.c.o\n+ibv_destroy_srq in verbs.c.o\n+ibv_create_qp in verbs.c.o\n+ibv_qp_to_qp_ex in verbs.c.o\n+ibv_query_qp in verbs.c.o\n+ibv_query_qp_data_in_order in verbs.c.o\n+ibv_modify_qp in verbs.c.o\n+ibv_destroy_qp in verbs.c.o\n+ibv_create_ah in verbs.c.o\n+rdmacore52_0_ibv_query_gid_type in verbs.c.o\n+ibv_init_ah_from_wc in verbs.c.o\n+ibv_create_ah_from_wc in verbs.c.o\n+ibv_destroy_ah in verbs.c.o\n+ibv_attach_mcast in verbs.c.o\n+ibv_detach_mcast in verbs.c.o\n+ibv_resolve_eth_l2_from_gid in verbs.c.o\n+ibv_set_ece in verbs.c.o\n+ibv_query_ece in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in mmio.c.o\n rdmacore52_0___x86.get_pc_thunk.si in mmio.c.o\n mmio_write64_be in mmio.c.o\n-rdmacore52_0_cl_qmap_init in cl_map.c.o\n-rdmacore52_0_cl_qmap_get in cl_map.c.o\n-rdmacore52_0_cl_qmap_get_next in cl_map.c.o\n-rdmacore52_0_cl_qmap_apply_func in cl_map.c.o\n-rdmacore52_0_cl_qmap_insert in cl_map.c.o\n-rdmacore52_0_cl_qmap_remove_item in cl_map.c.o\n-rdmacore52_0_cl_qmap_remove in cl_map.c.o\n-rdmacore52_0_cl_qmap_merge in cl_map.c.o\n-rdmacore52_0_cl_qmap_delta in cl_map.c.o\n-rdmacore52_0_bitmap_find_first_bit in bitmap.c.o\n-rdmacore52_0_bitmap_zero_region in bitmap.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in bitmap.c.o\n-rdmacore52_0_bitmap_fill_region in bitmap.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in bitmap.c.o\n-rdmacore52_0_bitmap_find_free_region in bitmap.c.o\n rdmacore52_0_rdmanl_socket_alloc in rdma_nl.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_devices in rdma_nl.c.o\n rdmacore52_0_rdmanl_get_chardev in rdma_nl.c.o\n rdmacore52_0_rdmanl_policy in rdma_nl.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in open_cdev.c.o\n-rdmacore52_0_open_cdev in open_cdev.c.o\n+rdmacore52_0_bitmap_find_first_bit in bitmap.c.o\n+rdmacore52_0_bitmap_zero_region in bitmap.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in bitmap.c.o\n+rdmacore52_0_bitmap_fill_region in bitmap.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in bitmap.c.o\n+rdmacore52_0_bitmap_find_free_region in bitmap.c.o\n rdmacore52_0_set_fd_nonblock in util.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in util.c.o\n rdmacore52_0_get_random in util.c.o\n rdmacore52_0_check_env in util.c.o\n rdmacore52_0_xorshift32 in util.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in open_cdev.c.o\n+rdmacore52_0_open_cdev in open_cdev.c.o\n+rdmacore52_0_close_node_name_map in node_name_map.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in node_name_map.c.o\n+rdmacore52_0_remap_node_name in node_name_map.c.o\n+rdmacore52_0_clean_nodedesc in node_name_map.c.o\n+rdmacore52_0_open_node_name_map in node_name_map.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in node_name_map.c.o\n rdmacore52_0_iset_create in interval_set.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in interval_set.c.o\n rdmacore52_0_iset_destroy in interval_set.c.o\n rdmacore52_0_iset_insert_range in interval_set.c.o\n rdmacore52_0_iset_alloc_range in interval_set.c.o\n+rdmacore52_0_cl_qmap_init in cl_map.c.o\n+rdmacore52_0_cl_qmap_get in cl_map.c.o\n+rdmacore52_0_cl_qmap_get_next in cl_map.c.o\n+rdmacore52_0_cl_qmap_apply_func in cl_map.c.o\n+rdmacore52_0_cl_qmap_insert in cl_map.c.o\n+rdmacore52_0_cl_qmap_remove_item in cl_map.c.o\n+rdmacore52_0_cl_qmap_remove in cl_map.c.o\n+rdmacore52_0_cl_qmap_merge in cl_map.c.o\n+rdmacore52_0_cl_qmap_delta in cl_map.c.o\n \n-static_driver.c.o:\n-00000000 T ibv_static_providers\n-00000000 R verbs_provider_none\n-\n-cmd_mr.c.o:\n+cmd_xrcd.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n          U __stack_chk_fail_local\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n          U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_ioctl_fallback\n-         U rdmacore52_0_execute_ioctl\n-00000000 T rdmacore52_0_ibv_cmd_advise_mr\n-000001a0 T rdmacore52_0_ibv_cmd_dereg_mr\n-00000290 T rdmacore52_0_ibv_cmd_query_mr\n-000003d0 T rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n+00000000 T rdmacore52_0_ibv_cmd_close_xrcd\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-memory.c.o:\n-00000000 r .LC0\n-0000000f r .LC1\n-00000012 r .LC2\n-00000018 r .LC3\n-00000028 r .LC4\n-00000030 r .LC7\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __isoc99_sscanf\n-00000000 t __mm_remove\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U fclose\n-         U fgets\n-         U fopen64\n-         U free\n-00000510 t get_page_size\n-         U getenv\n-         U getpid\n-00000004 b huge_page_enabled\n-000010b0 T ibv_dofork_range\n-00001060 T ibv_dontfork_range\n-00000e80 T ibv_fork_init\n-00001020 T ibv_is_fork_initialized\n-00000970 t ibv_madvise_range.part.0\n-00000007 t ibv_madvise_range.part.0.cold\n-         U madvise\n-         U malloc\n-0000000c b mm_mutex\n-00000024 b mm_root\n-00000008 b page_size\n-         U posix_memalign\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-         U rdmacore52_0_get_copy_on_fork\n-00000680 t split_range\n-00000000 t split_range.cold\n-         U strstr\n-         U sysconf\n-00000000 b too_late\n-\n dummy_ops.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n 00000000 t advise_mr\n 00000240 t alloc_dm\n 00000210 t alloc_mw\n 000001e0 t alloc_null_mr\n@@ -421,128 +366,377 @@\n 000000f0 t rereg_mr\n 00000270 t resize_cq\n 00000290 t set_ece\n 000004d0 t unimport_dm\n 000004e0 t unimport_mr\n 000002a0 t unimport_pd\n \n-verbs.c.o:\n-00000260 t .L36\n-00000270 t .L38\n-00000280 t .L39\n-00000290 t .L40\n-000002a0 t .L41\n-000002b0 t .L42\n-000002c0 t .L43\n-000002d0 t .L44\n-00000250 t .L45\n-000002f0 t .L46\n-00000200 t .L48\n-000002e0 t .L49\n-00000000 r .LC0\n-00000012 r .LC1\n-00000140 r CSWTCH.39\n-000000e0 r CSWTCH.42\n+neigh.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n-         U __isoc23_sscanf\n+         U __fdelt_chk\n          U __stack_chk_fail_local\n+         U bind\n          U close\n-         U free\n-000011f0 T ibv_ack_cq_events\n-00000920 T ibv_alloc_pd\n-00001a90 T ibv_attach_mcast\n-00001410 T ibv_create_ah\n-000017b0 T ibv_create_ah_from_wc\n-00000f80 T ibv_create_comp_channel\n-00001090 T ibv_create_cq\n-00001300 T ibv_create_qp\n-00001230 T ibv_create_srq\n-00000940 T ibv_dealloc_pd\n-00000f00 T ibv_dereg_mr\n-00001a70 T ibv_destroy_ah\n-00001020 T ibv_destroy_comp_channel\n-00001100 T ibv_destroy_cq\n-000013f0 T ibv_destroy_qp\n-000012e0 T ibv_destroy_srq\n-00001ab0 T ibv_detach_mcast\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-00000000 t ibv_find_gid_index\n-00001170 T ibv_get_cq_event\n-00000840 T ibv_get_pkey_index\n-00000cd0 T ibv_import_dm\n-00000c90 T ibv_import_mr\n-00000c50 T ibv_import_pd\n-000014f0 T ibv_init_ah_from_wc\n-000013b0 T ibv_modify_qp\n-000012a0 T ibv_modify_srq\n-00001310 T ibv_qp_to_qp_ex\n-00000510 T ibv_query_device\n-00001ed0 T ibv_query_ece\n-000006d0 T ibv_query_gid\n-000007a0 T ibv_query_pkey\n-00000610 T ibv_query_port\n-00001330 T ibv_query_qp\n-00001370 T ibv_query_qp_data_in_order\n-000012c0 T ibv_query_srq\n-00000300 T ibv_rate_to_mbps\n-000001a0 T ibv_rate_to_mult\n-00000d10 T ibv_reg_dmabuf_mr\n-00000a50 T ibv_reg_mr\n-00000b50 T ibv_reg_mr_iova\n-00000950 T ibv_reg_mr_iova2\n-00000d70 T ibv_rereg_mr\n-000010e0 T ibv_resize_cq\n-00001ad0 T ibv_resolve_eth_l2_from_gid\n-00001e70 T ibv_set_ece\n-00000cf0 T ibv_unimport_dm\n-00000cb0 T ibv_unimport_mr\n-00000c70 T ibv_unimport_pd\n-         U malloc\n-00000330 T mbps_to_ibv_rate\n+00000000 d encoded_prefixes\n+         U freeaddrinfo\n+         U freeifaddrs\n+00000110 t get_link_local_mac_ipv6\n+00000080 t get_mcast_mac_ipv4\n+00000000 t get_mcast_mac_ipv6\n+000001b0 t get_neigh_cb\n+000001f0 t get_neigh_cb_event\n+000006f0 t get_route_cb\n+00000260 t get_route_cb_parser\n+         U getifaddrs\n+         U if_nametoindex\n+         U memcmp\n          U memcpy\n-         U memset\n-000001d0 T mult_to_ibv_rate\n+         U nl_addr_build\n+         U nl_addr_clone\n+         U nl_addr_fill_sockaddr\n+         U nl_addr_get_binary_addr\n+         U nl_addr_get_family\n+         U nl_addr_get_len\n+         U nl_addr_get_prefixlen\n+         U nl_addr_info\n+         U nl_addr_put\n+         U nl_addr_set_prefixlen\n+         U nl_cache_free\n+         U nl_cache_mngt_provide\n+         U nl_cache_mngt_unprovide\n+         U nl_cache_refill\n+         U nl_connect\n+         U nl_msg_parse\n+         U nl_object_match_filter\n+         U nl_recvmsgs_default\n+         U nl_send_auto\n+         U nl_socket_add_membership\n+         U nl_socket_alloc\n+         U nl_socket_disable_seq_check\n+         U nl_socket_free\n+         U nl_socket_get_fd\n+         U nl_socket_modify_cb\n+         U nla_put\n+         U nlmsg_alloc_simple\n+         U nlmsg_append\n+         U nlmsg_free\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00001340 T rdmacore52_0_neigh_free_resources\n+000012e0 T rdmacore52_0_neigh_get_ll\n+00000eb0 T rdmacore52_0_neigh_get_oif_from_src\n+000011a0 T rdmacore52_0_neigh_get_vlan_id_from_dev\n+00001020 T rdmacore52_0_neigh_init_resources\n+00001250 T rdmacore52_0_neigh_set_dst\n+000012d0 T rdmacore52_0_neigh_set_oif\n+00001290 T rdmacore52_0_neigh_set_src\n+00001230 T rdmacore52_0_neigh_set_vlan_id\n+00001450 T rdmacore52_0_process_get_neigh\n+         U read\n+         U rtnl_link_alloc_cache\n+         U rtnl_link_get\n+         U rtnl_link_get_addr\n+         U rtnl_link_is_vlan\n+         U rtnl_link_put\n+         U rtnl_link_vlan_get_id\n+         U rtnl_neigh_alloc\n+         U rtnl_neigh_alloc_cache\n+         U rtnl_neigh_get\n+         U rtnl_neigh_get_lladdr\n+         U rtnl_neigh_put\n+         U rtnl_neigh_set_dst\n+         U rtnl_neigh_set_ifindex\n+         U rtnl_route_alloc_cache\n+         U rtnl_route_get_pref_src\n+         U rtnl_route_get_type\n+         U rtnl_route_nexthop_n\n+         U rtnl_route_nh_get_gateway\n+         U rtnl_route_nh_get_ifindex\n+         U select\n+         U sendto\n+         U socket\n+         U timerfd_create\n+         U timerfd_settime\n+\n+cmd_qp.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+00000000 t ibv_icmd_create_qp\n          U pthread_cond_init\n-         U pthread_cond_signal\n+         U pthread_cond_wait\n          U pthread_mutex_init\n          U pthread_mutex_lock\n          U pthread_mutex_unlock\n-         U rdmacore52_0___ibv_query_gid_ex\n-00000530 T rdmacore52_0___lib_query_port\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+         U rdmacore52_0___ioctl_final_num_attrs\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n          U rdmacore52_0__execute_cmd_write\n-00001440 T rdmacore52_0_ibv_query_gid_type\n+         U rdmacore52_0__execute_cmd_write_ex\n+         U rdmacore52_0__execute_ioctl_fallback\n+         U rdmacore52_0__write_get_req\n+         U rdmacore52_0__write_get_req_ex\n+         U rdmacore52_0__write_get_resp\n+         U rdmacore52_0__write_get_resp_ex\n+         U rdmacore52_0__write_set_uhw\n+         U rdmacore52_0_abi_ver\n+00001050 T rdmacore52_0_ibv_cmd_create_qp\n+000011e0 T rdmacore52_0_ibv_cmd_create_qp_ex\n+000012d0 T rdmacore52_0_ibv_cmd_create_qp_ex2\n+000013c0 T rdmacore52_0_ibv_cmd_destroy_qp\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n+\n+cmd_dm.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U rdmacore52_0___ioctl_final_num_attrs\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+         U rdmacore52_0_execute_ioctl\n+00000000 T rdmacore52_0_ibv_cmd_alloc_dm\n+000001d0 T rdmacore52_0_ibv_cmd_free_dm\n+00000290 T rdmacore52_0_ibv_cmd_reg_dm_mr\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n+\n+init.c.o:\n+000003db t .L34\n+000002e8 t .L35\n+000002f8 t .L37\n+00000308 t .L38\n+00000318 t .L39\n+00000118 t .L44\n+00000000 r .LC0\n+00000010 r .LC1\n+0000006f r .LC10\n+0000007b r .LC11\n+00000095 r .LC12\n+0000009b r .LC13\n+000000b2 r .LC14\n+0000009c r .LC15\n+000000d4 r .LC16\n+000000f8 r .LC17\n+000000bc r .LC18\n+00000144 r .LC19\n+00000022 r .LC2\n+000000ce r .LC20\n+000000de r .LC21\n+0000018c r .LC22\n+000000ec r .LC23\n+00000109 r .LC24\n+000001cc r .LC25\n+00000204 r .LC26\n+00000123 r .LC27\n+00000133 r .LC28\n+00000142 r .LC29\n+00000000 r .LC3\n+00000068 r .LC4\n+00000032 r .LC5\n+0000004f r .LC6\n+00000062 r .LC7\n+00000065 r .LC8\n+00000069 r .LC9\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __asprintf_chk\n+         U __errno_location\n+         U __fprintf_chk\n+         U __isoc23_sscanf\n+         U __isoc23_strtol\n+         U __isoc23_strtoul\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U __strcpy_chk\n+         U __vfprintf_chk\n+         U calloc\n+         U close\n+         U closedir\n+         U dirfd\n+00000000 d driver_list\n+00000004 b drivers_loaded.0\n+00000870 t find_sysfs_devs\n+         U fnmatch\n+         U fopen64\n+         U free\n+         U fwrite\n+         U getenv\n+         U geteuid\n+         U getrlimit64\n+         U ibv_fork_init\n+         U ibv_get_sysfs_path\n+         U ibv_read_sysfs_file\n+         U malloc\n+         U openat64\n+         U opendir\n+000005f0 T rdmacore52_0___verbs_log\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+00000000 B rdmacore52_0_abi_ver\n+         U rdmacore52_0_check_env\n+000006c0 T rdmacore52_0_decode_knode_type\n+         U rdmacore52_0_find_sysfs_devs_nl\n          U rdmacore52_0_ibv_read_ibdev_sysfs_file\n-         U rdmacore52_0_neigh_free_resources\n-         U rdmacore52_0_neigh_get_ll\n-         U rdmacore52_0_neigh_get_oif_from_src\n-         U rdmacore52_0_neigh_get_vlan_id_from_dev\n-         U rdmacore52_0_neigh_init_resources\n-         U rdmacore52_0_neigh_set_dst\n-         U rdmacore52_0_neigh_set_oif\n-         U rdmacore52_0_neigh_set_src\n-         U rdmacore52_0_neigh_set_vlan_id\n-         U rdmacore52_0_process_get_neigh\n-         U rdmacore52_0_verbs_init_cq\n-         U read\n+         U rdmacore52_0_ibv_read_sysfs_file_at\n+00001110 T rdmacore52_0_ibverbs_device_hold\n+00001120 T rdmacore52_0_ibverbs_device_put\n+00000bb0 T rdmacore52_0_ibverbs_get_device_list\n+00000ef0 T rdmacore52_0_ibverbs_init\n+000006e0 T rdmacore52_0_setup_sysfs_uverbs\n+00000640 T rdmacore52_0_try_access_device\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n+00000b40 T rdmacore52_0_verbs_register_driver_34\n+         U readdir64\n+         U snprintf\n+         U stat64\n+         U stderr\n+         U strcmp\n+         U strcpy\n+00000460 t try_all_drivers\n+00000000 t try_driver\n+00000008 b verbs_log_fp\n+0000000c b verbs_log_level\n \n-cmd_pd.c.o:\n+cmd_mw.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n          U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_dealloc_pd\n+00000000 T rdmacore52_0_ibv_cmd_dealloc_mw\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n+sysfs.c.o:\n+00000000 r .LC0\n+00000005 r .LC1\n+00000010 r .LC2\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __asprintf_chk\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U __vasprintf_chk\n+         U close\n+         U free\n+         U getenv\n+         U geteuid\n+         U getuid\n+00000000 T ibv_get_sysfs_path\n+00000140 T ibv_read_sysfs_file\n+         U openat64\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000230 T rdmacore52_0_ibv_read_ibdev_sysfs_file\n+000000b0 T rdmacore52_0_ibv_read_sysfs_file_at\n+         U read\n+         U strlen\n+         U strndup\n+00000000 b sysfs_path\n+\n+cmd_wq.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U pthread_cond_wait\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U rdmacore52_0___ioctl_final_num_attrs\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0__execute_cmd_write_ex\n+         U rdmacore52_0__execute_ioctl_fallback\n+         U rdmacore52_0__write_get_req_ex\n+         U rdmacore52_0__write_get_resp_ex\n+         U rdmacore52_0__write_set_uhw\n+00000000 T rdmacore52_0_ibv_cmd_create_wq\n+000006a0 T rdmacore52_0_ibv_cmd_destroy_wq\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n+\n+memory.c.o:\n+00000000 r .LC0\n+0000000f r .LC1\n+00000012 r .LC2\n+00000018 r .LC3\n+00000028 r .LC4\n+00000030 r .LC7\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __isoc99_sscanf\n+00000000 t __mm_remove\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U fclose\n+         U fgets\n+         U fopen64\n+         U free\n+00000510 t get_page_size\n+         U getenv\n+         U getpid\n+00000004 b huge_page_enabled\n+000010b0 T ibv_dofork_range\n+00001060 T ibv_dontfork_range\n+00000e80 T ibv_fork_init\n+00001020 T ibv_is_fork_initialized\n+00000970 t ibv_madvise_range.part.0\n+00000007 t ibv_madvise_range.part.0.cold\n+         U madvise\n+         U malloc\n+0000000c b mm_mutex\n+00000024 b mm_root\n+00000008 b page_size\n+         U posix_memalign\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+         U rdmacore52_0_get_copy_on_fork\n+00000680 t split_range\n+00000000 t split_range.cold\n+         U strstr\n+         U sysconf\n+00000000 b too_late\n+\n+ibdev_nl.c.o:\n+00000000 r .LC0\n+00000003 r .LC1\n+0000001a r .LC2\n+00000021 r .LC3\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U calloc\n+         U close\n+         U closedir\n+         U dirfd\n+000000a0 t find_sysfs_devs_nl_cb\n+00000260 t find_uverbs_nl_cb\n+         U free\n+00000000 t get_copy_on_fork_cb\n+         U ibv_get_sysfs_path\n+         U nl_socket_free\n+         U nla_get_string\n+         U nla_get_u32\n+         U nla_get_u64\n+         U nla_get_u8\n+         U nlmsg_hdr\n+         U nlmsg_parse\n+         U openat64\n+         U opendir\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_abi_ver\n+         U rdmacore52_0_decode_knode_type\n+000003e0 T rdmacore52_0_find_sysfs_devs_nl\n+00000650 T rdmacore52_0_get_copy_on_fork\n+         U rdmacore52_0_rdmanl_get_chardev\n+         U rdmacore52_0_rdmanl_get_copy_on_fork\n+         U rdmacore52_0_rdmanl_get_devices\n+         U rdmacore52_0_rdmanl_policy\n+         U rdmacore52_0_rdmanl_socket_alloc\n+         U rdmacore52_0_setup_sysfs_uverbs\n+         U rdmacore52_0_try_access_device\n+         U readdir64\n+         U snprintf\n+\n cmd_srq.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n 00000000 t ibv_icmd_create_srq\n          U pthread_cond_init\n          U pthread_cond_wait\n@@ -558,32 +752,48 @@\n          U rdmacore52_0__write_set_uhw\n          U rdmacore52_0_abi_ver\n 000009d0 T rdmacore52_0_ibv_cmd_create_srq\n 00000af0 T rdmacore52_0_ibv_cmd_create_srq_ex\n 00000be0 T rdmacore52_0_ibv_cmd_destroy_srq\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_wq.c.o:\n-00000000 r .LC0\n+all_providers.c.o:\n+00000000 d all_providers\n+00000000 D verbs_provider_all\n+         U verbs_provider_bnxt_re\n+         U verbs_provider_cxgb4\n+         U verbs_provider_efa\n+         U verbs_provider_erdma\n+         U verbs_provider_hfi1verbs\n+         U verbs_provider_hns\n+         U verbs_provider_ipathverbs\n+         U verbs_provider_irdma\n+         U verbs_provider_mana\n+         U verbs_provider_mlx4\n+         U verbs_provider_mlx5\n+         U verbs_provider_mthca\n+         U verbs_provider_ocrdma\n+         U verbs_provider_qedr\n+         U verbs_provider_rxe\n+         U verbs_provider_siw\n+         U verbs_provider_vmw_pvrdma\n+\n+cmd_mr.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n-         U pthread_cond_wait\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U rdmacore52_0___ioctl_final_num_attrs\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0__execute_cmd_write_ex\n+         U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_ioctl_fallback\n-         U rdmacore52_0__write_get_req_ex\n-         U rdmacore52_0__write_get_resp_ex\n-         U rdmacore52_0__write_set_uhw\n-00000000 T rdmacore52_0_ibv_cmd_create_wq\n-000006a0 T rdmacore52_0_ibv_cmd_destroy_wq\n+         U rdmacore52_0_execute_ioctl\n+00000000 T rdmacore52_0_ibv_cmd_advise_mr\n+000001a0 T rdmacore52_0_ibv_cmd_dereg_mr\n+00000290 T rdmacore52_0_ibv_cmd_query_mr\n+000003d0 T rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n cmd.c.o:\n 00001d00 t .L420\n 00001ac0 t .L422\n 00001b68 t .L424\n 00001c10 t .L425\n@@ -632,81 +842,43 @@\n 00000720 T rdmacore52_0_ibv_cmd_query_srq\n 000001e0 T rdmacore52_0_ibv_cmd_reg_mr\n 000005d0 T rdmacore52_0_ibv_cmd_req_notify_cq\n 000002f0 T rdmacore52_0_ibv_cmd_rereg_mr\n 00000640 T rdmacore52_0_ibv_cmd_resize_cq\n 00000000 B rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_device.c.o:\n-00000000 r .LC0\n-0000001c r .LC1\n-00000026 r .LC2\n-0000002c r .LC3\n-00000039 r .LC4\n-0000004c r .LC6\n-0000005d r .LC7\n-00000061 r .LC8\n-00000000 r .LC9\n+cmd_counters.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __asprintf_chk\n-         U __errno_location\n-         U __isoc23_sscanf\n          U __stack_chk_fail_local\n-000011a0 T _ibv_query_gid_ex\n-000011d0 T _ibv_query_gid_table\n-         U closedir\n-         U free\n-         U ibv_query_device\n-         U ibv_query_port\n-         U if_nametoindex\n-         U memset\n-         U opendir\n-00000170 t query_gid_table_fb\n-00000000 t query_sysfs_gid_type.isra.0\n-00000ca0 T rdmacore52_0___ibv_query_gid_ex\n          U rdmacore52_0___ioctl_final_num_attrs\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0__execute_cmd_write\n-         U rdmacore52_0__execute_cmd_write_ex\n-         U rdmacore52_0__execute_ioctl_fallback\n-         U rdmacore52_0__write_get_req\n-         U rdmacore52_0__write_get_resp\n-         U rdmacore52_0__write_set_uhw\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n          U rdmacore52_0_execute_ioctl\n-000007c0 T rdmacore52_0_ibv_cmd_alloc_async_fd\n-00000880 T rdmacore52_0_ibv_cmd_get_context\n-00000b40 T rdmacore52_0_ibv_cmd_query_context\n-00001400 T rdmacore52_0_ibv_cmd_query_device_any\n-00000550 T rdmacore52_0_ibv_cmd_query_port\n-         U rdmacore52_0_ibv_read_ibdev_sysfs_file\n-         U strcmp\n+00000000 T rdmacore52_0_ibv_cmd_create_counters\n+00000150 T rdmacore52_0_ibv_cmd_destroy_counters\n+00000210 T rdmacore52_0_ibv_cmd_read_counters\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_cq.c.o:\n+cmd_ioctl.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U ioctl\n+00000000 T rdmacore52_0___ioctl_final_num_attrs\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+000003a0 T rdmacore52_0__write_set_uhw\n+00000040 T rdmacore52_0_execute_ioctl\n+\n+cmd_rwq_ind.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n-00000000 t ibv_icmd_create_cq\n-         U pthread_cond_wait\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U rdmacore52_0___ioctl_final_num_attrs\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_cmd_write_ex\n          U rdmacore52_0__execute_ioctl_fallback\n-         U rdmacore52_0__write_get_req\n-         U rdmacore52_0__write_get_req_ex\n-         U rdmacore52_0__write_get_resp\n-         U rdmacore52_0__write_get_resp_ex\n-         U rdmacore52_0__write_set_uhw\n-000005a0 T rdmacore52_0_ibv_cmd_create_cq\n-00000680 T rdmacore52_0_ibv_cmd_create_cq_ex\n-000007a0 T rdmacore52_0_ibv_cmd_destroy_cq\n+00000000 T rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n device.c.o:\n 00000be0 t .L174\n 00000c78 t .L179\n 00000cc0 t .L181\n 00000c50 t .L183\n@@ -760,305 +932,92 @@\n 000004a0 T rdmacore52_0_verbs_init_context\n 00000420 T rdmacore52_0_verbs_init_cq\n 000006b0 T rdmacore52_0_verbs_open_device\n          U rdmacore52_0_verbs_set_ops\n 00000af0 T rdmacore52_0_verbs_uninit_context\n          U read\n \n-ibdev_nl.c.o:\n-00000000 r .LC0\n-00000003 r .LC1\n-0000001a r .LC2\n-00000021 r .LC3\n+dynamic_driver.c.o:\n+\n+cmd_flow.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __snprintf_chk\n          U __stack_chk_fail_local\n-         U calloc\n-         U close\n-         U closedir\n-         U dirfd\n-000000a0 t find_sysfs_devs_nl_cb\n-00000260 t find_uverbs_nl_cb\n-         U free\n-00000000 t get_copy_on_fork_cb\n-         U ibv_get_sysfs_path\n-         U nl_socket_free\n-         U nla_get_string\n-         U nla_get_u32\n-         U nla_get_u64\n-         U nla_get_u8\n-         U nlmsg_hdr\n-         U nlmsg_parse\n-         U openat64\n-         U opendir\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_abi_ver\n-         U rdmacore52_0_decode_knode_type\n-000003e0 T rdmacore52_0_find_sysfs_devs_nl\n-00000650 T rdmacore52_0_get_copy_on_fork\n-         U rdmacore52_0_rdmanl_get_chardev\n-         U rdmacore52_0_rdmanl_get_copy_on_fork\n-         U rdmacore52_0_rdmanl_get_devices\n-         U rdmacore52_0_rdmanl_policy\n-         U rdmacore52_0_rdmanl_socket_alloc\n-         U rdmacore52_0_setup_sysfs_uverbs\n-         U rdmacore52_0_try_access_device\n-         U readdir64\n-         U snprintf\n+         U rdmacore52_0__execute_cmd_write_ex\n+         U rdmacore52_0__execute_ioctl_fallback\n+00000000 T rdmacore52_0_ibv_cmd_destroy_flow\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_counters.c.o:\n+cmd_ah.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n-         U rdmacore52_0___ioctl_final_num_attrs\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-         U rdmacore52_0_execute_ioctl\n-00000000 T rdmacore52_0_ibv_cmd_create_counters\n-00000150 T rdmacore52_0_ibv_cmd_destroy_counters\n-00000210 T rdmacore52_0_ibv_cmd_read_counters\n+         U rdmacore52_0__execute_cmd_write\n+         U rdmacore52_0__execute_ioctl_fallback\n+00000000 T rdmacore52_0_ibv_cmd_destroy_ah\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-enum_strs.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-000000a0 d event_type_str.2\n-00000060 T ibv_event_type_str\n-00000000 T ibv_node_type_str\n-00000030 T ibv_port_state_str\n-00000090 T ibv_wc_status_str\n-00000120 d node_type_str.4\n-000000f0 d port_state_str.3\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-000000c0 T rdmacore52_0_ibv_wr_opcode_str\n-00000040 d wc_status_str.1\n-00000000 d wr_opcode_str.0\n-\n-cmd_fallback.c.o:\n+cmd_pd.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n          U __stack_chk_fail_local\n-00000000 t ioctl_write\n-         U memcpy\n-         U memset\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000310 T rdmacore52_0__check_legacy\n-00000710 T rdmacore52_0__execute_cmd_write\n-00000860 T rdmacore52_0__execute_cmd_write_ex\n-000003d0 T rdmacore52_0__execute_ioctl_fallback\n-000005e0 T rdmacore52_0__write_get_req\n-00000630 T rdmacore52_0__write_get_req_ex\n-00000680 T rdmacore52_0__write_get_resp\n-000006d0 T rdmacore52_0__write_get_resp_ex\n-         U rdmacore52_0_execute_ioctl\n-         U write\n+         U rdmacore52_0__execute_cmd_write\n+         U rdmacore52_0__execute_ioctl_fallback\n+00000000 T rdmacore52_0_ibv_cmd_dealloc_pd\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_qp.c.o:\n+cmd_cq.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n          U __stack_chk_fail_local\n-00000000 t ibv_icmd_create_qp\n-         U pthread_cond_init\n+00000000 t ibv_icmd_create_cq\n          U pthread_cond_wait\n-         U pthread_mutex_init\n          U pthread_mutex_lock\n          U pthread_mutex_unlock\n          U rdmacore52_0___ioctl_final_num_attrs\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n          U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_cmd_write_ex\n          U rdmacore52_0__execute_ioctl_fallback\n          U rdmacore52_0__write_get_req\n          U rdmacore52_0__write_get_req_ex\n          U rdmacore52_0__write_get_resp\n          U rdmacore52_0__write_get_resp_ex\n          U rdmacore52_0__write_set_uhw\n-         U rdmacore52_0_abi_ver\n-00001050 T rdmacore52_0_ibv_cmd_create_qp\n-000011e0 T rdmacore52_0_ibv_cmd_create_qp_ex\n-000012d0 T rdmacore52_0_ibv_cmd_create_qp_ex2\n-000013c0 T rdmacore52_0_ibv_cmd_destroy_qp\n+000005a0 T rdmacore52_0_ibv_cmd_create_cq\n+00000680 T rdmacore52_0_ibv_cmd_create_cq_ex\n+000007a0 T rdmacore52_0_ibv_cmd_destroy_cq\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-marshall.c.o:\n-00000000 T ibv_copy_ah_attr_from_kern\n-000001b0 T ibv_copy_path_rec_from_kern\n-00000260 T ibv_copy_path_rec_to_kern\n-00000060 T ibv_copy_qp_attr_from_kern\n-\n-sysfs.c.o:\n-00000000 r .LC0\n-00000005 r .LC1\n-00000010 r .LC2\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __asprintf_chk\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U __vasprintf_chk\n-         U close\n-         U free\n-         U getenv\n-         U geteuid\n-         U getuid\n-00000000 T ibv_get_sysfs_path\n-00000140 T ibv_read_sysfs_file\n-         U openat64\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000230 T rdmacore52_0_ibv_read_ibdev_sysfs_file\n-000000b0 T rdmacore52_0_ibv_read_sysfs_file_at\n-         U read\n-         U strlen\n-         U strndup\n-00000000 b sysfs_path\n+static_driver.c.o:\n+00000000 T ibv_static_providers\n+00000000 R verbs_provider_none\n \n-cmd_ioctl.c.o:\n+cmd_fallback.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n-         U ioctl\n-00000000 T rdmacore52_0___ioctl_final_num_attrs\n+00000000 t ioctl_write\n+         U memcpy\n+         U memset\n 00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-000003a0 T rdmacore52_0__write_set_uhw\n-00000040 T rdmacore52_0_execute_ioctl\n-\n-cmd_flow.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__execute_cmd_write_ex\n-         U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_destroy_flow\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-\n-init.c.o:\n-000003db t .L34\n-000002e8 t .L35\n-000002f8 t .L37\n-00000308 t .L38\n-00000318 t .L39\n-00000118 t .L44\n-00000000 r .LC0\n-00000010 r .LC1\n-0000006f r .LC10\n-0000007b r .LC11\n-00000095 r .LC12\n-0000009b r .LC13\n-000000b2 r .LC14\n-0000009c r .LC15\n-000000d4 r .LC16\n-000000f8 r .LC17\n-000000bc r .LC18\n-00000144 r .LC19\n-00000022 r .LC2\n-000000ce r .LC20\n-000000de r .LC21\n-0000018c r .LC22\n-000000ec r .LC23\n-00000109 r .LC24\n-000001cc r .LC25\n-00000204 r .LC26\n-00000123 r .LC27\n-00000133 r .LC28\n-00000142 r .LC29\n-00000000 r .LC3\n-00000068 r .LC4\n-00000032 r .LC5\n-0000004f r .LC6\n-00000062 r .LC7\n-00000065 r .LC8\n-00000069 r .LC9\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __asprintf_chk\n-         U __errno_location\n-         U __fprintf_chk\n-         U __isoc23_sscanf\n-         U __isoc23_strtol\n-         U __isoc23_strtoul\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U __strcpy_chk\n-         U __vfprintf_chk\n-         U calloc\n-         U close\n-         U closedir\n-         U dirfd\n-00000000 d driver_list\n-00000004 b drivers_loaded.0\n-00000870 t find_sysfs_devs\n-         U fnmatch\n-         U fopen64\n-         U free\n-         U fwrite\n-         U getenv\n-         U geteuid\n-         U getrlimit64\n-         U ibv_fork_init\n-         U ibv_get_sysfs_path\n-         U ibv_read_sysfs_file\n-         U malloc\n-         U openat64\n-         U opendir\n-000005f0 T rdmacore52_0___verbs_log\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-00000000 B rdmacore52_0_abi_ver\n-         U rdmacore52_0_check_env\n-000006c0 T rdmacore52_0_decode_knode_type\n-         U rdmacore52_0_find_sysfs_devs_nl\n-         U rdmacore52_0_ibv_read_ibdev_sysfs_file\n-         U rdmacore52_0_ibv_read_sysfs_file_at\n-00001110 T rdmacore52_0_ibverbs_device_hold\n-00001120 T rdmacore52_0_ibverbs_device_put\n-00000bb0 T rdmacore52_0_ibverbs_get_device_list\n-00000ef0 T rdmacore52_0_ibverbs_init\n-000006e0 T rdmacore52_0_setup_sysfs_uverbs\n-00000640 T rdmacore52_0_try_access_device\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-00000b40 T rdmacore52_0_verbs_register_driver_34\n-         U readdir64\n-         U snprintf\n-         U stat64\n-         U stderr\n-         U strcmp\n-         U strcpy\n-00000460 t try_all_drivers\n-00000000 t try_driver\n-00000008 b verbs_log_fp\n-0000000c b verbs_log_level\n-\n-cmd_ah.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__execute_cmd_write\n-         U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_destroy_ah\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-\n-cmd_mw.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__execute_cmd_write\n-         U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_dealloc_mw\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-\n-dynamic_driver.c.o:\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000310 T rdmacore52_0__check_legacy\n+00000710 T rdmacore52_0__execute_cmd_write\n+00000860 T rdmacore52_0__execute_cmd_write_ex\n+000003d0 T rdmacore52_0__execute_ioctl_fallback\n+000005e0 T rdmacore52_0__write_get_req\n+00000630 T rdmacore52_0__write_get_req_ex\n+00000680 T rdmacore52_0__write_get_resp\n+000006d0 T rdmacore52_0__write_get_resp_ex\n+         U rdmacore52_0_execute_ioctl\n+         U write\n \n-cmd_xrcd.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__execute_cmd_write\n-         U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_close_xrcd\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n+compat-1_0.c.o:\n \n cmd_flow_action.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n 00000000 t copy_flow_action_esp.isra.0\n          U memcpy\n@@ -1067,181 +1026,186 @@\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n          U rdmacore52_0_execute_ioctl\n 000001f0 T rdmacore52_0_ibv_cmd_create_flow_action_esp\n 00000470 T rdmacore52_0_ibv_cmd_destroy_flow_action\n 00000350 T rdmacore52_0_ibv_cmd_modify_flow_action_esp\n          U rdmacore52_0_verbs_allow_disassociate_destroy\n \n-cmd_dm.c.o:\n+cmd_device.c.o:\n+00000000 r .LC0\n+0000001c r .LC1\n+00000026 r .LC2\n+0000002c r .LC3\n+00000039 r .LC4\n+0000004c r .LC6\n+0000005d r .LC7\n+00000061 r .LC8\n+00000000 r .LC9\n          U _GLOBAL_OFFSET_TABLE_\n+         U __asprintf_chk\n          U __errno_location\n+         U __isoc23_sscanf\n          U __stack_chk_fail_local\n+000011a0 T _ibv_query_gid_ex\n+000011d0 T _ibv_query_gid_table\n+         U closedir\n+         U free\n+         U ibv_query_device\n+         U ibv_query_port\n+         U if_nametoindex\n+         U memset\n+         U opendir\n+00000170 t query_gid_table_fb\n+00000000 t query_sysfs_gid_type.isra.0\n+00000ca0 T rdmacore52_0___ibv_query_gid_ex\n          U rdmacore52_0___ioctl_final_num_attrs\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-         U rdmacore52_0_execute_ioctl\n-00000000 T rdmacore52_0_ibv_cmd_alloc_dm\n-000001d0 T rdmacore52_0_ibv_cmd_free_dm\n-00000290 T rdmacore52_0_ibv_cmd_reg_dm_mr\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-\n-neigh.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __fdelt_chk\n-         U __stack_chk_fail_local\n-         U bind\n-         U close\n-00000000 d encoded_prefixes\n-         U freeaddrinfo\n-         U freeifaddrs\n-00000110 t get_link_local_mac_ipv6\n-00000080 t get_mcast_mac_ipv4\n-00000000 t get_mcast_mac_ipv6\n-000001b0 t get_neigh_cb\n-000001f0 t get_neigh_cb_event\n-000006f0 t get_route_cb\n-00000260 t get_route_cb_parser\n-         U getifaddrs\n-         U if_nametoindex\n-         U memcmp\n-         U memcpy\n-         U nl_addr_build\n-         U nl_addr_clone\n-         U nl_addr_fill_sockaddr\n-         U nl_addr_get_binary_addr\n-         U nl_addr_get_family\n-         U nl_addr_get_len\n-         U nl_addr_get_prefixlen\n-         U nl_addr_info\n-         U nl_addr_put\n-         U nl_addr_set_prefixlen\n-         U nl_cache_free\n-         U nl_cache_mngt_provide\n-         U nl_cache_mngt_unprovide\n-         U nl_cache_refill\n-         U nl_connect\n-         U nl_msg_parse\n-         U nl_object_match_filter\n-         U nl_recvmsgs_default\n-         U nl_send_auto\n-         U nl_socket_add_membership\n-         U nl_socket_alloc\n-         U nl_socket_disable_seq_check\n-         U nl_socket_free\n-         U nl_socket_get_fd\n-         U nl_socket_modify_cb\n-         U nla_put\n-         U nlmsg_alloc_simple\n-         U nlmsg_append\n-         U nlmsg_free\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00001340 T rdmacore52_0_neigh_free_resources\n-000012e0 T rdmacore52_0_neigh_get_ll\n-00000eb0 T rdmacore52_0_neigh_get_oif_from_src\n-000011a0 T rdmacore52_0_neigh_get_vlan_id_from_dev\n-00001020 T rdmacore52_0_neigh_init_resources\n-00001250 T rdmacore52_0_neigh_set_dst\n-000012d0 T rdmacore52_0_neigh_set_oif\n-00001290 T rdmacore52_0_neigh_set_src\n-00001230 T rdmacore52_0_neigh_set_vlan_id\n-00001450 T rdmacore52_0_process_get_neigh\n-         U read\n-         U rtnl_link_alloc_cache\n-         U rtnl_link_get\n-         U rtnl_link_get_addr\n-         U rtnl_link_is_vlan\n-         U rtnl_link_put\n-         U rtnl_link_vlan_get_id\n-         U rtnl_neigh_alloc\n-         U rtnl_neigh_alloc_cache\n-         U rtnl_neigh_get\n-         U rtnl_neigh_get_lladdr\n-         U rtnl_neigh_put\n-         U rtnl_neigh_set_dst\n-         U rtnl_neigh_set_ifindex\n-         U rtnl_route_alloc_cache\n-         U rtnl_route_get_pref_src\n-         U rtnl_route_get_type\n-         U rtnl_route_nexthop_n\n-         U rtnl_route_nh_get_gateway\n-         U rtnl_route_nh_get_ifindex\n-         U select\n-         U sendto\n-         U socket\n-         U timerfd_create\n-         U timerfd_settime\n-\n-cmd_rwq_ind.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0__execute_cmd_write\n          U rdmacore52_0__execute_cmd_write_ex\n          U rdmacore52_0__execute_ioctl_fallback\n-00000000 T rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n+         U rdmacore52_0__write_get_req\n+         U rdmacore52_0__write_get_resp\n+         U rdmacore52_0__write_set_uhw\n+         U rdmacore52_0_execute_ioctl\n+000007c0 T rdmacore52_0_ibv_cmd_alloc_async_fd\n+00000880 T rdmacore52_0_ibv_cmd_get_context\n+00000b40 T rdmacore52_0_ibv_cmd_query_context\n+00001400 T rdmacore52_0_ibv_cmd_query_device_any\n+00000550 T rdmacore52_0_ibv_cmd_query_port\n+         U rdmacore52_0_ibv_read_ibdev_sysfs_file\n+         U strcmp\n \n-compat-1_0.c.o:\n+marshall.c.o:\n+00000000 T ibv_copy_ah_attr_from_kern\n+000001b0 T ibv_copy_path_rec_from_kern\n+00000260 T ibv_copy_path_rec_to_kern\n+00000060 T ibv_copy_qp_attr_from_kern\n \n-all_providers.c.o:\n-00000000 d all_providers\n-00000000 D verbs_provider_all\n-         U verbs_provider_bnxt_re\n-         U verbs_provider_cxgb4\n-         U verbs_provider_efa\n-         U verbs_provider_erdma\n-         U verbs_provider_hfi1verbs\n-         U verbs_provider_hns\n-         U verbs_provider_ipathverbs\n-         U verbs_provider_irdma\n-         U verbs_provider_mana\n-         U verbs_provider_mlx4\n-         U verbs_provider_mlx5\n-         U verbs_provider_mthca\n-         U verbs_provider_ocrdma\n-         U verbs_provider_qedr\n-         U verbs_provider_rxe\n-         U verbs_provider_siw\n-         U verbs_provider_vmw_pvrdma\n+enum_strs.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+000000a0 d event_type_str.2\n+00000060 T ibv_event_type_str\n+00000000 T ibv_node_type_str\n+00000030 T ibv_port_state_str\n+00000090 T ibv_wc_status_str\n+00000120 d node_type_str.4\n+000000f0 d port_state_str.3\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+000000c0 T rdmacore52_0_ibv_wr_opcode_str\n+00000040 d wc_status_str.1\n+00000000 d wr_opcode_str.0\n \n-node_name_map.c.o:\n+verbs.c.o:\n+00000260 t .L36\n+00000270 t .L38\n+00000280 t .L39\n+00000290 t .L40\n+000002a0 t .L41\n+000002b0 t .L42\n+000002c0 t .L43\n+000002d0 t .L44\n+00000250 t .L45\n+000002f0 t .L46\n+00000200 t .L48\n+000002e0 t .L49\n 00000000 r .LC0\n-0000001b r .LC1\n-0000001d r .LC2\n-00000000 r .LC3\n-00000020 r .LC4\n-0000002c r .LC5\n+00000012 r .LC1\n+00000140 r CSWTCH.39\n+000000e0 r CSWTCH.42\n          U _GLOBAL_OFFSET_TABLE_\n-         U __ctype_b_loc\n          U __errno_location\n-         U __fprintf_chk\n+         U __isoc23_sscanf\n          U __stack_chk_fail_local\n-         U fclose\n-         U fgets\n-         U fopen64\n+         U close\n          U free\n+000011f0 T ibv_ack_cq_events\n+00000920 T ibv_alloc_pd\n+00001a90 T ibv_attach_mcast\n+00001410 T ibv_create_ah\n+000017b0 T ibv_create_ah_from_wc\n+00000f80 T ibv_create_comp_channel\n+00001090 T ibv_create_cq\n+00001300 T ibv_create_qp\n+00001230 T ibv_create_srq\n+00000940 T ibv_dealloc_pd\n+00000f00 T ibv_dereg_mr\n+00001a70 T ibv_destroy_ah\n+00001020 T ibv_destroy_comp_channel\n+00001100 T ibv_destroy_cq\n+000013f0 T ibv_destroy_qp\n+000012e0 T ibv_destroy_srq\n+00001ab0 T ibv_detach_mcast\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+00000000 t ibv_find_gid_index\n+00001170 T ibv_get_cq_event\n+00000840 T ibv_get_pkey_index\n+00000cd0 T ibv_import_dm\n+00000c90 T ibv_import_mr\n+00000c50 T ibv_import_pd\n+000014f0 T ibv_init_ah_from_wc\n+000013b0 T ibv_modify_qp\n+000012a0 T ibv_modify_srq\n+00001310 T ibv_qp_to_qp_ex\n+00000510 T ibv_query_device\n+00001ed0 T ibv_query_ece\n+000006d0 T ibv_query_gid\n+000007a0 T ibv_query_pkey\n+00000610 T ibv_query_port\n+00001330 T ibv_query_qp\n+00001370 T ibv_query_qp_data_in_order\n+000012c0 T ibv_query_srq\n+00000300 T ibv_rate_to_mbps\n+000001a0 T ibv_rate_to_mult\n+00000d10 T ibv_reg_dmabuf_mr\n+00000a50 T ibv_reg_mr\n+00000b50 T ibv_reg_mr_iova\n+00000950 T ibv_reg_mr_iova2\n+00000d70 T ibv_rereg_mr\n+000010e0 T ibv_resize_cq\n+00001ad0 T ibv_resolve_eth_l2_from_gid\n+00001e70 T ibv_set_ece\n+00000cf0 T ibv_unimport_dm\n+00000cb0 T ibv_unimport_mr\n+00000c70 T ibv_unimport_pd\n          U malloc\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000330 T mbps_to_ibv_rate\n+         U memcpy\n+         U memset\n+000001d0 T mult_to_ibv_rate\n+         U pthread_cond_init\n+         U pthread_cond_signal\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U rdmacore52_0___ibv_query_gid_ex\n+00000530 T rdmacore52_0___lib_query_port\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_cl_qmap_get\n-         U rdmacore52_0_cl_qmap_init\n-         U rdmacore52_0_cl_qmap_insert\n-         U rdmacore52_0_cl_qmap_remove\n-00000140 T rdmacore52_0_clean_nodedesc\n-00000000 T rdmacore52_0_close_node_name_map\n-000001c0 T rdmacore52_0_open_node_name_map\n-00000070 T rdmacore52_0_remap_node_name\n-         U stat64\n-         U stderr\n-         U strchr\n-         U strdup\n-         U strerror\n-         U strncpy\n-         U strtok\n-         U strtoull\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+         U rdmacore52_0__execute_cmd_write\n+00001440 T rdmacore52_0_ibv_query_gid_type\n+         U rdmacore52_0_ibv_read_ibdev_sysfs_file\n+         U rdmacore52_0_neigh_free_resources\n+         U rdmacore52_0_neigh_get_ll\n+         U rdmacore52_0_neigh_get_oif_from_src\n+         U rdmacore52_0_neigh_get_vlan_id_from_dev\n+         U rdmacore52_0_neigh_init_resources\n+         U rdmacore52_0_neigh_set_dst\n+         U rdmacore52_0_neigh_set_oif\n+         U rdmacore52_0_neigh_set_src\n+         U rdmacore52_0_neigh_set_vlan_id\n+         U rdmacore52_0_process_get_neigh\n+         U rdmacore52_0_verbs_init_cq\n+         U read\n \n mmio.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 t lock_constructor\n 00000000 b mmio_spinlock\n 00000080 i mmio_write64_be\n 00000000 t pthread_mmio_write64_be\n@@ -1249,35 +1213,14 @@\n          U pthread_spin_lock\n          U pthread_spin_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.si\n 00000080 t resolve_mmio_write64_be\n 00000050 t sse_mmio_write64_be\n \n-cl_map.c.o:\n-00000150 T rdmacore52_0_cl_qmap_apply_func\n-00000d80 T rdmacore52_0_cl_qmap_delta\n-00000060 T rdmacore52_0_cl_qmap_get\n-000000f0 T rdmacore52_0_cl_qmap_get_next\n-00000000 T rdmacore52_0_cl_qmap_init\n-00000190 T rdmacore52_0_cl_qmap_insert\n-000008b0 T rdmacore52_0_cl_qmap_merge\n-00000820 T rdmacore52_0_cl_qmap_remove\n-00000430 T rdmacore52_0_cl_qmap_remove_item\n-\n-bitmap.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U memset\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000150 T rdmacore52_0_bitmap_fill_region\n-00000000 T rdmacore52_0_bitmap_find_first_bit\n-00000210 T rdmacore52_0_bitmap_find_free_region\n-00000070 T rdmacore52_0_bitmap_zero_region\n-\n rdma_nl.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n          U nl_connect\n          U nl_recvmsgs_default\n          U nl_send_auto\n          U nl_send_simple\n@@ -1295,14 +1238,38 @@\n 00000070 T rdmacore52_0_rdmanl_get_copy_on_fork\n 00000140 T rdmacore52_0_rdmanl_get_devices\n 00000000 D rdmacore52_0_rdmanl_policy\n 00000010 T rdmacore52_0_rdmanl_socket_alloc\n 00000000 t rdmanl_saw_err_cb\n          U strlen\n \n+bitmap.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U memset\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000150 T rdmacore52_0_bitmap_fill_region\n+00000000 T rdmacore52_0_bitmap_find_first_bit\n+00000210 T rdmacore52_0_bitmap_find_free_region\n+00000070 T rdmacore52_0_bitmap_zero_region\n+\n+util.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U fcntl64\n+         U getenv\n+         U getrandom\n+         U rand_r\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+000000f0 T rdmacore52_0_check_env\n+00000060 T rdmacore52_0_get_random\n+00000000 T rdmacore52_0_set_fd_nonblock\n+00000130 T rdmacore52_0_xorshift32\n+00000000 b seed.0\n+         U time\n+\n open_cdev.c.o:\n 00000000 r .LC0\n 00000010 r .LC1\n 0000001b r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __asprintf_chk\n          U __stack_chk_fail_local\n@@ -1316,34 +1283,67 @@\n          U poll\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000450 T rdmacore52_0_open_cdev\n          U read\n          U timerfd_create\n          U timerfd_settime\n \n-util.c.o:\n+node_name_map.c.o:\n+00000000 r .LC0\n+0000001b r .LC1\n+0000001d r .LC2\n+00000000 r .LC3\n+00000020 r .LC4\n+0000002c r .LC5\n          U _GLOBAL_OFFSET_TABLE_\n-         U fcntl64\n-         U getenv\n-         U getrandom\n-         U rand_r\n+         U __ctype_b_loc\n+         U __errno_location\n+         U __fprintf_chk\n+         U __stack_chk_fail_local\n+         U fclose\n+         U fgets\n+         U fopen64\n+         U free\n+         U malloc\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-000000f0 T rdmacore52_0_check_env\n-00000060 T rdmacore52_0_get_random\n-00000000 T rdmacore52_0_set_fd_nonblock\n-00000130 T rdmacore52_0_xorshift32\n-00000000 b seed.0\n-         U time\n+         U rdmacore52_0_cl_qmap_get\n+         U rdmacore52_0_cl_qmap_init\n+         U rdmacore52_0_cl_qmap_insert\n+         U rdmacore52_0_cl_qmap_remove\n+00000140 T rdmacore52_0_clean_nodedesc\n+00000000 T rdmacore52_0_close_node_name_map\n+000001c0 T rdmacore52_0_open_node_name_map\n+00000070 T rdmacore52_0_remap_node_name\n+         U stat64\n+         U stderr\n+         U strchr\n+         U strdup\n+         U strerror\n+         U strncpy\n+         U strtok\n+         U strtoull\n \n interval_set.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U calloc\n          U free\n          U pthread_mutex_init\n          U pthread_mutex_lock\n          U pthread_mutex_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 000003f0 T rdmacore52_0_iset_alloc_range\n 00000000 T rdmacore52_0_iset_create\n 00000050 T rdmacore52_0_iset_destroy\n 000000a0 T rdmacore52_0_iset_insert_range\n+\n+cl_map.c.o:\n+00000150 T rdmacore52_0_cl_qmap_apply_func\n+00000d80 T rdmacore52_0_cl_qmap_delta\n+00000060 T rdmacore52_0_cl_qmap_get\n+000000f0 T rdmacore52_0_cl_qmap_get_next\n+00000000 T rdmacore52_0_cl_qmap_init\n+00000190 T rdmacore52_0_cl_qmap_insert\n+000008b0 T rdmacore52_0_cl_qmap_merge\n+00000820 T rdmacore52_0_cl_qmap_remove\n+00000430 T rdmacore52_0_cl_qmap_remove_item\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,42 +1,42 @@\n ----------   0        0        0     9008 1970-01-01 00:00:00.000000 /\n ----------   0        0        0        0 1970-01-01 00:00:00.000000 //\n-?rw-r--r--   0        0        0      820 1970-01-01 00:00:00.000000 static_driver.c.o\n-?rw-r--r--   0        0        0     3784 1970-01-01 00:00:00.000000 cmd_mr.c.o\n-?rw-r--r--   0        0        0     8664 1970-01-01 00:00:00.000000 memory.c.o\n+?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_xrcd.c.o\n ?rw-r--r--   0        0        0    10716 1970-01-01 00:00:00.000000 dummy_ops.c.o\n-?rw-r--r--   0        0        0    18340 1970-01-01 00:00:00.000000 verbs.c.o\n-?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_pd.c.o\n-?rw-r--r--   0        0        0     5872 1970-01-01 00:00:00.000000 cmd_srq.c.o\n+?rw-r--r--   0        0        0    12924 1970-01-01 00:00:00.000000 neigh.c.o\n+?rw-r--r--   0        0        0     8352 1970-01-01 00:00:00.000000 cmd_qp.c.o\n+?rw-r--r--   0        0        0     3328 1970-01-01 00:00:00.000000 cmd_dm.c.o\n+?rw-r--r--   0        0        0    12824 1970-01-01 00:00:00.000000 init.c.o\n+?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_mw.c.o\n+?rw-r--r--   0        0        0     3120 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r--   0        0        0     4344 1970-01-01 00:00:00.000000 cmd_wq.c.o\n-?rw-r--r--   0        0        0    16448 1970-01-01 00:00:00.000000 cmd.c.o\n-?rw-r--r--   0        0        0    12008 1970-01-01 00:00:00.000000 cmd_device.c.o\n-?rw-r--r--   0        0        0     4820 1970-01-01 00:00:00.000000 cmd_cq.c.o\n-?rw-r--r--   0        0        0     9704 1970-01-01 00:00:00.000000 device.c.o\n+?rw-r--r--   0        0        0     8664 1970-01-01 00:00:00.000000 memory.c.o\n ?rw-r--r--   0        0        0     5404 1970-01-01 00:00:00.000000 ibdev_nl.c.o\n+?rw-r--r--   0        0        0     5872 1970-01-01 00:00:00.000000 cmd_srq.c.o\n+?rw-r--r--   0        0        0     1656 1970-01-01 00:00:00.000000 all_providers.c.o\n+?rw-r--r--   0        0        0     3784 1970-01-01 00:00:00.000000 cmd_mr.c.o\n+?rw-r--r--   0        0        0    16448 1970-01-01 00:00:00.000000 cmd.c.o\n ?rw-r--r--   0        0        0     2872 1970-01-01 00:00:00.000000 cmd_counters.c.o\n-?rw-r--r--   0        0        0     4224 1970-01-01 00:00:00.000000 enum_strs.c.o\n-?rw-r--r--   0        0        0     5624 1970-01-01 00:00:00.000000 cmd_fallback.c.o\n-?rw-r--r--   0        0        0     8352 1970-01-01 00:00:00.000000 cmd_qp.c.o\n-?rw-r--r--   0        0        0     1708 1970-01-01 00:00:00.000000 marshall.c.o\n-?rw-r--r--   0        0        0     3120 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r--   0        0        0     2560 1970-01-01 00:00:00.000000 cmd_ioctl.c.o\n+?rw-r--r--   0        0        0     1588 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n+?rw-r--r--   0        0        0     9704 1970-01-01 00:00:00.000000 device.c.o\n+?rw-r--r--   0        0        0      336 1970-01-01 00:00:00.000000 dynamic_driver.c.o\n ?rw-r--r--   0        0        0     1580 1970-01-01 00:00:00.000000 cmd_flow.c.o\n-?rw-r--r--   0        0        0    12824 1970-01-01 00:00:00.000000 init.c.o\n ?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_ah.c.o\n-?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_mw.c.o\n-?rw-r--r--   0        0        0      336 1970-01-01 00:00:00.000000 dynamic_driver.c.o\n-?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_xrcd.c.o\n-?rw-r--r--   0        0        0     3376 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n-?rw-r--r--   0        0        0     3328 1970-01-01 00:00:00.000000 cmd_dm.c.o\n-?rw-r--r--   0        0        0    12924 1970-01-01 00:00:00.000000 neigh.c.o\n-?rw-r--r--   0        0        0     1588 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n+?rw-r--r--   0        0        0     1548 1970-01-01 00:00:00.000000 cmd_pd.c.o\n+?rw-r--r--   0        0        0     4820 1970-01-01 00:00:00.000000 cmd_cq.c.o\n+?rw-r--r--   0        0        0      820 1970-01-01 00:00:00.000000 static_driver.c.o\n+?rw-r--r--   0        0        0     5624 1970-01-01 00:00:00.000000 cmd_fallback.c.o\n ?rw-r--r--   0        0        0      336 1970-01-01 00:00:00.000000 compat-1_0.c.o\n-?rw-r--r--   0        0        0     1656 1970-01-01 00:00:00.000000 all_providers.c.o\n-?rw-r--r--   0        0        0     4884 1970-01-01 00:00:00.000000 node_name_map.c.o\n+?rw-r--r--   0        0        0     3376 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n+?rw-r--r--   0        0        0    12008 1970-01-01 00:00:00.000000 cmd_device.c.o\n+?rw-r--r--   0        0        0     1708 1970-01-01 00:00:00.000000 marshall.c.o\n+?rw-r--r--   0        0        0     4224 1970-01-01 00:00:00.000000 enum_strs.c.o\n+?rw-r--r--   0        0        0    18340 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     2260 1970-01-01 00:00:00.000000 mmio.c.o\n-?rw-r--r--   0        0        0     5724 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r--   0        0        0     2552 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r--   0        0        0     4084 1970-01-01 00:00:00.000000 rdma_nl.c.o\n-?rw-r--r--   0        0        0     3804 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r--   0        0        0     2552 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r--   0        0        0     1984 1970-01-01 00:00:00.000000 util.c.o\n+?rw-r--r--   0        0        0     3804 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r--   0        0        0     4884 1970-01-01 00:00:00.000000 node_name_map.c.o\n ?rw-r--r--   0        0        0     3584 1970-01-01 00:00:00.000000 interval_set.c.o\n+?rw-r--r--   0        0        0     5724 1970-01-01 00:00:00.000000 cl_map.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libipathverbs-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libipathverbs-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,11 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in ipathverbs.c.o\n+verbs_provider_ipathverbs in ipathverbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_ipath_query_device in verbs.c.o\n rdmacore52_0_ipath_query_port in verbs.c.o\n rdmacore52_0_ipath_alloc_pd in verbs.c.o\n rdmacore52_0_ipath_free_pd in verbs.c.o\n rdmacore52_0_ipath_reg_mr in verbs.c.o\n rdmacore52_0_ipath_dereg_mr in verbs.c.o\n@@ -28,16 +30,73 @@\n rdmacore52_0_ipath_modify_srq_v1 in verbs.c.o\n rdmacore52_0_ipath_query_srq in verbs.c.o\n rdmacore52_0_ipath_destroy_srq in verbs.c.o\n rdmacore52_0_ipath_destroy_srq_v1 in verbs.c.o\n rdmacore52_0_ipath_post_srq_recv in verbs.c.o\n rdmacore52_0_ipath_create_ah in verbs.c.o\n rdmacore52_0_ipath_destroy_ah in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in ipathverbs.c.o\n-verbs_provider_ipathverbs in ipathverbs.c.o\n+\n+ipathverbs.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+         U free\n+00000000 r hca_table\n+00000090 t ipath_alloc_context\n+00000140 d ipath_ctx_common_ops\n+00000000 d ipath_ctx_v1_ops\n+00000000 d ipath_dev_ops\n+00000020 t ipath_device_alloc\n+00000060 t ipath_free_context\n+00000000 t ipath_uninit_device\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_ibv_cmd_poll_cq\n+         U rdmacore52_0_ibv_cmd_post_recv\n+         U rdmacore52_0_ibv_cmd_post_srq_recv\n+         U rdmacore52_0_ibv_cmd_req_notify_cq\n+         U rdmacore52_0_ipath_alloc_pd\n+         U rdmacore52_0_ipath_create_ah\n+         U rdmacore52_0_ipath_create_cq\n+         U rdmacore52_0_ipath_create_cq_v1\n+         U rdmacore52_0_ipath_create_qp\n+         U rdmacore52_0_ipath_create_qp_v1\n+         U rdmacore52_0_ipath_create_srq\n+         U rdmacore52_0_ipath_create_srq_v1\n+         U rdmacore52_0_ipath_dereg_mr\n+         U rdmacore52_0_ipath_destroy_ah\n+         U rdmacore52_0_ipath_destroy_cq\n+         U rdmacore52_0_ipath_destroy_cq_v1\n+         U rdmacore52_0_ipath_destroy_qp\n+         U rdmacore52_0_ipath_destroy_qp_v1\n+         U rdmacore52_0_ipath_destroy_srq\n+         U rdmacore52_0_ipath_destroy_srq_v1\n+         U rdmacore52_0_ipath_free_pd\n+         U rdmacore52_0_ipath_modify_qp\n+         U rdmacore52_0_ipath_modify_srq\n+         U rdmacore52_0_ipath_modify_srq_v1\n+         U rdmacore52_0_ipath_poll_cq\n+         U rdmacore52_0_ipath_post_recv\n+         U rdmacore52_0_ipath_post_send\n+         U rdmacore52_0_ipath_post_srq_recv\n+         U rdmacore52_0_ipath_query_device\n+         U rdmacore52_0_ipath_query_port\n+         U rdmacore52_0_ipath_query_qp\n+         U rdmacore52_0_ipath_query_srq\n+         U rdmacore52_0_ipath_reg_mr\n+         U rdmacore52_0_ipath_resize_cq\n+         U rdmacore52_0_ipath_resize_cq_v1\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+00000000 D verbs_provider_ipathverbs\n \n verbs.c.o:\n 00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __snprintf_chk\n          U __stack_chk_fail_local\n@@ -97,66 +156,7 @@\n 00000130 T rdmacore52_0_ipath_query_device\n 000001f0 T rdmacore52_0_ipath_query_port\n 00000a40 T rdmacore52_0_ipath_query_qp\n 00001050 T rdmacore52_0_ipath_query_srq\n 00000310 T rdmacore52_0_ipath_reg_mr\n 00000580 T rdmacore52_0_ipath_resize_cq\n 00000670 T rdmacore52_0_ipath_resize_cq_v1\n-\n-ipathverbs.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-         U free\n-00000000 r hca_table\n-00000090 t ipath_alloc_context\n-00000140 d ipath_ctx_common_ops\n-00000000 d ipath_ctx_v1_ops\n-00000000 d ipath_dev_ops\n-00000020 t ipath_device_alloc\n-00000060 t ipath_free_context\n-00000000 t ipath_uninit_device\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_ibv_cmd_poll_cq\n-         U rdmacore52_0_ibv_cmd_post_recv\n-         U rdmacore52_0_ibv_cmd_post_srq_recv\n-         U rdmacore52_0_ibv_cmd_req_notify_cq\n-         U rdmacore52_0_ipath_alloc_pd\n-         U rdmacore52_0_ipath_create_ah\n-         U rdmacore52_0_ipath_create_cq\n-         U rdmacore52_0_ipath_create_cq_v1\n-         U rdmacore52_0_ipath_create_qp\n-         U rdmacore52_0_ipath_create_qp_v1\n-         U rdmacore52_0_ipath_create_srq\n-         U rdmacore52_0_ipath_create_srq_v1\n-         U rdmacore52_0_ipath_dereg_mr\n-         U rdmacore52_0_ipath_destroy_ah\n-         U rdmacore52_0_ipath_destroy_cq\n-         U rdmacore52_0_ipath_destroy_cq_v1\n-         U rdmacore52_0_ipath_destroy_qp\n-         U rdmacore52_0_ipath_destroy_qp_v1\n-         U rdmacore52_0_ipath_destroy_srq\n-         U rdmacore52_0_ipath_destroy_srq_v1\n-         U rdmacore52_0_ipath_free_pd\n-         U rdmacore52_0_ipath_modify_qp\n-         U rdmacore52_0_ipath_modify_srq\n-         U rdmacore52_0_ipath_modify_srq_v1\n-         U rdmacore52_0_ipath_poll_cq\n-         U rdmacore52_0_ipath_post_recv\n-         U rdmacore52_0_ipath_post_send\n-         U rdmacore52_0_ipath_post_srq_recv\n-         U rdmacore52_0_ipath_query_device\n-         U rdmacore52_0_ipath_query_port\n-         U rdmacore52_0_ipath_query_qp\n-         U rdmacore52_0_ipath_query_srq\n-         U rdmacore52_0_ipath_reg_mr\n-         U rdmacore52_0_ipath_resize_cq\n-         U rdmacore52_0_ipath_resize_cq_v1\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-00000000 D verbs_provider_ipathverbs\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n ----------   0        0        0     1170 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    12832 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     6028 1970-01-01 00:00:00.000000 ipathverbs.c.o\n+?rw-r--r--   0        0        0    12832 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libirdma-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libirdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,43 +1,9 @@\n \n Archive index:\n-rdmacore52_0___x86.get_pc_thunk.bx in uk.c.o\n-rdmacore52_0_irdma_clr_wqes in uk.c.o\n-rdmacore52_0_irdma_uk_qp_post_wr in uk.c.o\n-rdmacore52_0_irdma_qp_push_wqe in uk.c.o\n-rdmacore52_0_irdma_qp_get_next_send_wqe in uk.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in uk.c.o\n-rdmacore52_0_irdma_qp_get_next_recv_wqe in uk.c.o\n-rdmacore52_0_irdma_uk_rdma_write in uk.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in uk.c.o\n-rdmacore52_0_irdma_uk_rdma_read in uk.c.o\n-rdmacore52_0_irdma_uk_send in uk.c.o\n-rdmacore52_0_irdma_uk_inline_rdma_write in uk.c.o\n-rdmacore52_0_irdma_uk_inline_send in uk.c.o\n-rdmacore52_0_irdma_uk_stag_local_invalidate in uk.c.o\n-rdmacore52_0_irdma_uk_mw_bind in uk.c.o\n-rdmacore52_0_irdma_uk_post_receive in uk.c.o\n-rdmacore52_0_irdma_uk_cq_resize in uk.c.o\n-rdmacore52_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n-rdmacore52_0_irdma_uk_cq_request_notification in uk.c.o\n-rdmacore52_0_irdma_uk_cq_poll_cmpl in uk.c.o\n-rdmacore52_0_irdma_get_wqe_shift in uk.c.o\n-rdmacore52_0_irdma_get_sqdepth in uk.c.o\n-rdmacore52_0_irdma_get_rqdepth in uk.c.o\n-rdmacore52_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n-rdmacore52_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n-rdmacore52_0_irdma_uk_qp_init in uk.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in uk.c.o\n-rdmacore52_0_irdma_uk_cq_init in uk.c.o\n-rdmacore52_0_irdma_uk_clean_cq in uk.c.o\n-rdmacore52_0_irdma_nop in uk.c.o\n-rdmacore52_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n-rdmacore52_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in umain.c.o\n-verbs_provider_irdma in umain.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in uverbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in uverbs.c.o\n rdmacore52_0_irdma_uquery_device_ex in uverbs.c.o\n rdmacore52_0_irdma_uquery_port in uverbs.c.o\n rdmacore52_0_irdma_ualloc_pd in uverbs.c.o\n rdmacore52_0_irdma_ufree_pd in uverbs.c.o\n rdmacore52_0_irdma_ureg_mr in uverbs.c.o\n@@ -64,146 +30,48 @@\n rdmacore52_0_irdma_ubind_mw in uverbs.c.o\n rdmacore52_0_irdma_upost_recv in uverbs.c.o\n rdmacore52_0_irdma_ucreate_ah in uverbs.c.o\n rdmacore52_0_irdma_udestroy_ah in uverbs.c.o\n rdmacore52_0_irdma_uattach_mcast in uverbs.c.o\n rdmacore52_0_irdma_udetach_mcast in uverbs.c.o\n rdmacore52_0_irdma_uresize_cq in uverbs.c.o\n-\n-uk.c.o:\n-00000ade t .L125\n-00000ab8 t .L127\n-00000aa0 t .L129\n-00000a88 t .L130\n-00000a70 t .L131\n-00000a40 t .L133\n-00000a58 t .L134\n-00000820 t .L153\n-00000ea2 t .L178\n-00000c70 t .L180\n-00000f30 t .L182\n-00000f18 t .L183\n-00000f00 t .L184\n-00000ed0 t .L186\n-00000eb8 t .L187\n-00001005 t .L205\n-00000ee8 t .L206\n-000013ce t .L229\n-00001348 t .L231\n-000010c0 t .L233\n-000013a8 t .L234\n-00001390 t .L235\n-00001360 t .L237\n-000013e0 t .L238\n-00001378 t .L258\n-00003190 t .L617\n-00003180 t .L619\n-000031f0 t .L620\n-000031e0 t .L621\n-000031d0 t .L622\n-000031c0 t .L623\n-000031b0 t .L624\n-000031a0 t .L625\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-00000070 t irdma_copy_inline_data\n-00000160 t irdma_copy_inline_data_gen_1\n-00000014 t irdma_fragcnt_to_quanta_sq.cold\n-000002e0 t irdma_inline_data_size_to_quanta\n-00000030 t irdma_inline_data_size_to_quanta_gen_1\n-00000200 t irdma_set_fragment\n-00000280 t irdma_set_fragment_gen_1\n-00000040 t irdma_set_mw_bind_wqe\n-00000000 t irdma_set_mw_bind_wqe_gen_1\n-00000000 t irdma_uk_rdma_write.cold\n-0000000a t irdma_uk_send.cold\n-         U memcpy\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000340 T rdmacore52_0_irdma_clr_wqes\n-00003160 T rdmacore52_0_irdma_fragcnt_to_quanta_sq\n-00003200 T rdmacore52_0_irdma_fragcnt_to_wqesize_rq\n-00002a00 T rdmacore52_0_irdma_get_rqdepth\n-00002990 T rdmacore52_0_irdma_get_sqdepth\n-00002900 T rdmacore52_0_irdma_get_wqe_shift\n-00003000 T rdmacore52_0_irdma_nop\n-000006e0 T rdmacore52_0_irdma_qp_get_next_recv_wqe\n-00000460 T rdmacore52_0_irdma_qp_get_next_send_wqe\n-000003c0 T rdmacore52_0_irdma_qp_push_wqe\n-00002b90 T rdmacore52_0_irdma_uk_calc_depth_shift_rq\n-00002a60 T rdmacore52_0_irdma_uk_calc_depth_shift_sq\n-00002ed0 T rdmacore52_0_irdma_uk_clean_cq\n-00002e60 T rdmacore52_0_irdma_uk_cq_init\n-00002250 T rdmacore52_0_irdma_uk_cq_poll_cmpl\n-000021e0 T rdmacore52_0_irdma_uk_cq_request_notification\n-00002130 T rdmacore52_0_irdma_uk_cq_resize\n-00002160 T rdmacore52_0_irdma_uk_cq_set_resized_cnt\n-000014e0 T rdmacore52_0_irdma_uk_inline_rdma_write\n-000017c0 T rdmacore52_0_irdma_uk_inline_send\n-00001d60 T rdmacore52_0_irdma_uk_mw_bind\n-00001fc0 T rdmacore52_0_irdma_uk_post_receive\n-00002c90 T rdmacore52_0_irdma_uk_qp_init\n-000003a0 T rdmacore52_0_irdma_uk_qp_post_wr\n-00000bd0 T rdmacore52_0_irdma_uk_rdma_read\n-00000760 T rdmacore52_0_irdma_uk_rdma_write\n-00001010 T rdmacore52_0_irdma_uk_send\n-00001b20 T rdmacore52_0_irdma_uk_stag_local_invalidate\n-\n-umain.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-         U free\n-00000000 r hca_table\n-00000020 t irdma_device_alloc\n-00000040 t irdma_ualloc_context\n-00000000 d irdma_uctx_ops\n-00000000 d irdma_udev_ops\n-00000310 t irdma_ufree_context\n-00000000 t irdma_uninit_device\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_irdma_cq_event\n-         U rdmacore52_0_irdma_mmap\n-         U rdmacore52_0_irdma_munmap\n-         U rdmacore52_0_irdma_ualloc_mw\n-         U rdmacore52_0_irdma_ualloc_pd\n-         U rdmacore52_0_irdma_uarm_cq\n-         U rdmacore52_0_irdma_uattach_mcast\n-         U rdmacore52_0_irdma_ubind_mw\n-         U rdmacore52_0_irdma_ucreate_ah\n-         U rdmacore52_0_irdma_ucreate_cq\n-         U rdmacore52_0_irdma_ucreate_cq_ex\n-         U rdmacore52_0_irdma_ucreate_qp\n-         U rdmacore52_0_irdma_udealloc_mw\n-         U rdmacore52_0_irdma_udereg_mr\n-         U rdmacore52_0_irdma_udestroy_ah\n-         U rdmacore52_0_irdma_udestroy_cq\n-         U rdmacore52_0_irdma_udestroy_qp\n-         U rdmacore52_0_irdma_udetach_mcast\n-         U rdmacore52_0_irdma_ufree_pd\n-         U rdmacore52_0_irdma_umodify_qp\n-         U rdmacore52_0_irdma_upoll_cq\n-         U rdmacore52_0_irdma_upost_recv\n-         U rdmacore52_0_irdma_upost_send\n-         U rdmacore52_0_irdma_uquery_device_ex\n-         U rdmacore52_0_irdma_uquery_port\n-         U rdmacore52_0_irdma_uquery_qp\n-         U rdmacore52_0_irdma_ureg_mr\n-         U rdmacore52_0_irdma_ureg_mr_dmabuf\n-         U rdmacore52_0_irdma_urereg_mr\n-         U rdmacore52_0_irdma_uresize_cq\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-00000000 D verbs_provider_irdma\n+rdmacore52_0___x86.get_pc_thunk.bx in uk.c.o\n+rdmacore52_0_irdma_clr_wqes in uk.c.o\n+rdmacore52_0_irdma_uk_qp_post_wr in uk.c.o\n+rdmacore52_0_irdma_qp_push_wqe in uk.c.o\n+rdmacore52_0_irdma_qp_get_next_send_wqe in uk.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in uk.c.o\n+rdmacore52_0_irdma_qp_get_next_recv_wqe in uk.c.o\n+rdmacore52_0_irdma_uk_rdma_write in uk.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in uk.c.o\n+rdmacore52_0_irdma_uk_rdma_read in uk.c.o\n+rdmacore52_0_irdma_uk_send in uk.c.o\n+rdmacore52_0_irdma_uk_inline_rdma_write in uk.c.o\n+rdmacore52_0_irdma_uk_inline_send in uk.c.o\n+rdmacore52_0_irdma_uk_stag_local_invalidate in uk.c.o\n+rdmacore52_0_irdma_uk_mw_bind in uk.c.o\n+rdmacore52_0_irdma_uk_post_receive in uk.c.o\n+rdmacore52_0_irdma_uk_cq_resize in uk.c.o\n+rdmacore52_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n+rdmacore52_0_irdma_uk_cq_request_notification in uk.c.o\n+rdmacore52_0_irdma_uk_cq_poll_cmpl in uk.c.o\n+rdmacore52_0_irdma_get_wqe_shift in uk.c.o\n+rdmacore52_0_irdma_get_sqdepth in uk.c.o\n+rdmacore52_0_irdma_get_rqdepth in uk.c.o\n+rdmacore52_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n+rdmacore52_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n+rdmacore52_0_irdma_uk_qp_init in uk.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in uk.c.o\n+rdmacore52_0_irdma_uk_cq_init in uk.c.o\n+rdmacore52_0_irdma_uk_clean_cq in uk.c.o\n+rdmacore52_0_irdma_nop in uk.c.o\n+rdmacore52_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n+rdmacore52_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in umain.c.o\n+verbs_provider_irdma in umain.c.o\n \n uverbs.c.o:\n 000000a0 t .L10\n 000000c0 t .L12\n 00001350 t .L276\n 00001359 t .L277\n 0000136b t .L279\n@@ -338,7 +206,139 @@\n 00002760 T rdmacore52_0_irdma_uquery_qp\n 00000b60 T rdmacore52_0_irdma_ureg_mr\n 00000c40 T rdmacore52_0_irdma_ureg_mr_dmabuf\n 00000ce0 T rdmacore52_0_irdma_urereg_mr\n 00003430 T rdmacore52_0_irdma_uresize_cq\n          U sysconf\n 00001870 t ucreate_cq\n+\n+uk.c.o:\n+00000ade t .L125\n+00000ab8 t .L127\n+00000aa0 t .L129\n+00000a88 t .L130\n+00000a70 t .L131\n+00000a40 t .L133\n+00000a58 t .L134\n+00000820 t .L153\n+00000ea2 t .L178\n+00000c70 t .L180\n+00000f30 t .L182\n+00000f18 t .L183\n+00000f00 t .L184\n+00000ed0 t .L186\n+00000eb8 t .L187\n+00001005 t .L205\n+00000ee8 t .L206\n+000013ce t .L229\n+00001348 t .L231\n+000010c0 t .L233\n+000013a8 t .L234\n+00001390 t .L235\n+00001360 t .L237\n+000013e0 t .L238\n+00001378 t .L258\n+00003190 t .L617\n+00003180 t .L619\n+000031f0 t .L620\n+000031e0 t .L621\n+000031d0 t .L622\n+000031c0 t .L623\n+000031b0 t .L624\n+000031a0 t .L625\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+00000070 t irdma_copy_inline_data\n+00000160 t irdma_copy_inline_data_gen_1\n+00000014 t irdma_fragcnt_to_quanta_sq.cold\n+000002e0 t irdma_inline_data_size_to_quanta\n+00000030 t irdma_inline_data_size_to_quanta_gen_1\n+00000200 t irdma_set_fragment\n+00000280 t irdma_set_fragment_gen_1\n+00000040 t irdma_set_mw_bind_wqe\n+00000000 t irdma_set_mw_bind_wqe_gen_1\n+00000000 t irdma_uk_rdma_write.cold\n+0000000a t irdma_uk_send.cold\n+         U memcpy\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000340 T rdmacore52_0_irdma_clr_wqes\n+00003160 T rdmacore52_0_irdma_fragcnt_to_quanta_sq\n+00003200 T rdmacore52_0_irdma_fragcnt_to_wqesize_rq\n+00002a00 T rdmacore52_0_irdma_get_rqdepth\n+00002990 T rdmacore52_0_irdma_get_sqdepth\n+00002900 T rdmacore52_0_irdma_get_wqe_shift\n+00003000 T rdmacore52_0_irdma_nop\n+000006e0 T rdmacore52_0_irdma_qp_get_next_recv_wqe\n+00000460 T rdmacore52_0_irdma_qp_get_next_send_wqe\n+000003c0 T rdmacore52_0_irdma_qp_push_wqe\n+00002b90 T rdmacore52_0_irdma_uk_calc_depth_shift_rq\n+00002a60 T rdmacore52_0_irdma_uk_calc_depth_shift_sq\n+00002ed0 T rdmacore52_0_irdma_uk_clean_cq\n+00002e60 T rdmacore52_0_irdma_uk_cq_init\n+00002250 T rdmacore52_0_irdma_uk_cq_poll_cmpl\n+000021e0 T rdmacore52_0_irdma_uk_cq_request_notification\n+00002130 T rdmacore52_0_irdma_uk_cq_resize\n+00002160 T rdmacore52_0_irdma_uk_cq_set_resized_cnt\n+000014e0 T rdmacore52_0_irdma_uk_inline_rdma_write\n+000017c0 T rdmacore52_0_irdma_uk_inline_send\n+00001d60 T rdmacore52_0_irdma_uk_mw_bind\n+00001fc0 T rdmacore52_0_irdma_uk_post_receive\n+00002c90 T rdmacore52_0_irdma_uk_qp_init\n+000003a0 T rdmacore52_0_irdma_uk_qp_post_wr\n+00000bd0 T rdmacore52_0_irdma_uk_rdma_read\n+00000760 T rdmacore52_0_irdma_uk_rdma_write\n+00001010 T rdmacore52_0_irdma_uk_send\n+00001b20 T rdmacore52_0_irdma_uk_stag_local_invalidate\n+\n+umain.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+         U free\n+00000000 r hca_table\n+00000020 t irdma_device_alloc\n+00000040 t irdma_ualloc_context\n+00000000 d irdma_uctx_ops\n+00000000 d irdma_udev_ops\n+00000310 t irdma_ufree_context\n+00000000 t irdma_uninit_device\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_irdma_cq_event\n+         U rdmacore52_0_irdma_mmap\n+         U rdmacore52_0_irdma_munmap\n+         U rdmacore52_0_irdma_ualloc_mw\n+         U rdmacore52_0_irdma_ualloc_pd\n+         U rdmacore52_0_irdma_uarm_cq\n+         U rdmacore52_0_irdma_uattach_mcast\n+         U rdmacore52_0_irdma_ubind_mw\n+         U rdmacore52_0_irdma_ucreate_ah\n+         U rdmacore52_0_irdma_ucreate_cq\n+         U rdmacore52_0_irdma_ucreate_cq_ex\n+         U rdmacore52_0_irdma_ucreate_qp\n+         U rdmacore52_0_irdma_udealloc_mw\n+         U rdmacore52_0_irdma_udereg_mr\n+         U rdmacore52_0_irdma_udestroy_ah\n+         U rdmacore52_0_irdma_udestroy_cq\n+         U rdmacore52_0_irdma_udestroy_qp\n+         U rdmacore52_0_irdma_udetach_mcast\n+         U rdmacore52_0_irdma_ufree_pd\n+         U rdmacore52_0_irdma_umodify_qp\n+         U rdmacore52_0_irdma_upoll_cq\n+         U rdmacore52_0_irdma_upost_recv\n+         U rdmacore52_0_irdma_upost_send\n+         U rdmacore52_0_irdma_uquery_device_ex\n+         U rdmacore52_0_irdma_uquery_port\n+         U rdmacore52_0_irdma_uquery_qp\n+         U rdmacore52_0_irdma_ureg_mr\n+         U rdmacore52_0_irdma_ureg_mr_dmabuf\n+         U rdmacore52_0_irdma_urereg_mr\n+         U rdmacore52_0_irdma_uresize_cq\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+00000000 D verbs_provider_irdma\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ----------   0        0        0     2492 1970-01-01 00:00:00.000000 /\n+?rw-r--r--   0        0        0    30200 1970-01-01 00:00:00.000000 uverbs.c.o\n ?rw-r--r--   0        0        0    21524 1970-01-01 00:00:00.000000 uk.c.o\n ?rw-r--r--   0        0        0     6484 1970-01-01 00:00:00.000000 umain.c.o\n-?rw-r--r--   0        0        0    30200 1970-01-01 00:00:00.000000 uverbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libmana.a", "source2": "./usr/lib/i386-linux-gnu/libmana.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -8,41 +8,41 @@\n rdmacore52_0_mana_dealloc_pd in mana.c.o\n rdmacore52_0_mana_reg_mr in mana.c.o\n rdmacore52_0_mana_create_cq in mana.c.o\n rdmacore52_0_mana_destroy_cq in mana.c.o\n rdmacore52_0_mana_dereg_mr in mana.c.o\n rdmacore52_0_to_mctx in mana.c.o\n verbs_provider_mana in mana.c.o\n-manadv_set_context_attr in manadv.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in manadv.c.o\n-manadv_init_obj in manadv.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n-rdmacore52_0_mana_create_qp in qp.c.o\n-rdmacore52_0_mana_modify_qp in qp.c.o\n-rdmacore52_0_mana_destroy_qp in qp.c.o\n-rdmacore52_0_mana_create_qp_ex in qp.c.o\n rdmacore52_0_mana_modify_wq in wq.c.o\n rdmacore52_0_mana_create_wq in wq.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in wq.c.o\n rdmacore52_0_mana_destroy_wq in wq.c.o\n rdmacore52_0_mana_create_rwq_ind_table in wq.c.o\n rdmacore52_0_mana_destroy_rwq_ind_table in wq.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n+rdmacore52_0_mana_create_qp in qp.c.o\n+rdmacore52_0_mana_modify_qp in qp.c.o\n+rdmacore52_0_mana_destroy_qp in qp.c.o\n+rdmacore52_0_mana_create_qp_ex in qp.c.o\n+manadv_set_context_attr in manadv.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in manadv.c.o\n+manadv_init_obj in manadv.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n \n mana.c.o:\n 00000000 r .LC0\n 000000f8 r .LC10\n 00000134 r .LC11\n 00000154 r .LC13\n 00000188 r .LC14\n@@ -123,24 +123,45 @@\n 000003e0 T rdmacore52_0_mana_reg_mr\n 00000ad0 T rdmacore52_0_to_mctx\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n 00000000 D verbs_provider_mana\n \n-manadv.c.o:\n+wq.c.o:\n 00000000 r .LC0\n+00000038 r .LC1\n+00000058 r .LC3\n+00000084 r .LC4\n+000000a8 r .LC6\n+000000d4 r .LC8\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n 00000000 r __func__.0\n-000000b0 T manadv_init_obj\n-00000000 T manadv_set_context_attr\n-00000000 t manadv_set_context_attr.cold\n+0000001c r __func__.1\n+00000038 r __func__.2\n+00000048 r __func__.3\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+0000001c t mana_create_rwq_ind_table.cold\n+00000000 t mana_create_wq.cold\n+00000023 t mana_destroy_rwq_ind_table.cold\n+0000000e t mana_destroy_wq.cold\n          U rdmacore52_0___verbs_log\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_ibv_cmd_create_rwq_ind_table\n+         U rdmacore52_0_ibv_cmd_create_wq\n+         U rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n+         U rdmacore52_0_ibv_cmd_destroy_wq\n+000003f0 T rdmacore52_0_mana_create_rwq_ind_table\n+00000010 T rdmacore52_0_mana_create_wq\n+00000560 T rdmacore52_0_mana_destroy_rwq_ind_table\n+000002c0 T rdmacore52_0_mana_destroy_wq\n+00000000 T rdmacore52_0_mana_modify_wq\n          U rdmacore52_0_to_mctx\n \n qp.c.o:\n 00000000 r .LC0\n 00000034 r .LC1\n 0000001d r .LC10\n 0000005c r .LC2\n@@ -171,54 +192,26 @@\n          U rdmacore52_0_ibv_cmd_destroy_qp\n 00000290 T rdmacore52_0_mana_create_qp\n 00000700 T rdmacore52_0_mana_create_qp_ex\n 000005d0 T rdmacore52_0_mana_destroy_qp\n 000005c0 T rdmacore52_0_mana_modify_qp\n          U rdmacore52_0_to_mctx\n \n-wq.c.o:\n+manadv.c.o:\n 00000000 r .LC0\n-00000038 r .LC1\n-00000058 r .LC3\n-00000084 r .LC4\n-000000a8 r .LC6\n-000000d4 r .LC8\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n 00000000 r __func__.0\n-0000001c r __func__.1\n-00000038 r __func__.2\n-00000048 r __func__.3\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-0000001c t mana_create_rwq_ind_table.cold\n-00000000 t mana_create_wq.cold\n-00000023 t mana_destroy_rwq_ind_table.cold\n-0000000e t mana_destroy_wq.cold\n+000000b0 T manadv_init_obj\n+00000000 T manadv_set_context_attr\n+00000000 t manadv_set_context_attr.cold\n          U rdmacore52_0___verbs_log\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibv_cmd_create_rwq_ind_table\n-         U rdmacore52_0_ibv_cmd_create_wq\n-         U rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n-         U rdmacore52_0_ibv_cmd_destroy_wq\n-000003f0 T rdmacore52_0_mana_create_rwq_ind_table\n-00000010 T rdmacore52_0_mana_create_wq\n-00000560 T rdmacore52_0_mana_destroy_rwq_ind_table\n-000002c0 T rdmacore52_0_mana_destroy_wq\n-00000000 T rdmacore52_0_mana_modify_wq\n          U rdmacore52_0_to_mctx\n \n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n-\n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0_ilog32\n@@ -233,7 +226,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,8 +1,8 @@\n ----------   0        0        0     1298 1970-01-01 00:00:00.000000 /\n ?rw-r--r--   0        0        0    12080 1970-01-01 00:00:00.000000 mana.c.o\n-?rw-r--r--   0        0        0     2236 1970-01-01 00:00:00.000000 manadv.c.o\n-?rw-r--r--   0        0        0     6076 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r--   0        0        0     5208 1970-01-01 00:00:00.000000 wq.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0     6076 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r--   0        0        0     2236 1970-01-01 00:00:00.000000 manadv.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libmlx4.a", "source2": "./usr/lib/i386-linux-gnu/libmlx4.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,26 +1,60 @@\n \n Archive index:\n-rdmacore52_0_mlx4_alloc_db in dbrec.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dbrec.c.o\n-rdmacore52_0_mlx4_free_db in dbrec.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in mlx4.c.o\n+mlx4dv_init_obj in mlx4.c.o\n+mlx4dv_query_device in mlx4.c.o\n+mlx4dv_set_context_attr in mlx4.c.o\n+verbs_provider_mlx4 in mlx4.c.o\n rdmacore52_0_mlx4_init_qp_indices in qp.c.o\n rdmacore52_0_mlx4_qp_init_sq_ownership in qp.c.o\n rdmacore52_0_mlx4_post_send in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n rdmacore52_0_mlx4_post_recv in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in qp.c.o\n rdmacore52_0_mlx4_post_wq_recv in qp.c.o\n rdmacore52_0_mlx4_calc_sq_wqe_size in qp.c.o\n rdmacore52_0_mlx4_alloc_qp_buf in qp.c.o\n rdmacore52_0_mlx4_set_sq_sizes in qp.c.o\n rdmacore52_0_mlx4_find_qp in qp.c.o\n rdmacore52_0_mlx4_store_qp in qp.c.o\n rdmacore52_0_mlx4_clear_qp in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.si in qp.c.o\n+rdmacore52_0_mlx4_free_srq_wqe in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in srq.c.o\n+rdmacore52_0_mlx4_post_srq_recv in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in srq.c.o\n+rdmacore52_0_mlx4_alloc_srq_buf in srq.c.o\n+rdmacore52_0_mlx4_init_xsrq_table in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in srq.c.o\n+rdmacore52_0_mlx4_find_xsrq in srq.c.o\n+rdmacore52_0_mlx4_store_xsrq in srq.c.o\n+rdmacore52_0_mlx4_clear_xsrq in srq.c.o\n+rdmacore52_0_mlx4_create_xrc_srq in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in srq.c.o\n+rdmacore52_0_mlx4_destroy_xrc_srq in srq.c.o\n+rdmacore52_0_mlx4_alloc_buf in buf.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in buf.c.o\n+rdmacore52_0_mlx4_free_buf in buf.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n+rdmacore52_0_mlx4_poll_cq in cq.c.o\n+rdmacore52_0_mlx4_cq_fill_pfns in cq.c.o\n+rdmacore52_0_mlx4_arm_cq in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in cq.c.o\n+rdmacore52_0_mlx4_cq_event in cq.c.o\n+rdmacore52_0___mlx4_cq_clean in cq.c.o\n+rdmacore52_0_mlx4_cq_clean in cq.c.o\n+rdmacore52_0_mlx4_get_outstanding_cqes in cq.c.o\n+rdmacore52_0_mlx4_cq_resize_copy_cqes in cq.c.o\n+rdmacore52_0_mlx4_alloc_cq_buf in cq.c.o\n+rdmacore52_0_mlx4_alloc_db in dbrec.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dbrec.c.o\n+rdmacore52_0_mlx4_free_db in dbrec.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_mlx4_query_device_ex in verbs.c.o\n rdmacore52_0_mlx4_query_device_ctx in verbs.c.o\n rdmacore52_0_mlx4_query_rt_values in verbs.c.o\n rdmacore52_0_mlx4_query_port in verbs.c.o\n rdmacore52_0_mlx4_alloc_pd in verbs.c.o\n rdmacore52_0_mlx4_free_pd in verbs.c.o\n@@ -55,75 +89,108 @@\n rdmacore52_0_mlx4_modify_wq in verbs.c.o\n rdmacore52_0_mlx4_create_flow in verbs.c.o\n rdmacore52_0_mlx4_destroy_flow in verbs.c.o\n rdmacore52_0_mlx4_destroy_wq in verbs.c.o\n rdmacore52_0_mlx4_create_rwq_ind_table in verbs.c.o\n rdmacore52_0_mlx4_destroy_rwq_ind_table in verbs.c.o\n rdmacore52_0_mlx4_modify_cq in verbs.c.o\n-rdmacore52_0_mlx4_free_srq_wqe in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in srq.c.o\n-rdmacore52_0_mlx4_post_srq_recv in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in srq.c.o\n-rdmacore52_0_mlx4_alloc_srq_buf in srq.c.o\n-rdmacore52_0_mlx4_init_xsrq_table in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in srq.c.o\n-rdmacore52_0_mlx4_find_xsrq in srq.c.o\n-rdmacore52_0_mlx4_store_xsrq in srq.c.o\n-rdmacore52_0_mlx4_clear_xsrq in srq.c.o\n-rdmacore52_0_mlx4_create_xrc_srq in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in srq.c.o\n-rdmacore52_0_mlx4_destroy_xrc_srq in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in mlx4.c.o\n-mlx4dv_init_obj in mlx4.c.o\n-mlx4dv_query_device in mlx4.c.o\n-mlx4dv_set_context_attr in mlx4.c.o\n-verbs_provider_mlx4 in mlx4.c.o\n-rdmacore52_0_mlx4_alloc_buf in buf.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in buf.c.o\n-rdmacore52_0_mlx4_free_buf in buf.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n-rdmacore52_0_mlx4_poll_cq in cq.c.o\n-rdmacore52_0_mlx4_cq_fill_pfns in cq.c.o\n-rdmacore52_0_mlx4_arm_cq in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in cq.c.o\n-rdmacore52_0_mlx4_cq_event in cq.c.o\n-rdmacore52_0___mlx4_cq_clean in cq.c.o\n-rdmacore52_0_mlx4_cq_clean in cq.c.o\n-rdmacore52_0_mlx4_get_outstanding_cqes in cq.c.o\n-rdmacore52_0_mlx4_cq_resize_copy_cqes in cq.c.o\n-rdmacore52_0_mlx4_alloc_cq_buf in cq.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n \n-dbrec.c.o:\n+mlx4.c.o:\n+00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n-00000000 r db_size\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n          U free\n-         U malloc\n-         U memset\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n+         U fwrite\n+00000040 d hca_table\n+00000100 t mlx4_alloc_context\n+00000000 d mlx4_ctx_ops\n+00000000 d mlx4_dev_ops\n+00000020 t mlx4_device_alloc\n+00000070 t mlx4_free_context\n+00000000 t mlx4_uninit_device\n+000003f0 T mlx4dv_init_obj\n+00000610 T mlx4dv_query_device\n+00000640 T mlx4dv_set_context_attr\n+         U mmap64\n+         U munmap\n+         U pthread_mutex_init\n+         U pthread_spin_init\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_mlx4_alloc_buf\n-00000000 T rdmacore52_0_mlx4_alloc_db\n-         U rdmacore52_0_mlx4_free_buf\n-000001a0 T rdmacore52_0_mlx4_free_db\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_mlx4_alloc_mw\n+         U rdmacore52_0_mlx4_alloc_pd\n+         U rdmacore52_0_mlx4_arm_cq\n+         U rdmacore52_0_mlx4_bind_mw\n+         U rdmacore52_0_mlx4_close_xrcd\n+         U rdmacore52_0_mlx4_cq_event\n+         U rdmacore52_0_mlx4_create_ah\n+         U rdmacore52_0_mlx4_create_cq\n+         U rdmacore52_0_mlx4_create_cq_ex\n+         U rdmacore52_0_mlx4_create_flow\n+         U rdmacore52_0_mlx4_create_qp\n+         U rdmacore52_0_mlx4_create_qp_ex\n+         U rdmacore52_0_mlx4_create_rwq_ind_table\n+         U rdmacore52_0_mlx4_create_srq\n+         U rdmacore52_0_mlx4_create_srq_ex\n+         U rdmacore52_0_mlx4_create_wq\n+         U rdmacore52_0_mlx4_dealloc_mw\n+         U rdmacore52_0_mlx4_dereg_mr\n+         U rdmacore52_0_mlx4_destroy_ah\n+         U rdmacore52_0_mlx4_destroy_cq\n+         U rdmacore52_0_mlx4_destroy_flow\n+         U rdmacore52_0_mlx4_destroy_qp\n+         U rdmacore52_0_mlx4_destroy_rwq_ind_table\n+         U rdmacore52_0_mlx4_destroy_srq\n+         U rdmacore52_0_mlx4_destroy_wq\n+         U rdmacore52_0_mlx4_free_pd\n+         U rdmacore52_0_mlx4_get_srq_num\n+         U rdmacore52_0_mlx4_init_xsrq_table\n+         U rdmacore52_0_mlx4_modify_cq\n+         U rdmacore52_0_mlx4_modify_qp\n+         U rdmacore52_0_mlx4_modify_srq\n+         U rdmacore52_0_mlx4_modify_wq\n+         U rdmacore52_0_mlx4_open_qp\n+         U rdmacore52_0_mlx4_open_xrcd\n+         U rdmacore52_0_mlx4_poll_cq\n+         U rdmacore52_0_mlx4_post_recv\n+         U rdmacore52_0_mlx4_post_send\n+         U rdmacore52_0_mlx4_post_srq_recv\n+         U rdmacore52_0_mlx4_query_device_ctx\n+         U rdmacore52_0_mlx4_query_device_ex\n+         U rdmacore52_0_mlx4_query_port\n+         U rdmacore52_0_mlx4_query_qp\n+         U rdmacore52_0_mlx4_query_rt_values\n+         U rdmacore52_0_mlx4_query_srq\n+         U rdmacore52_0_mlx4_reg_mr\n+         U rdmacore52_0_mlx4_rereg_mr\n+         U rdmacore52_0_mlx4_resize_cq\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+         U stderr\n+         U sysconf\n+00000000 D verbs_provider_mlx4\n \n qp.c.o:\n 00000410 t .L28\n 00000c18 t .L32\n 00000c2d t .L34\n 00000cf1 t .L35\n 00000b72 t .L36\n@@ -150,14 +217,129 @@\n 00000f00 T rdmacore52_0_mlx4_post_recv\n 00000210 T rdmacore52_0_mlx4_post_send\n 00001150 T rdmacore52_0_mlx4_post_wq_recv\n 00000030 T rdmacore52_0_mlx4_qp_init_sq_ownership\n 00001710 T rdmacore52_0_mlx4_set_sq_sizes\n 000017e0 T rdmacore52_0_mlx4_store_qp\n \n+srq.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U malloc\n+         U memset\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0_ibv_cmd_create_srq_ex\n+         U rdmacore52_0_ibv_cmd_destroy_srq\n+         U rdmacore52_0_ilog64\n+         U rdmacore52_0_mlx4_alloc_buf\n+         U rdmacore52_0_mlx4_alloc_db\n+00000240 T rdmacore52_0_mlx4_alloc_srq_buf\n+00000580 T rdmacore52_0_mlx4_clear_xsrq\n+         U rdmacore52_0_mlx4_cq_clean\n+00000600 T rdmacore52_0_mlx4_create_xrc_srq\n+000008d0 T rdmacore52_0_mlx4_destroy_xrc_srq\n+00000490 T rdmacore52_0_mlx4_find_xsrq\n+         U rdmacore52_0_mlx4_free_buf\n+         U rdmacore52_0_mlx4_free_db\n+00000000 T rdmacore52_0_mlx4_free_srq_wqe\n+00000410 T rdmacore52_0_mlx4_init_xsrq_table\n+00000060 T rdmacore52_0_mlx4_post_srq_recv\n+000004d0 T rdmacore52_0_mlx4_store_xsrq\n+\n+buf.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U mmap64\n+         U munmap\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_mlx4_alloc_buf\n+00000120 T rdmacore52_0_mlx4_free_buf\n+\n+cq.c.o:\n+000010a0 t .L223\n+000011d2 t .L224\n+000011c6 t .L226\n+000011b3 t .L227\n+000011a0 t .L228\n+0000118f t .L229\n+00001091 t .L230\n+00001158 t .L232\n+0000115f t .L233\n+00000000 r .LC0\n+000000c0 r CSWTCH.40\n+00000080 r CSWTCH.48\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __printf_chk\n+         U __stack_chk_fail_local\n+         U memcpy\n+         U memset\n+000001d0 t mlx4_cq_read_wc_byte_len\n+00000140 t mlx4_cq_read_wc_completion_ts\n+000000a0 t mlx4_cq_read_wc_dlid_path_bits\n+000001e0 t mlx4_cq_read_wc_flags\n+000001b0 t mlx4_cq_read_wc_imm_data\n+00000000 t mlx4_cq_read_wc_opcode\n+00000190 t mlx4_cq_read_wc_qp_num\n+00000070 t mlx4_cq_read_wc_sl\n+000000c0 t mlx4_cq_read_wc_slid\n+00000170 t mlx4_cq_read_wc_src_qp\n+00000060 t mlx4_cq_read_wc_vendor_err\n+00000120 t mlx4_end_poll\n+000000e0 t mlx4_end_poll_lock\n+00000600 t mlx4_next_poll\n+00000930 t mlx4_start_poll\n+00000270 t mlx4_start_poll_lock\n+         U mmio_write64_be\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00001420 T rdmacore52_0___mlx4_cq_clean\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+         U rdmacore52_0_mlx4_alloc_buf\n+000019f0 T rdmacore52_0_mlx4_alloc_cq_buf\n+00001380 T rdmacore52_0_mlx4_arm_cq\n+000017c0 T rdmacore52_0_mlx4_cq_clean\n+00001410 T rdmacore52_0_mlx4_cq_event\n+00001240 T rdmacore52_0_mlx4_cq_fill_pfns\n+000018f0 T rdmacore52_0_mlx4_cq_resize_copy_cqes\n+         U rdmacore52_0_mlx4_find_qp\n+         U rdmacore52_0_mlx4_find_xsrq\n+         U rdmacore52_0_mlx4_free_srq_wqe\n+00001810 T rdmacore52_0_mlx4_get_outstanding_cqes\n+00000c80 T rdmacore52_0_mlx4_poll_cq\n+\n+dbrec.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 r db_size\n+         U free\n+         U malloc\n+         U memset\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_mlx4_alloc_buf\n+00000000 T rdmacore52_0_mlx4_alloc_db\n+         U rdmacore52_0_mlx4_free_buf\n+000001a0 T rdmacore52_0_mlx4_free_db\n+\n verbs.c.o:\n 00000000 r .LC0\n 00000000 r .LC1\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __snprintf_chk\n          U __stack_chk_fail_local\n@@ -271,203 +453,14 @@\n 00000d80 T rdmacore52_0_mlx4_reg_mr\n 00000e40 T rdmacore52_0_mlx4_rereg_mr\n 000015d0 T rdmacore52_0_mlx4_resize_cq\n          U rdmacore52_0_mlx4_set_sq_sizes\n          U rdmacore52_0_mlx4_store_qp\n          U stderr\n \n-srq.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-         U malloc\n-         U memset\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U pthread_spin_init\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0_ibv_cmd_create_srq_ex\n-         U rdmacore52_0_ibv_cmd_destroy_srq\n-         U rdmacore52_0_ilog64\n-         U rdmacore52_0_mlx4_alloc_buf\n-         U rdmacore52_0_mlx4_alloc_db\n-00000240 T rdmacore52_0_mlx4_alloc_srq_buf\n-00000580 T rdmacore52_0_mlx4_clear_xsrq\n-         U rdmacore52_0_mlx4_cq_clean\n-00000600 T rdmacore52_0_mlx4_create_xrc_srq\n-000008d0 T rdmacore52_0_mlx4_destroy_xrc_srq\n-00000490 T rdmacore52_0_mlx4_find_xsrq\n-         U rdmacore52_0_mlx4_free_buf\n-         U rdmacore52_0_mlx4_free_db\n-00000000 T rdmacore52_0_mlx4_free_srq_wqe\n-00000410 T rdmacore52_0_mlx4_init_xsrq_table\n-00000060 T rdmacore52_0_mlx4_post_srq_recv\n-000004d0 T rdmacore52_0_mlx4_store_xsrq\n-\n-mlx4.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-         U free\n-         U fwrite\n-00000040 d hca_table\n-00000100 t mlx4_alloc_context\n-00000000 d mlx4_ctx_ops\n-00000000 d mlx4_dev_ops\n-00000020 t mlx4_device_alloc\n-00000070 t mlx4_free_context\n-00000000 t mlx4_uninit_device\n-000003f0 T mlx4dv_init_obj\n-00000610 T mlx4dv_query_device\n-00000640 T mlx4dv_set_context_attr\n-         U mmap64\n-         U munmap\n-         U pthread_mutex_init\n-         U pthread_spin_init\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_mlx4_alloc_mw\n-         U rdmacore52_0_mlx4_alloc_pd\n-         U rdmacore52_0_mlx4_arm_cq\n-         U rdmacore52_0_mlx4_bind_mw\n-         U rdmacore52_0_mlx4_close_xrcd\n-         U rdmacore52_0_mlx4_cq_event\n-         U rdmacore52_0_mlx4_create_ah\n-         U rdmacore52_0_mlx4_create_cq\n-         U rdmacore52_0_mlx4_create_cq_ex\n-         U rdmacore52_0_mlx4_create_flow\n-         U rdmacore52_0_mlx4_create_qp\n-         U rdmacore52_0_mlx4_create_qp_ex\n-         U rdmacore52_0_mlx4_create_rwq_ind_table\n-         U rdmacore52_0_mlx4_create_srq\n-         U rdmacore52_0_mlx4_create_srq_ex\n-         U rdmacore52_0_mlx4_create_wq\n-         U rdmacore52_0_mlx4_dealloc_mw\n-         U rdmacore52_0_mlx4_dereg_mr\n-         U rdmacore52_0_mlx4_destroy_ah\n-         U rdmacore52_0_mlx4_destroy_cq\n-         U rdmacore52_0_mlx4_destroy_flow\n-         U rdmacore52_0_mlx4_destroy_qp\n-         U rdmacore52_0_mlx4_destroy_rwq_ind_table\n-         U rdmacore52_0_mlx4_destroy_srq\n-         U rdmacore52_0_mlx4_destroy_wq\n-         U rdmacore52_0_mlx4_free_pd\n-         U rdmacore52_0_mlx4_get_srq_num\n-         U rdmacore52_0_mlx4_init_xsrq_table\n-         U rdmacore52_0_mlx4_modify_cq\n-         U rdmacore52_0_mlx4_modify_qp\n-         U rdmacore52_0_mlx4_modify_srq\n-         U rdmacore52_0_mlx4_modify_wq\n-         U rdmacore52_0_mlx4_open_qp\n-         U rdmacore52_0_mlx4_open_xrcd\n-         U rdmacore52_0_mlx4_poll_cq\n-         U rdmacore52_0_mlx4_post_recv\n-         U rdmacore52_0_mlx4_post_send\n-         U rdmacore52_0_mlx4_post_srq_recv\n-         U rdmacore52_0_mlx4_query_device_ctx\n-         U rdmacore52_0_mlx4_query_device_ex\n-         U rdmacore52_0_mlx4_query_port\n-         U rdmacore52_0_mlx4_query_qp\n-         U rdmacore52_0_mlx4_query_rt_values\n-         U rdmacore52_0_mlx4_query_srq\n-         U rdmacore52_0_mlx4_reg_mr\n-         U rdmacore52_0_mlx4_rereg_mr\n-         U rdmacore52_0_mlx4_resize_cq\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-         U stderr\n-         U sysconf\n-00000000 D verbs_provider_mlx4\n-\n-buf.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U mmap64\n-         U munmap\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_mlx4_alloc_buf\n-00000120 T rdmacore52_0_mlx4_free_buf\n-\n-cq.c.o:\n-000010a0 t .L223\n-000011d2 t .L224\n-000011c6 t .L226\n-000011b3 t .L227\n-000011a0 t .L228\n-0000118f t .L229\n-00001091 t .L230\n-00001158 t .L232\n-0000115f t .L233\n-00000000 r .LC0\n-000000c0 r CSWTCH.40\n-00000080 r CSWTCH.48\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __printf_chk\n-         U __stack_chk_fail_local\n-         U memcpy\n-         U memset\n-000001d0 t mlx4_cq_read_wc_byte_len\n-00000140 t mlx4_cq_read_wc_completion_ts\n-000000a0 t mlx4_cq_read_wc_dlid_path_bits\n-000001e0 t mlx4_cq_read_wc_flags\n-000001b0 t mlx4_cq_read_wc_imm_data\n-00000000 t mlx4_cq_read_wc_opcode\n-00000190 t mlx4_cq_read_wc_qp_num\n-00000070 t mlx4_cq_read_wc_sl\n-000000c0 t mlx4_cq_read_wc_slid\n-00000170 t mlx4_cq_read_wc_src_qp\n-00000060 t mlx4_cq_read_wc_vendor_err\n-00000120 t mlx4_end_poll\n-000000e0 t mlx4_end_poll_lock\n-00000600 t mlx4_next_poll\n-00000930 t mlx4_start_poll\n-00000270 t mlx4_start_poll_lock\n-         U mmio_write64_be\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00001420 T rdmacore52_0___mlx4_cq_clean\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-         U rdmacore52_0_mlx4_alloc_buf\n-000019f0 T rdmacore52_0_mlx4_alloc_cq_buf\n-00001380 T rdmacore52_0_mlx4_arm_cq\n-000017c0 T rdmacore52_0_mlx4_cq_clean\n-00001410 T rdmacore52_0_mlx4_cq_event\n-00001240 T rdmacore52_0_mlx4_cq_fill_pfns\n-000018f0 T rdmacore52_0_mlx4_cq_resize_copy_cqes\n-         U rdmacore52_0_mlx4_find_qp\n-         U rdmacore52_0_mlx4_find_xsrq\n-         U rdmacore52_0_mlx4_free_srq_wqe\n-00001810 T rdmacore52_0_mlx4_get_outstanding_cqes\n-00000c80 T rdmacore52_0_mlx4_poll_cq\n-\n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n-\n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0_ilog32\n@@ -482,7 +475,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,11 +1,11 @@\n ----------   0        0        0     3598 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0     2328 1970-01-01 00:00:00.000000 dbrec.c.o\n+?rw-r--r--   0        0        0     8936 1970-01-01 00:00:00.000000 mlx4.c.o\n ?rw-r--r--   0        0        0    10228 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r--   0        0        0    26352 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     7044 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r--   0        0        0     8936 1970-01-01 00:00:00.000000 mlx4.c.o\n ?rw-r--r--   0        0        0     1980 1970-01-01 00:00:00.000000 buf.c.o\n ?rw-r--r--   0        0        0    13112 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0     2328 1970-01-01 00:00:00.000000 dbrec.c.o\n+?rw-r--r--   0        0        0    26352 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libmlx5.a", "source2": "./usr/lib/i386-linux-gnu/libmlx5.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,320 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_rule.c.o\n+rdmacore52_0_dr_rule_send_update_list in dr_rule.c.o\n+rdmacore52_0_dr_rule_rehash_matcher_s_anchor in dr_rule.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_rule.c.o\n+rdmacore52_0_dr_rule_set_last_member in dr_rule.c.o\n+rdmacore52_0_dr_rule_get_reverse_rule_members in dr_rule.c.o\n+mlx5dv_dr_rule_create in dr_rule.c.o\n+mlx5dv_dr_rule_destroy in dr_rule.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_dbg.c.o\n+mlx5dv_dump_dr_domain in dr_dbg.c.o\n+mlx5dv_dump_dr_table in dr_dbg.c.o\n+mlx5dv_dump_dr_matcher in dr_dbg.c.o\n+mlx5dv_dump_dr_rule in dr_dbg.c.o\n+rdmacore52_0_dr_crc32_init_table in dr_crc32.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in dr_crc32.c.o\n+rdmacore52_0_dr_crc32_slice8_calc in dr_crc32.c.o\n+rdmacore52_0_dr_ste_calc_hash_index in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_ste.c.o\n+rdmacore52_0_dr_ste_conv_bit_to_byte_mask in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_bit_mask in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_miss_addr in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_hit_addr in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_hit_gvmi in dr_ste.c.o\n+rdmacore52_0_dr_ste_get_icm_addr in dr_ste.c.o\n+rdmacore52_0_dr_ste_get_mr_addr in dr_ste.c.o\n+rdmacore52_0_dr_ste_get_miss_list in dr_ste.c.o\n+rdmacore52_0_dr_ste_get_miss_list_top in dr_ste.c.o\n+rdmacore52_0_dr_ste_is_last_in_rule in dr_ste.c.o\n+rdmacore52_0_dr_ste_equal_tag in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl in dr_ste.c.o\n+rdmacore52_0_dr_ste_prepare_for_postsend in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_formated_ste in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in dr_ste.c.o\n+rdmacore52_0_dr_ste_free in dr_ste.c.o\n+rdmacore52_0_dr_ste_htbl_init_and_postsend in dr_ste.c.o\n+rdmacore52_0_dr_ste_htbl_alloc in dr_ste.c.o\n+rdmacore52_0_dr_ste_create_next_htbl in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_ste.c.o\n+rdmacore52_0_dr_ste_htbl_free in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_actions_tx in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_actions_rx in dr_ste.c.o\n+rdmacore52_0_dr_ste_conv_modify_hdr_sw_field in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_action_set in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_action_add in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_action_copy in dr_ste.c.o\n+rdmacore52_0_dr_ste_set_action_decap_l3_list in dr_ste.c.o\n+rdmacore52_0_dr_ste_alloc_modify_hdr in dr_ste.c.o\n+rdmacore52_0_dr_ste_free_modify_hdr in dr_ste.c.o\n+rdmacore52_0_dr_ste_alloc_encap in dr_ste.c.o\n+rdmacore52_0_dr_ste_free_encap in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_pre_check in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_ste_arr in dr_ste.c.o\n+rdmacore52_0_dr_ste_copy_param in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l2_src_dst in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l3_ipv6_src in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l2_src in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l2_dst in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l2_tnl in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_empty_always_hit in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_mpls in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_gre in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_mpls_over_gre in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_mpls_over_udp in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_icmp in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_general_purpose in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_eth_l4_misc in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_vxlan_gpe in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_geneve in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_gtpu in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_register_0 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_register_1 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_src_gvmi_qpn in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_flex_parser_0 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_flex_parser_1 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_tunnel_header in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_ib_l4 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def0 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def2 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def6 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def16 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def22 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def24 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def25 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def26 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def28 in dr_ste.c.o\n+rdmacore52_0_dr_ste_build_def33 in dr_ste.c.o\n+rdmacore52_0_dr_ste_get_ctx in dr_ste.c.o\n+mlx5dv_dr_aso_other_domain_link in dr_ste.c.o\n+mlx5dv_dr_aso_other_domain_unlink in dr_ste.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_action.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_action.c.o\n+rdmacore52_0_dr_actions_build_ste_arr in dr_action.c.o\n+rdmacore52_0_dr_actions_build_attr in dr_action.c.o\n+mlx5dv_dr_action_create_drop in dr_action.c.o\n+mlx5dv_dr_action_create_default_miss in dr_action.c.o\n+mlx5dv_dr_action_create_dest_ibv_qp in dr_action.c.o\n+mlx5dv_dr_action_create_dest_devx_tir in dr_action.c.o\n+mlx5dv_dr_action_create_dest_table in dr_action.c.o\n+mlx5dv_dr_action_create_dest_root_table in dr_action.c.o\n+mlx5dv_dr_action_create_flow_counter in dr_action.c.o\n+mlx5dv_dr_action_create_aso in dr_action.c.o\n+mlx5dv_dr_action_modify_aso in dr_action.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in dr_action.c.o\n+mlx5dv_dr_action_create_tag in dr_action.c.o\n+mlx5dv_dr_action_create_packet_reformat in dr_action.c.o\n+mlx5dv_dr_action_create_pop_vlan in dr_action.c.o\n+mlx5dv_dr_action_create_push_vlan in dr_action.c.o\n+rdmacore52_0_dr_actions_reformat_get_id in dr_action.c.o\n+mlx5dv_dr_action_create_modify_header in dr_action.c.o\n+mlx5dv_dr_action_modify_flow_meter in dr_action.c.o\n+mlx5dv_dr_action_create_flow_meter in dr_action.c.o\n+mlx5dv_dr_action_create_dest_vport in dr_action.c.o\n+mlx5dv_dr_action_create_dest_ib_port in dr_action.c.o\n+mlx5dv_dr_action_create_dest_array in dr_action.c.o\n+mlx5dv_dr_action_destroy in dr_action.c.o\n+mlx5dv_dr_action_create_flow_sampler in dr_action.c.o\n+rdmacore52_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n+rdmacore52_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n+rdmacore52_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n+rdmacore52_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_domain.c.o\n+mlx5dv_dr_domain_create in dr_domain.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_domain.c.o\n+mlx5dv_dr_domain_sync in dr_domain.c.o\n+mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n+mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n+mlx5dv_dr_domain_destroy in dr_domain.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in dr_send.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_send.c.o\n+rdmacore52_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_ste in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_htbl in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_formated_htbl in dr_send.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_action in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_pattern in dr_send.c.o\n+rdmacore52_0_dr_send_postsend_args in dr_send.c.o\n+rdmacore52_0_dr_send_allow_fl in dr_send.c.o\n+rdmacore52_0_dr_send_ring_free in dr_send.c.o\n+rdmacore52_0_dr_send_ring_alloc in dr_send.c.o\n+rdmacore52_0_dr_send_ring_force_drain in dr_send.c.o\n+rdmacore52_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v2.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in qp.c.o\n+rdmacore52_0_mlx5_copy_to_recv_wqe in qp.c.o\n+rdmacore52_0_mlx5_copy_to_send_wqe in qp.c.o\n+rdmacore52_0_mlx5_get_send_wqe in qp.c.o\n+rdmacore52_0_mlx5_init_rwq_indices in qp.c.o\n+rdmacore52_0_mlx5_init_qp_indices in qp.c.o\n+rdmacore52_0_mlx5_get_atomic_laddr in qp.c.o\n+rdmacore52_0_mlx5_post_send in qp.c.o\n+rdmacore52_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in qp.c.o\n+rdmacore52_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n+rdmacore52_0_mlx5_qp_fill_wr_pfns in qp.c.o\n+rdmacore52_0_mlx5_bind_mw in qp.c.o\n+rdmacore52_0_mlx5_post_wq_recv in qp.c.o\n+rdmacore52_0_mlx5_post_recv in qp.c.o\n+rdmacore52_0_mlx5_post_srq_ops in qp.c.o\n+rdmacore52_0_mlx5_use_huge in qp.c.o\n+rdmacore52_0_mlx5_find_qp in qp.c.o\n+rdmacore52_0_mlx5_store_qp in qp.c.o\n+rdmacore52_0_mlx5_clear_qp in qp.c.o\n+mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n+rdmacore52_0_dr_buddy_init in dr_buddy.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_buddy.c.o\n+rdmacore52_0_dr_buddy_cleanup in dr_buddy.c.o\n+rdmacore52_0_dr_buddy_alloc_mem in dr_buddy.c.o\n+rdmacore52_0_dr_buddy_free_mem in dr_buddy.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_buddy.c.o\n+rdmacore52_0_dr_vports_table_get_vport_cap in dr_vports.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_vports.c.o\n+rdmacore52_0_dr_vports_table_get_ib_port_cap in dr_vports.c.o\n+rdmacore52_0_dr_vports_table_add_wire in dr_vports.c.o\n+rdmacore52_0_dr_vports_table_del_wire in dr_vports.c.o\n+rdmacore52_0_dr_vports_table_create in dr_vports.c.o\n+rdmacore52_0_dr_vports_table_destroy in dr_vports.c.o\n+rdmacore52_0_mlx5_copy_to_recv_srq in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in srq.c.o\n+rdmacore52_0_mlx5_free_srq_wqe in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in srq.c.o\n+rdmacore52_0_srq_cooldown_wqe in srq.c.o\n+rdmacore52_0_mlx5_complete_odp_fault in srq.c.o\n+rdmacore52_0_mlx5_post_srq_recv in srq.c.o\n+rdmacore52_0_mlx5_alloc_srq_buf in srq.c.o\n+rdmacore52_0_mlx5_find_srq in srq.c.o\n+rdmacore52_0_mlx5_store_srq in srq.c.o\n+rdmacore52_0_mlx5_clear_srq in srq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in dr_ste_v0.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v0.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_ste_v0.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in dr_ste_v0.c.o\n+rdmacore52_0_dr_ste_get_ctx_v0 in dr_ste_v0.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_ste_v0.c.o\n+rdmacore52_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_ptrn.c.o\n+rdmacore52_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n+rdmacore52_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n+rdmacore52_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n+rdmacore52_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_table.c.o\n+mlx5dv_dr_table_create in dr_table.c.o\n+mlx5dv_dr_table_destroy in dr_table.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in buf.c.o\n+rdmacore52_0_mlx5_free_buf_extern in buf.c.o\n+rdmacore52_0_mlx5_alloc_buf_extern in buf.c.o\n+rdmacore52_0_mlx5_free_actual_buf in buf.c.o\n+rdmacore52_0_mlx5_is_custom_alloc in buf.c.o\n+rdmacore52_0_mlx5_is_extern_alloc in buf.c.o\n+rdmacore52_0_mlx5_get_alloc_type in buf.c.o\n+rdmacore52_0_mlx5_alloc_buf_contig in buf.c.o\n+rdmacore52_0_mlx5_alloc_prefered_buf in buf.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in buf.c.o\n+rdmacore52_0_mlx5_free_buf_contig in buf.c.o\n+rdmacore52_0_mlx5_alloc_buf in buf.c.o\n+rdmacore52_0_mlx5_free_buf in buf.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_icm_pool.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_free_chunk in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_create in dr_icm_pool.c.o\n+rdmacore52_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in dr_icm_pool.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_matcher.c.o\n+mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n+mlx5dv_dr_matcher_create in dr_matcher.c.o\n+mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n+rdmacore52_0_dr_devx_query_esw_vport_context in dr_devx.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_gvmi in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_esw_caps in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_device in dr_devx.c.o\n+rdmacore52_0_dr_devx_sync_steering in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_flow_table in dr_devx.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_flow_table in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_always_hit_ft in dr_devx.c.o\n+rdmacore52_0_dr_devx_destroy_always_hit_ft in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_flow_sampler in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_flow_sampler in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_definer in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_reformat_ctx in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_meter in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_meter in dr_devx.c.o\n+rdmacore52_0_dr_devx_modify_meter in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_qp in dr_devx.c.o\n+rdmacore52_0_dr_devx_modify_qp_rst2init in dr_devx.c.o\n+rdmacore52_0_dr_devx_modify_qp_init2rtr in dr_devx.c.o\n+rdmacore52_0_dr_devx_modify_qp_rtr2rts in dr_devx.c.o\n+rdmacore52_0_dr_devx_query_gid in dr_devx.c.o\n+rdmacore52_0_dr_devx_create_modify_header_arg in dr_devx.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in dr_ste_v1.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v1.c.o\n+rdmacore52_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n+rdmacore52_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in dr_ste_v1.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in mlx5_vfio.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in mlx5_vfio.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in mlx5_vfio.c.o\n+mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n+mlx5dv_vfio_process_events in mlx5_vfio.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in mlx5_vfio.c.o\n+mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n+rdmacore52_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.dx in cq.c.o\n+rdmacore52_0_mlx5_stall_cq_dec_step in cq.c.o\n+rdmacore52_0_mlx5_stall_cq_poll_min in cq.c.o\n+rdmacore52_0_mlx5_stall_cq_inc_step in cq.c.o\n+rdmacore52_0_mlx5_stall_cq_poll_max in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n+rdmacore52_0_mlx5_stall_num_loop in cq.c.o\n+rdmacore52_0_mlx5_poll_cq in cq.c.o\n+rdmacore52_0_mlx5_poll_cq_v1 in cq.c.o\n+rdmacore52_0_mlx5_cq_fill_pfns in cq.c.o\n+rdmacore52_0_mlx5_arm_cq in cq.c.o\n+rdmacore52_0_mlx5_cq_event in cq.c.o\n+rdmacore52_0___mlx5_cq_clean in cq.c.o\n+rdmacore52_0_mlx5_cq_clean in cq.c.o\n+rdmacore52_0_mlx5_cq_resize_copy_cqes in cq.c.o\n+rdmacore52_0_mlx5_alloc_cq_buf in cq.c.o\n+rdmacore52_0_mlx5_free_cq_buf in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in dr_arg.c.o\n+rdmacore52_0_dr_arg_get_object_id in dr_arg.c.o\n+rdmacore52_0_dr_arg_get_obj in dr_arg.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in dr_arg.c.o\n+rdmacore52_0_dr_arg_put_obj in dr_arg.c.o\n+rdmacore52_0_dr_arg_mngr_create in dr_arg.c.o\n+rdmacore52_0_dr_arg_mngr_destroy in dr_arg.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in mlx5.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in mlx5.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in mlx5.c.o\n rdmacore52_0___x86.get_pc_thunk.si in mlx5.c.o\n rdmacore52_0_mlx5_debug_mask in mlx5.c.o\n rdmacore52_0_mlx5_freeze_on_error_cqe in mlx5.c.o\n rdmacore52_0___x86.get_pc_thunk.di in mlx5.c.o\n@@ -41,55 +352,17 @@\n mlx5dv_get_clock_info in mlx5.c.o\n mlx5dv_is_supported in mlx5.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in mlx5.c.o\n mlx5dv_open_device in mlx5.c.o\n rdmacore52_0_mlx5_get_dv_ops in mlx5.c.o\n rdmacore52_0_mlx5_hca_table in mlx5.c.o\n verbs_provider_mlx5 in mlx5.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_rule.c.o\n-rdmacore52_0_dr_rule_send_update_list in dr_rule.c.o\n-rdmacore52_0_dr_rule_rehash_matcher_s_anchor in dr_rule.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_rule.c.o\n-rdmacore52_0_dr_rule_set_last_member in dr_rule.c.o\n-rdmacore52_0_dr_rule_get_reverse_rule_members in dr_rule.c.o\n-mlx5dv_dr_rule_create in dr_rule.c.o\n-mlx5dv_dr_rule_destroy in dr_rule.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_ste_v1.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v1.c.o\n-rdmacore52_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n-rdmacore52_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_ste_v1.c.o\n rdmacore52_0_mlx5_alloc_dbrec in dbrec.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in dbrec.c.o\n rdmacore52_0_mlx5_free_db in dbrec.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in qp.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in qp.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in qp.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in qp.c.o\n-rdmacore52_0_mlx5_copy_to_recv_wqe in qp.c.o\n-rdmacore52_0_mlx5_copy_to_send_wqe in qp.c.o\n-rdmacore52_0_mlx5_get_send_wqe in qp.c.o\n-rdmacore52_0_mlx5_init_rwq_indices in qp.c.o\n-rdmacore52_0_mlx5_init_qp_indices in qp.c.o\n-rdmacore52_0_mlx5_get_atomic_laddr in qp.c.o\n-rdmacore52_0_mlx5_post_send in qp.c.o\n-rdmacore52_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in qp.c.o\n-rdmacore52_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n-rdmacore52_0_mlx5_qp_fill_wr_pfns in qp.c.o\n-rdmacore52_0_mlx5_bind_mw in qp.c.o\n-rdmacore52_0_mlx5_post_wq_recv in qp.c.o\n-rdmacore52_0_mlx5_post_recv in qp.c.o\n-rdmacore52_0_mlx5_post_srq_ops in qp.c.o\n-rdmacore52_0_mlx5_use_huge in qp.c.o\n-rdmacore52_0_mlx5_find_qp in qp.c.o\n-rdmacore52_0_mlx5_store_qp in qp.c.o\n-rdmacore52_0_mlx5_clear_qp in qp.c.o\n-mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_mlx5_single_threaded in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.di in verbs.c.o\n rdmacore52_0__mlx5dv_create_flow in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in verbs.c.o\n rdmacore52_0_mlx5_query_rt_values in verbs.c.o\n@@ -227,539 +500,27 @@\n mlx5dv_pp_free in verbs.c.o\n mlx5dv_devx_alloc_msi_vector in verbs.c.o\n mlx5dv_devx_free_msi_vector in verbs.c.o\n mlx5dv_devx_create_eq in verbs.c.o\n mlx5dv_devx_destroy_eq in verbs.c.o\n rdmacore52_0_mlx5_set_dv_ctx_ops in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in dr_send.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_send.c.o\n-rdmacore52_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_ste in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_htbl in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_formated_htbl in dr_send.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_action in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_pattern in dr_send.c.o\n-rdmacore52_0_dr_send_postsend_args in dr_send.c.o\n-rdmacore52_0_dr_send_allow_fl in dr_send.c.o\n-rdmacore52_0_dr_send_ring_free in dr_send.c.o\n-rdmacore52_0_dr_send_ring_alloc in dr_send.c.o\n-rdmacore52_0_dr_send_ring_force_drain in dr_send.c.o\n-rdmacore52_0_dr_crc32_init_table in dr_crc32.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in dr_crc32.c.o\n-rdmacore52_0_dr_crc32_slice8_calc in dr_crc32.c.o\n-rdmacore52_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v2.c.o\n-rdmacore52_0_mlx5_copy_to_recv_srq in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in srq.c.o\n-rdmacore52_0_mlx5_free_srq_wqe in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in srq.c.o\n-rdmacore52_0_srq_cooldown_wqe in srq.c.o\n-rdmacore52_0_mlx5_complete_odp_fault in srq.c.o\n-rdmacore52_0_mlx5_post_srq_recv in srq.c.o\n-rdmacore52_0_mlx5_alloc_srq_buf in srq.c.o\n-rdmacore52_0_mlx5_find_srq in srq.c.o\n-rdmacore52_0_mlx5_store_srq in srq.c.o\n-rdmacore52_0_mlx5_clear_srq in srq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_table.c.o\n-mlx5dv_dr_table_create in dr_table.c.o\n-mlx5dv_dr_table_destroy in dr_table.c.o\n-rdmacore52_0_dr_devx_query_esw_vport_context in dr_devx.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_gvmi in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_esw_caps in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_device in dr_devx.c.o\n-rdmacore52_0_dr_devx_sync_steering in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_flow_table in dr_devx.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_flow_table in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_always_hit_ft in dr_devx.c.o\n-rdmacore52_0_dr_devx_destroy_always_hit_ft in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_flow_sampler in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_flow_sampler in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_definer in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_reformat_ctx in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_meter in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_meter in dr_devx.c.o\n-rdmacore52_0_dr_devx_modify_meter in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_qp in dr_devx.c.o\n-rdmacore52_0_dr_devx_modify_qp_rst2init in dr_devx.c.o\n-rdmacore52_0_dr_devx_modify_qp_init2rtr in dr_devx.c.o\n-rdmacore52_0_dr_devx_modify_qp_rtr2rts in dr_devx.c.o\n-rdmacore52_0_dr_devx_query_gid in dr_devx.c.o\n-rdmacore52_0_dr_devx_create_modify_header_arg in dr_devx.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_matcher.c.o\n-mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n-mlx5dv_dr_matcher_create in dr_matcher.c.o\n-mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n-rdmacore52_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_ptrn.c.o\n-rdmacore52_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n-rdmacore52_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n-rdmacore52_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n-rdmacore52_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_action.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_action.c.o\n-rdmacore52_0_dr_actions_build_ste_arr in dr_action.c.o\n-rdmacore52_0_dr_actions_build_attr in dr_action.c.o\n-mlx5dv_dr_action_create_drop in dr_action.c.o\n-mlx5dv_dr_action_create_default_miss in dr_action.c.o\n-mlx5dv_dr_action_create_dest_ibv_qp in dr_action.c.o\n-mlx5dv_dr_action_create_dest_devx_tir in dr_action.c.o\n-mlx5dv_dr_action_create_dest_table in dr_action.c.o\n-mlx5dv_dr_action_create_dest_root_table in dr_action.c.o\n-mlx5dv_dr_action_create_flow_counter in dr_action.c.o\n-mlx5dv_dr_action_create_aso in dr_action.c.o\n-mlx5dv_dr_action_modify_aso in dr_action.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in dr_action.c.o\n-mlx5dv_dr_action_create_tag in dr_action.c.o\n-mlx5dv_dr_action_create_packet_reformat in dr_action.c.o\n-mlx5dv_dr_action_create_pop_vlan in dr_action.c.o\n-mlx5dv_dr_action_create_push_vlan in dr_action.c.o\n-rdmacore52_0_dr_actions_reformat_get_id in dr_action.c.o\n-mlx5dv_dr_action_create_modify_header in dr_action.c.o\n-mlx5dv_dr_action_modify_flow_meter in dr_action.c.o\n-mlx5dv_dr_action_create_flow_meter in dr_action.c.o\n-mlx5dv_dr_action_create_dest_vport in dr_action.c.o\n-mlx5dv_dr_action_create_dest_ib_port in dr_action.c.o\n-mlx5dv_dr_action_create_dest_array in dr_action.c.o\n-mlx5dv_dr_action_destroy in dr_action.c.o\n-mlx5dv_dr_action_create_flow_sampler in dr_action.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_icm_pool.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_free_chunk in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_create in dr_icm_pool.c.o\n-rdmacore52_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in dr_icm_pool.c.o\n-rdmacore52_0_dr_buddy_init in dr_buddy.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_buddy.c.o\n-rdmacore52_0_dr_buddy_cleanup in dr_buddy.c.o\n-rdmacore52_0_dr_buddy_alloc_mem in dr_buddy.c.o\n-rdmacore52_0_dr_buddy_free_mem in dr_buddy.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_buddy.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in buf.c.o\n-rdmacore52_0_mlx5_free_buf_extern in buf.c.o\n-rdmacore52_0_mlx5_alloc_buf_extern in buf.c.o\n-rdmacore52_0_mlx5_free_actual_buf in buf.c.o\n-rdmacore52_0_mlx5_is_custom_alloc in buf.c.o\n-rdmacore52_0_mlx5_is_extern_alloc in buf.c.o\n-rdmacore52_0_mlx5_get_alloc_type in buf.c.o\n-rdmacore52_0_mlx5_alloc_buf_contig in buf.c.o\n-rdmacore52_0_mlx5_alloc_prefered_buf in buf.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in buf.c.o\n-rdmacore52_0_mlx5_free_buf_contig in buf.c.o\n-rdmacore52_0_mlx5_alloc_buf in buf.c.o\n-rdmacore52_0_mlx5_free_buf in buf.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in dr_arg.c.o\n-rdmacore52_0_dr_arg_get_object_id in dr_arg.c.o\n-rdmacore52_0_dr_arg_get_obj in dr_arg.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_arg.c.o\n-rdmacore52_0_dr_arg_put_obj in dr_arg.c.o\n-rdmacore52_0_dr_arg_mngr_create in dr_arg.c.o\n-rdmacore52_0_dr_arg_mngr_destroy in dr_arg.c.o\n-rdmacore52_0_dr_vports_table_get_vport_cap in dr_vports.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_vports.c.o\n-rdmacore52_0_dr_vports_table_get_ib_port_cap in dr_vports.c.o\n-rdmacore52_0_dr_vports_table_add_wire in dr_vports.c.o\n-rdmacore52_0_dr_vports_table_del_wire in dr_vports.c.o\n-rdmacore52_0_dr_vports_table_create in dr_vports.c.o\n-rdmacore52_0_dr_vports_table_destroy in dr_vports.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_dbg.c.o\n-mlx5dv_dump_dr_domain in dr_dbg.c.o\n-mlx5dv_dump_dr_table in dr_dbg.c.o\n-mlx5dv_dump_dr_matcher in dr_dbg.c.o\n-mlx5dv_dump_dr_rule in dr_dbg.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in dr_ste_v0.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_ste_v0.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_ste_v0.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in dr_ste_v0.c.o\n-rdmacore52_0_dr_ste_get_ctx_v0 in dr_ste_v0.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_ste_v0.c.o\n-rdmacore52_0_dr_ste_calc_hash_index in dr_ste.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_ste.c.o\n-rdmacore52_0_dr_ste_conv_bit_to_byte_mask in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_bit_mask in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_miss_addr in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_hit_addr in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_hit_gvmi in dr_ste.c.o\n-rdmacore52_0_dr_ste_get_icm_addr in dr_ste.c.o\n-rdmacore52_0_dr_ste_get_mr_addr in dr_ste.c.o\n-rdmacore52_0_dr_ste_get_miss_list in dr_ste.c.o\n-rdmacore52_0_dr_ste_get_miss_list_top in dr_ste.c.o\n-rdmacore52_0_dr_ste_is_last_in_rule in dr_ste.c.o\n-rdmacore52_0_dr_ste_equal_tag in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl in dr_ste.c.o\n-rdmacore52_0_dr_ste_prepare_for_postsend in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_formated_ste in dr_ste.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in dr_ste.c.o\n-rdmacore52_0_dr_ste_free in dr_ste.c.o\n-rdmacore52_0_dr_ste_htbl_init_and_postsend in dr_ste.c.o\n-rdmacore52_0_dr_ste_htbl_alloc in dr_ste.c.o\n-rdmacore52_0_dr_ste_create_next_htbl in dr_ste.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in dr_ste.c.o\n-rdmacore52_0_dr_ste_htbl_free in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_actions_tx in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_actions_rx in dr_ste.c.o\n-rdmacore52_0_dr_ste_conv_modify_hdr_sw_field in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_action_set in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_action_add in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_action_copy in dr_ste.c.o\n-rdmacore52_0_dr_ste_set_action_decap_l3_list in dr_ste.c.o\n-rdmacore52_0_dr_ste_alloc_modify_hdr in dr_ste.c.o\n-rdmacore52_0_dr_ste_free_modify_hdr in dr_ste.c.o\n-rdmacore52_0_dr_ste_alloc_encap in dr_ste.c.o\n-rdmacore52_0_dr_ste_free_encap in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_pre_check in dr_ste.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_ste_arr in dr_ste.c.o\n-rdmacore52_0_dr_ste_copy_param in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l2_src_dst in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l3_ipv6_src in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l2_src in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l2_dst in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l2_tnl in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_empty_always_hit in dr_ste.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_mpls in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_gre in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_mpls_over_gre in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_mpls_over_udp in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_icmp in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_general_purpose in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_eth_l4_misc in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_vxlan_gpe in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_geneve in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_gtpu in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_register_0 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_register_1 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_src_gvmi_qpn in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_flex_parser_0 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_flex_parser_1 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_tunnel_header in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_ib_l4 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def0 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def2 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def6 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def16 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def22 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def24 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def25 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def26 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def28 in dr_ste.c.o\n-rdmacore52_0_dr_ste_build_def33 in dr_ste.c.o\n-rdmacore52_0_dr_ste_get_ctx in dr_ste.c.o\n-mlx5dv_dr_aso_other_domain_link in dr_ste.c.o\n-mlx5dv_dr_aso_other_domain_unlink in dr_ste.c.o\n-rdmacore52_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n-rdmacore52_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n-rdmacore52_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n-rdmacore52_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in dr_domain.c.o\n-mlx5dv_dr_domain_create in dr_domain.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in dr_domain.c.o\n-mlx5dv_dr_domain_sync in dr_domain.c.o\n-mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n-mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n-mlx5dv_dr_domain_destroy in dr_domain.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.dx in cq.c.o\n-rdmacore52_0_mlx5_stall_cq_dec_step in cq.c.o\n-rdmacore52_0_mlx5_stall_cq_poll_min in cq.c.o\n-rdmacore52_0_mlx5_stall_cq_inc_step in cq.c.o\n-rdmacore52_0_mlx5_stall_cq_poll_max in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n-rdmacore52_0_mlx5_stall_num_loop in cq.c.o\n-rdmacore52_0_mlx5_poll_cq in cq.c.o\n-rdmacore52_0_mlx5_poll_cq_v1 in cq.c.o\n-rdmacore52_0_mlx5_cq_fill_pfns in cq.c.o\n-rdmacore52_0_mlx5_arm_cq in cq.c.o\n-rdmacore52_0_mlx5_cq_event in cq.c.o\n-rdmacore52_0___mlx5_cq_clean in cq.c.o\n-rdmacore52_0_mlx5_cq_clean in cq.c.o\n-rdmacore52_0_mlx5_cq_resize_copy_cqes in cq.c.o\n-rdmacore52_0_mlx5_alloc_cq_buf in cq.c.o\n-rdmacore52_0_mlx5_free_cq_buf in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in mlx5_vfio.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in mlx5_vfio.c.o\n-rdmacore52_0___x86.get_pc_thunk.ax in mlx5_vfio.c.o\n-mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n-mlx5dv_vfio_process_events in mlx5_vfio.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in mlx5_vfio.c.o\n-mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n-rdmacore52_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n-rdmacore52_0_strcount in str.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n rdmacore52_0_ilog32 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.cx in ilog.c.o\n rdmacore52_0_ilog32_nz in ilog.c.o\n rdmacore52_0_ilog64 in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.dx in ilog.c.o\n rdmacore52_0_ilog64_nz in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ilog.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in list.c.o\n rdmacore52_0_list_check_node in list.c.o\n rdmacore52_0___x86.get_pc_thunk.di in list.c.o\n rdmacore52_0_list_check in list.c.o\n-\n-mlx5.c.o:\n-00000000 r .LC0\n-00000000 r .LC1\n-0000006d r .LC10\n-00000082 r .LC11\n-00000093 r .LC12\n-000000aa r .LC13\n-000000c3 r .LC14\n-000000b0 r .LC15\n-000000d3 r .LC16\n-000000e6 r .LC17\n-00000010 r .LC2\n-00000100 r .LC21\n-00000128 r .LC22\n-0000010f r .LC23\n-00000123 r .LC24\n-0000013a r .LC25\n-00000151 r .LC26\n-00000168 r .LC27\n-0000002c r .LC3\n-0000006c r .LC4\n-00000012 r .LC5\n-00000022 r .LC6\n-00000026 r .LC7\n-00000044 r .LC8\n-00000054 r .LC9\n-00000000 r CSWTCH.158\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __isoc23_strtol\n-         U __isoc23_strtoul\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U __vfprintf_chk\n-00000780 t _mlx5dv_get_clock_info\n-00000cb0 t _mlx5dv_init_obj\n-00001b30 t _mlx5dv_modify_qp_lag_port\n-00001850 t _mlx5dv_modify_qp_sched_elem\n-00001a00 t _mlx5dv_modify_qp_udp_sport\n-00000380 t _mlx5dv_query_device\n-00002210 t _mlx5dv_query_qp_lag_port\n-00000a60 t _mlx5dv_reserved_qpn_alloc\n-00000020 t _mlx5dv_reserved_qpn_dealloc\n-00002130 t _mlx5dv_sched_leaf_create\n-00000190 t _mlx5dv_sched_leaf_destroy\n-00001d90 t _mlx5dv_sched_leaf_modify\n-00001620 t _mlx5dv_sched_node_create\n-000001d0 t _mlx5dv_sched_node_destroy\n-00001ce0 t _mlx5dv_sched_node_modify\n-00000740 t _mlx5dv_set_context_attr\n-         U calloc\n-00000000 t drv__register_driver\n-         U fclose\n-         U fgets\n-         U fopen64\n-         U free\n-000002a0 t get_dc_odp_caps\n-         U getenv\n-         U gethostname\n-         U ibv_get_device_name\n-         U memcmp\n-000045f0 t mlx5_alloc_context\n-00000140 d mlx5_ctx_common_ops\n-00000000 d mlx5_ctx_cqev1_ops\n-00000000 d mlx5_dev_ops\n-00000240 t mlx5_device_alloc\n-00000000 d mlx5_dv_ctx_ops\n-00000210 t mlx5_err\n-00001050 t mlx5_free_context\n-000044c0 t mlx5_import_context\n-00001e40 t mlx5_init_context\n-00000830 t mlx5_local_cpu_set\n-00003690 t mlx5_set_context\n-00000000 t mlx5_uninit_device\n-00002d70 T mlx5dv_dci_stream_id_reset\n-         U mlx5dv_devx_general_cmd\n-         U mlx5dv_devx_obj_create\n-         U mlx5dv_devx_obj_destroy\n-         U mlx5dv_devx_obj_modify\n-         U mlx5dv_devx_qp_modify\n-         U mlx5dv_devx_qp_query\n-00004870 T mlx5dv_get_clock_info\n-00003420 T mlx5dv_init_obj\n-000048f0 T mlx5dv_is_supported\n-00002c60 T mlx5dv_modify_qp_lag_port\n-000031b0 T mlx5dv_modify_qp_sched_elem\n-00002cf0 T mlx5dv_modify_qp_udp_sport\n-00004910 T mlx5dv_open_device\n-00002b50 T mlx5dv_query_device\n-00002bd0 T mlx5dv_query_qp_lag_port\n-00003320 T mlx5dv_reserved_qpn_alloc\n-000033a0 T mlx5dv_reserved_qpn_dealloc\n-00002f50 T mlx5dv_sched_leaf_create\n-00003140 T mlx5dv_sched_leaf_destroy\n-00003050 T mlx5dv_sched_leaf_modify\n-000014e0 t mlx5dv_sched_nic_create\n-000013d0 t mlx5dv_sched_nic_modify\n-00002ed0 T mlx5dv_sched_node_create\n-000030d0 T mlx5dv_sched_node_destroy\n-00002fd0 T mlx5dv_sched_node_modify\n-000047e0 T mlx5dv_set_context_attr\n-         U mmap64\n-000011d0 t modify_ib_qp_sched_elem_init\n-000012d0 t modify_ib_qp_sched_elem_rts\n-00001900 t modify_qp_lag_port\n-00001720 t modify_raw_qp_sched_elem\n-         U munmap\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U pthread_spin_init\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_cl_qmap_init\n-         U rdmacore52_0_clean_dyn_uars\n-00003590 T rdmacore52_0_get_uar_mmap_offset\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_ibv_cmd_query_context\n-         U rdmacore52_0_is_mlx5_vfio_dev\n-         U rdmacore52_0_mlx5_advise_mr\n-         U rdmacore52_0_mlx5_alloc_dm\n-         U rdmacore52_0_mlx5_alloc_mw\n-         U rdmacore52_0_mlx5_alloc_null_mr\n-         U rdmacore52_0_mlx5_alloc_parent_domain\n-         U rdmacore52_0_mlx5_alloc_pd\n-         U rdmacore52_0_mlx5_alloc_td\n-         U rdmacore52_0_mlx5_arm_cq\n-         U rdmacore52_0_mlx5_async_event\n-         U rdmacore52_0_mlx5_attach_counters_point_flow\n-         U rdmacore52_0_mlx5_attach_mcast\n-         U rdmacore52_0_mlx5_bind_mw\n-00002850 T rdmacore52_0_mlx5_clear_mkey\n-000026e0 T rdmacore52_0_mlx5_clear_uidx\n-00002ad0 T rdmacore52_0_mlx5_close_debug_file\n-         U rdmacore52_0_mlx5_close_xrcd\n-00002540 T rdmacore52_0_mlx5_cmd_status_to_err\n-         U rdmacore52_0_mlx5_cq_event\n-         U rdmacore52_0_mlx5_create_ah\n-         U rdmacore52_0_mlx5_create_counters\n-         U rdmacore52_0_mlx5_create_cq\n-         U rdmacore52_0_mlx5_create_cq_ex\n-         U rdmacore52_0_mlx5_create_flow\n-         U rdmacore52_0_mlx5_create_flow_action_esp\n-000028d0 T rdmacore52_0_mlx5_create_psv\n-         U rdmacore52_0_mlx5_create_qp\n-         U rdmacore52_0_mlx5_create_qp_ex\n-         U rdmacore52_0_mlx5_create_rwq_ind_table\n-         U rdmacore52_0_mlx5_create_srq\n-         U rdmacore52_0_mlx5_create_srq_ex\n-         U rdmacore52_0_mlx5_create_wq\n-         U rdmacore52_0_mlx5_dealloc_mw\n-         U rdmacore52_0_mlx5_dealloc_td\n-00000004 B rdmacore52_0_mlx5_debug_mask\n-         U rdmacore52_0_mlx5_dereg_mr\n-         U rdmacore52_0_mlx5_destroy_ah\n-         U rdmacore52_0_mlx5_destroy_counters\n-         U rdmacore52_0_mlx5_destroy_cq\n-         U rdmacore52_0_mlx5_destroy_flow\n-         U rdmacore52_0_mlx5_destroy_flow_action\n-00002a00 T rdmacore52_0_mlx5_destroy_psv\n-         U rdmacore52_0_mlx5_destroy_qp\n-         U rdmacore52_0_mlx5_destroy_rwq_ind_table\n-         U rdmacore52_0_mlx5_destroy_srq\n-         U rdmacore52_0_mlx5_destroy_wq\n-         U rdmacore52_0_mlx5_detach_mcast\n-00002760 T rdmacore52_0_mlx5_find_mkey\n-         U rdmacore52_0_mlx5_free_dm\n-         U rdmacore52_0_mlx5_free_pd\n-00000000 B rdmacore52_0_mlx5_freeze_on_error_cqe\n-00002570 T rdmacore52_0_mlx5_get_cmd_status_err\n-00004970 T rdmacore52_0_mlx5_get_dv_ops\n-         U rdmacore52_0_mlx5_get_srq_num\n-00000060 R rdmacore52_0_mlx5_hca_table\n-         U rdmacore52_0_mlx5_import_dm\n-         U rdmacore52_0_mlx5_import_mr\n-         U rdmacore52_0_mlx5_import_pd\n-000035d0 T rdmacore52_0_mlx5_mmap\n-         U rdmacore52_0_mlx5_modify_cq\n-         U rdmacore52_0_mlx5_modify_flow_action_esp\n-         U rdmacore52_0_mlx5_modify_qp\n-00003240 T rdmacore52_0_mlx5_modify_qp_drain_sigerr\n-         U rdmacore52_0_mlx5_modify_qp_rate_limit\n-         U rdmacore52_0_mlx5_modify_srq\n-         U rdmacore52_0_mlx5_modify_wq\n-00002a50 T rdmacore52_0_mlx5_open_debug_file\n-         U rdmacore52_0_mlx5_open_qp\n-         U rdmacore52_0_mlx5_open_xrcd\n-         U rdmacore52_0_mlx5_poll_cq\n-         U rdmacore52_0_mlx5_poll_cq_v1\n-         U rdmacore52_0_mlx5_post_recv\n-         U rdmacore52_0_mlx5_post_send\n-         U rdmacore52_0_mlx5_post_srq_ops\n-         U rdmacore52_0_mlx5_post_srq_recv\n-         U rdmacore52_0_mlx5_query_device_ctx\n-         U rdmacore52_0_mlx5_query_device_ex\n-         U rdmacore52_0_mlx5_query_ece\n-         U rdmacore52_0_mlx5_query_port\n-         U rdmacore52_0_mlx5_query_qp\n-         U rdmacore52_0_mlx5_query_qp_data_in_order\n-         U rdmacore52_0_mlx5_query_rt_values\n-         U rdmacore52_0_mlx5_query_srq\n-         U rdmacore52_0_mlx5_read_counters\n-         U rdmacore52_0_mlx5_reg_dm_mr\n-         U rdmacore52_0_mlx5_reg_dmabuf_mr\n-         U rdmacore52_0_mlx5_reg_mr\n-         U rdmacore52_0_mlx5_rereg_mr\n-         U rdmacore52_0_mlx5_resize_cq\n-00002b10 T rdmacore52_0_mlx5_set_debug_mask\n-         U rdmacore52_0_mlx5_set_dv_ctx_ops\n-         U rdmacore52_0_mlx5_set_ece\n-         U rdmacore52_0_mlx5_set_singleton_nc_uar\n-         U rdmacore52_0_mlx5_single_threaded\n-         U rdmacore52_0_mlx5_stall_cq_dec_step\n-         U rdmacore52_0_mlx5_stall_cq_inc_step\n-         U rdmacore52_0_mlx5_stall_cq_poll_max\n-         U rdmacore52_0_mlx5_stall_cq_poll_min\n-         U rdmacore52_0_mlx5_stall_num_loop\n-000027a0 T rdmacore52_0_mlx5_store_mkey\n-000025b0 T rdmacore52_0_mlx5_store_uidx\n-         U rdmacore52_0_mlx5_unimport_dm\n-         U rdmacore52_0_mlx5_unimport_mr\n-         U rdmacore52_0_mlx5_unimport_pd\n-         U rdmacore52_0_verbs_open_device\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-         U sched_getaffinity\n-         U stderr\n-         U strchr\n-         U strncpy\n-         U strrchr\n-         U sysconf\n-00000000 D verbs_provider_mlx5\n+rdmacore52_0_strcount in str.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in str.c.o\n \n dr_rule.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __memcpy_chk\n          U __stack_chk_fail_local\n          U calloc\n@@ -800,945 +561,209 @@\n          U rdmacore52_0_dr_ste_set_bit_mask\n          U rdmacore52_0_dr_ste_set_formated_ste\n          U rdmacore52_0_dr_ste_set_hit_addr\n          U rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl\n          U rdmacore52_0_dr_ste_set_hit_gvmi\n          U rdmacore52_0_dr_ste_set_miss_addr\n \n-dr_ste_v1.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U calloc\n-00000060 r dr_ste_v1_action_modify_field_arr\n-00000000 r dr_ste_v1_action_modify_flex_field_arr\n-00004de0 t dr_ste_v1_alloc_modify_hdr_ptrn_arg\n-00005830 t dr_ste_v1_aso_other_domain_link\n-00004ea0 t dr_ste_v1_aso_other_domain_unlink\n-00004d90 t dr_ste_v1_build_def0_init\n-00001d70 t dr_ste_v1_build_def0_tag\n-00006810 t dr_ste_v1_build_def16_init\n-00003be0 t dr_ste_v1_build_def16_tag\n-00007c60 t dr_ste_v1_build_def22_init\n-000013b0 t dr_ste_v1_build_def22_tag\n-00007fa0 t dr_ste_v1_build_def24_init\n-000010b0 t dr_ste_v1_build_def24_tag\n-000082f0 t dr_ste_v1_build_def25_init\n-00000d90 t dr_ste_v1_build_def25_tag\n-00004d30 t dr_ste_v1_build_def26_init\n-000009c0 t dr_ste_v1_build_def26_tag\n-00004cd0 t dr_ste_v1_build_def28_init\n-000005f0 t dr_ste_v1_build_def28_tag\n-00001d20 t dr_ste_v1_build_def2_init\n-000018f0 t dr_ste_v1_build_def2_tag\n-00004c80 t dr_ste_v1_build_def33_init\n-000001f0 t dr_ste_v1_build_def33_tag\n-00006d60 t dr_ste_v1_build_def6_init\n-00001680 t dr_ste_v1_build_def6_tag\n-00004330 t dr_ste_v1_build_eth_ipv6_l3_l4_init\n-00002760 t dr_ste_v1_build_eth_ipv6_l3_l4_tag\n-00004510 t dr_ste_v1_build_eth_l2_dst_init\n-00003950 t dr_ste_v1_build_eth_l2_dst_tag\n-000047f0 t dr_ste_v1_build_eth_l2_src_dst_init\n-00003a10 t dr_ste_v1_build_eth_l2_src_dst_tag\n-00006a80 t dr_ste_v1_build_eth_l2_src_init\n-00003640 t dr_ste_v1_build_eth_l2_src_or_dst_tag\n-000039b0 t dr_ste_v1_build_eth_l2_src_tag\n-00004380 t dr_ste_v1_build_eth_l2_tnl_init\n-00003470 t dr_ste_v1_build_eth_l2_tnl_tag\n-00008f20 t dr_ste_v1_build_eth_l3_ipv4_5_tuple_init\n-00002ac0 t dr_ste_v1_build_eth_l3_ipv4_5_tuple_tag\n-00005610 t dr_ste_v1_build_eth_l3_ipv4_misc_init\n-00002a60 t dr_ste_v1_build_eth_l3_ipv4_misc_tag\n-000056f0 t dr_ste_v1_build_eth_l3_ipv6_dst_init\n-00002d20 t dr_ste_v1_build_eth_l3_ipv6_dst_tag\n-00005790 t dr_ste_v1_build_eth_l3_ipv6_src_init\n-00002d90 t dr_ste_v1_build_eth_l3_ipv6_src_tag\n-00005060 t dr_ste_v1_build_eth_l4_misc_init\n-00004ad0 t dr_ste_v1_build_eth_l4_misc_tag\n-000061f0 t dr_ste_v1_build_felx_parser_tag\n-000065b0 t dr_ste_v1_build_flex_parser_0_init\n-00006560 t dr_ste_v1_build_flex_parser_1_init\n-00005db0 t dr_ste_v1_build_flex_parser_tnl_geneve_init\n-00002370 t dr_ste_v1_build_flex_parser_tnl_geneve_tag\n-00004090 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init\n-00002330 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_tag\n-00004100 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init\n-00003130 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_tag\n-00005220 t dr_ste_v1_build_flex_parser_tnl_gtpu_init\n-000022c0 t dr_ste_v1_build_flex_parser_tnl_gtpu_tag\n-00005490 t dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init\n-00004a50 t dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_tag\n-00004170 t dr_ste_v1_build_general_purpose_init\n-00002410 t dr_ste_v1_build_general_purpose_tag\n-00005560 t dr_ste_v1_build_ib_l4_init\n-00004950 t dr_ste_v1_build_ib_l4_tag\n-000052e0 t dr_ste_v1_build_icmp_init\n-00002440 t dr_ste_v1_build_icmp_tag\n-00006600 t dr_ste_v1_build_mpls_init\n-000025c0 t dr_ste_v1_build_mpls_tag\n-00003fe0 t dr_ste_v1_build_register_0_init\n-00002250 t dr_ste_v1_build_register_0_tag\n-00003f30 t dr_ste_v1_build_register_1_init\n-000021e0 t dr_ste_v1_build_register_1_tag\n-00003ea0 t dr_ste_v1_build_src_gvmi_qpn_init\n-00003df0 t dr_ste_v1_build_src_gvmi_qpn_tag\n-000060d0 t dr_ste_v1_build_tnl_gre_init\n-000024e0 t dr_ste_v1_build_tnl_gre_tag\n-00005e80 t dr_ste_v1_build_tnl_gtpu_flex_parser_0_init\n-00003050 t dr_ste_v1_build_tnl_gtpu_flex_parser_0_tag\n-00005fb0 t dr_ste_v1_build_tnl_gtpu_flex_parser_1_init\n-00002f70 t dr_ste_v1_build_tnl_gtpu_flex_parser_1_tag\n-00004280 t dr_ste_v1_build_tnl_mpls_over_gre_init\n-000031d0 t dr_ste_v1_build_tnl_mpls_over_gre_tag\n-000041d0 t dr_ste_v1_build_tnl_mpls_over_udp_init\n-00003170 t dr_ste_v1_build_tnl_mpls_over_udp_tag\n-00005120 t dr_ste_v1_build_tunnel_header_init\n-000049d0 t dr_ste_v1_build_tunnel_header_tag\n-00003300 t dr_ste_v1_dealloc_modify_hdr_ptrn_arg\n-00004bf0 t dr_ste_v1_get_action_hw_field\n-00002f40 t dr_ste_v1_get_byte_mask\n-00002f50 t dr_ste_v1_get_miss_addr\n-00000000 t dr_ste_v1_get_next_lu_type\n-00002eb0 t dr_ste_v1_init\n-00003280 t dr_ste_v1_prepare_for_postsend\n-00000090 t dr_ste_v1_set_action_add\n-00000020 t dr_ste_v1_set_action_copy\n-00003340 t dr_ste_v1_set_action_decap_l3_list\n-000000e0 t dr_ste_v1_set_action_set\n-00006ff0 t dr_ste_v1_set_actions_rx\n-000087c0 t dr_ste_v1_set_actions_tx\n-00003230 t dr_ste_v1_set_aso_ct_cross_dmn\n-00004e80 t dr_ste_v1_set_byte_mask\n-000053c0 t dr_ste_v1_set_ctrl_always_hit_htbl\n-00002e40 t dr_ste_v1_set_ctrl_always_miss\n-00000150 t dr_ste_v1_set_hit_addr\n-00000130 t dr_ste_v1_set_hit_gvmi\n-000001b0 t dr_ste_v1_set_miss_addr\n-00002e00 t dr_ste_v1_set_next_lu_type\n-00004b60 t dr_ste_v1_set_rewrite_actions\n-         U free\n-         U malloc\n-         U memcpy\n-         U mlx5dv_dr_domain_sync\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0_dr_arg_get_obj\n-         U rdmacore52_0_dr_arg_put_obj\n-         U rdmacore52_0_dr_ptrn_cache_get_pattern\n-         U rdmacore52_0_dr_ptrn_cache_put_pattern\n-         U rdmacore52_0_dr_rule_send_update_list\n-         U rdmacore52_0_dr_send_fill_and_append_ste_send_info\n-         U rdmacore52_0_dr_ste_conv_bit_to_byte_mask\n-00009230 T rdmacore52_0_dr_ste_get_ctx_v1\n-         U rdmacore52_0_dr_ste_get_miss_list\n-         U rdmacore52_0_dr_ste_htbl_alloc\n-         U rdmacore52_0_dr_ste_htbl_free\n-         U rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl\n-000091e0 T rdmacore52_0_dr_ste_v1_set_aso_ct\n-         U rdmacore52_0_dr_vports_table_get_vport_cap\n-00000000 d ste_ctx_v1\n-\n-dbrec.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U free\n-         U malloc\n-         U memset\n-00000000 t mlx5_alloc_dbrec.cold\n-00000007 t mlx5_free_db.cold\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_cl_qmap_get\n-         U rdmacore52_0_cl_qmap_insert\n-         U rdmacore52_0_cl_qmap_remove_item\n-         U rdmacore52_0_mlx5_alloc_buf\n-         U rdmacore52_0_mlx5_alloc_buf_extern\n-00000000 T rdmacore52_0_mlx5_alloc_dbrec\n-         U rdmacore52_0_mlx5_free_buf\n-         U rdmacore52_0_mlx5_free_buf_extern\n-00000240 T rdmacore52_0_mlx5_free_db\n-         U rdmacore52_0_mlx5_is_custom_alloc\n-         U rdmacore52_0_mlx5_is_extern_alloc\n-\n-qp.c.o:\n-000088f8 t .L1580\n-00008948 t .L1582\n-00008b60 t .L1583\n-00008cc0 t .L1584\n-00008d28 t .L1585\n-00009126 t .L1588\n-00009219 t .L1589\n-0000913e t .L1591\n-00008ec6 t .L1592\n-00008e88 t .L1593\n-00008750 t .L1628\n-0000af25 t .L2111\n-0000af50 t .L2115\n-0000b040 t .L2117\n-0000b0b8 t .L2118\n-0000b148 t .L2119\n-0000b200 t .L2120\n-0000ce56 t .L2415\n-0000ce90 t .L2416\n-0000cf48 t .L2418\n-0000cf0a t .L2419\n-0000cf29 t .L2420\n-0000ce4c t .L2421\n-0000cecc t .L2422\n-0000ceeb t .L2423\n+dr_dbg.c.o:\n+00000b20 t .L62\n+00000690 t .L64\n+00000758 t .L65\n+00000780 t .L66\n+000007a8 t .L67\n+000007d0 t .L68\n+00000800 t .L69\n+00000850 t .L70\n+000008a8 t .L71\n+000008c8 t .L72\n+00000908 t .L73\n+00000930 t .L74\n+000009b0 t .L75\n+000009d0 t .L76\n+00000a00 t .L77\n+00000a30 t .L78\n+00000a60 t .L79\n+00000a80 t .L80\n+00000ab0 t .L81\n+00000ad0 t .L82\n+00000b00 t .L83\n 00000000 r .LC0\n-0000008c r .LC3\n-00000000 r .LC4\n-00000148 r CSWTCH.207\n-00000134 r CSWTCH.216\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U __vfprintf_chk\n-00008520 t _mlx5_post_send\n-         U abort\n-00000154 r bs_selector.0\n-         U calloc\n-         U free\n-         U fwrite\n-         U getenv\n-         U ibv_qp_to_qp_ex\n-         U memcpy\n-         U memset\n-00000000 t mlx5_err\n-00000160 r mlx5_ib_opcode\n-00000100 t mlx5_qp_query_sqd\n-000000a0 t mlx5_send_wr_abort\n-00004c40 t mlx5_send_wr_atomic_cmp_swp\n-00004200 t mlx5_send_wr_atomic_fetch_add\n-00005320 t mlx5_send_wr_bind_mw\n-000009c0 t mlx5_send_wr_complete\n-00000030 t mlx5_send_wr_complete_error\n-00005e20 t mlx5_send_wr_local_inv\n-00007ee0 t mlx5_send_wr_mkey_configure\n-00009ed0 t mlx5_send_wr_mr_interleaved\n-0000a370 t mlx5_send_wr_mr_list\n-00003ce0 t mlx5_send_wr_rdma_read\n-00003a50 t mlx5_send_wr_rdma_write\n-00003f70 t mlx5_send_wr_rdma_write_imm\n-000044e0 t mlx5_send_wr_send_eth\n-00003590 t mlx5_send_wr_send_imm\n-000037f0 t mlx5_send_wr_send_inv\n-00003340 t mlx5_send_wr_send_other\n-00004f40 t mlx5_send_wr_send_tso\n-000023a0 t mlx5_send_wr_set_dc_addr\n-000025a0 t mlx5_send_wr_set_dc_addr_stream\n-00001640 t mlx5_send_wr_set_inline_data_eth\n-00002c40 t mlx5_send_wr_set_inline_data_list_eth\n-00001070 t mlx5_send_wr_set_inline_data_list_rc_uc\n-00003070 t mlx5_send_wr_set_inline_data_list_ud_xrc_dc\n-00000e30 t mlx5_send_wr_set_inline_data_rc_uc\n-000029e0 t mlx5_send_wr_set_inline_data_ud_xrc_dc\n-00007de0 t mlx5_send_wr_set_mkey_access_flags\n-00007750 t mlx5_send_wr_set_mkey_crypto\n-00007a20 t mlx5_send_wr_set_mkey_layout\n-00007db0 t mlx5_send_wr_set_mkey_layout_interleaved\n-000082e0 t mlx5_send_wr_set_mkey_layout_list\n-00007830 t mlx5_send_wr_set_mkey_sig_block\n-00001310 t mlx5_send_wr_set_sge_eth\n-00001a00 t mlx5_send_wr_set_sge_list_eth\n-00000c30 t mlx5_send_wr_set_sge_list_rc_uc\n-000027b0 t mlx5_send_wr_set_sge_list_ud_xrc_dc\n-00000820 t mlx5_send_wr_set_sge_rc_uc\n-000021e0 t mlx5_send_wr_set_sge_ud_xrc_dc\n-00001ff0 t mlx5_send_wr_set_ud_addr\n-00001e40 t mlx5_send_wr_set_xrc_srqn\n-00000290 t mlx5_send_wr_start\n-00000340 t mlx5_umr_fill_sig_bsf\n-000001f0 t mlx5_validate_sig_block_domain\n-00005940 t mlx5_wr_memcpy\n-000047a0 t mlx5_wr_raw_wqe\n-         U mlx5dv_devx_qp_query\n-0000ccb0 T mlx5dv_qp_cancel_posted_send_wrs\n-         U mmio_write64_be\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-0000b440 T rdmacore52_0_mlx5_bind_mw\n-0000cc50 T rdmacore52_0_mlx5_clear_qp\n-0000a990 T rdmacore52_0_mlx5_copy_to_recv_wqe\n-0000aa80 T rdmacore52_0_mlx5_copy_to_send_wqe\n-0000cb90 T rdmacore52_0_mlx5_find_qp\n-0000ad50 T rdmacore52_0_mlx5_get_atomic_laddr\n-         U rdmacore52_0_mlx5_get_cmd_status_err\n-0000acd0 T rdmacore52_0_mlx5_get_send_wqe\n-0000ad10 T rdmacore52_0_mlx5_init_qp_indices\n-0000acf0 T rdmacore52_0_mlx5_init_rwq_indices\n-0000bae0 T rdmacore52_0_mlx5_post_recv\n-0000ad80 T rdmacore52_0_mlx5_post_send\n-0000c0a0 T rdmacore52_0_mlx5_post_srq_ops\n-0000b580 T rdmacore52_0_mlx5_post_wq_recv\n-0000ada0 T rdmacore52_0_mlx5_qp_fill_wr_complete_error\n-0000add0 T rdmacore52_0_mlx5_qp_fill_wr_complete_real\n-0000ae00 T rdmacore52_0_mlx5_qp_fill_wr_pfns\n-0000cbd0 T rdmacore52_0_mlx5_store_qp\n-0000cb40 T rdmacore52_0_mlx5_use_huge\n-         U stderr\n-000061f0 t umr_finalize_and_set_psvs\n-00006c40 t umr_wqe_finalize\n-\n-verbs.c.o:\n-00005370 t .L788\n-000053d0 t .L802\n-000053e8 t .L804\n-00005400 t .L805\n-00005418 t .L806\n-00005438 t .L807\n-000054a0 t .L809\n-000054ea t .L810\n-000054f3 t .L812\n-000054fc t .L813\n-00005505 t .L814\n-00005496 t .L815\n-000060a0 t .L904\n-00006110 t .L906\n-00006168 t .L907\n-000061d0 t .L908\n-00006220 t .L909\n-00006248 t .L910\n-000062a0 t .L911\n-00005cb0 t .L922\n-00005de0 t .L924\n-00005e80 t .L925\n-00005ee0 t .L926\n-00005f30 t .L927\n-00005f58 t .L928\n-00005fb0 t .L929\n-00006300 t .L957\n-00006008 t .L966\n-00000041 r .LC10\n-0000004e r .LC11\n-00000056 r .LC12\n-0000006a r .LC13\n-0000007c r .LC14\n-00000000 r .LC16\n-00000083 r .LC17\n-0000008c r .LC18\n-0000008b r .LC19\n-0000009e r .LC20\n-00000000 r .LC3\n-00000013 r .LC4\n-0000001b r .LC5\n-00000029 r .LC7\n-00000031 r .LC8\n-00000039 r .LC9\n-00000120 r CSWTCH.373\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-00000154 r __func__.0\n-00000168 r __func__.2\n-         U __memcpy_chk\n-00001de0 t __mlx5dv_query_port\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U __vfprintf_chk\n-00001360 t _mlx5dv_alloc_dm\n-000006e0 t _mlx5dv_alloc_var\n-00007220 t _mlx5dv_create_cq\n-00000f30 t _mlx5dv_create_flow_action_esp\n-00004890 t _mlx5dv_create_flow_action_modify_header\n-00002ce0 t _mlx5dv_create_flow_action_packet_reformat\n-000025e0 t _mlx5dv_create_flow_matcher\n-00007280 t _mlx5dv_create_mkey\n-00009330 t _mlx5dv_create_qp\n-00001900 t _mlx5dv_create_steering_anchor\n-00006ba0 t _mlx5dv_create_wq\n-00003320 t _mlx5dv_crypto_login\n-00003290 t _mlx5dv_crypto_login_create\n-00002920 t _mlx5dv_crypto_login_destroy\n-00001ce0 t _mlx5dv_crypto_login_query\n-00001c40 t _mlx5dv_crypto_login_query_state\n-00002980 t _mlx5dv_crypto_logout\n-00004c70 t _mlx5dv_dek_create\n-000028c0 t _mlx5dv_dek_destroy\n-00002020 t _mlx5dv_dek_query\n-00000320 t _mlx5dv_destroy_flow_matcher\n-00003400 t _mlx5dv_destroy_mkey\n-00000270 t _mlx5dv_destroy_steering_anchor\n-00001650 t _mlx5dv_devx_alloc_uar\n-00004210 t _mlx5dv_devx_cq_modify\n-000043b0 t _mlx5dv_devx_cq_query\n-00000530 t _mlx5dv_devx_create_cmd_comp\n-00001ee0 t _mlx5dv_devx_create_event_channel\n-000018d0 t _mlx5dv_devx_destroy_cmd_comp\n-00001090 t _mlx5dv_devx_destroy_event_channel\n-00001ad0 t _mlx5dv_devx_free_uar\n-00002140 t _mlx5dv_devx_general_cmd\n-000011d0 t _mlx5dv_devx_get_async_cmd_comp\n-000010c0 t _mlx5dv_devx_get_event\n-00003510 t _mlx5dv_devx_ind_tbl_modify\n-000036b0 t _mlx5dv_devx_ind_tbl_query\n-00005160 t _mlx5dv_devx_obj_create\n-00000630 t _mlx5dv_devx_obj_destroy\n-00004550 t _mlx5dv_devx_obj_modify\n-000046f0 t _mlx5dv_devx_obj_query\n-00004a70 t _mlx5dv_devx_obj_query_async\n-00003ed0 t _mlx5dv_devx_qp_modify\n-00004070 t _mlx5dv_devx_qp_query\n-00001d10 t _mlx5dv_devx_query_eqn\n-00003b90 t _mlx5dv_devx_srq_modify\n-00003d30 t _mlx5dv_devx_srq_query\n-00002420 t _mlx5dv_devx_subscribe_devx_event\n-000022c0 t _mlx5dv_devx_subscribe_devx_event_fd\n-00001110 t _mlx5dv_devx_umem_dereg\n-000063b0 t _mlx5dv_devx_umem_reg\n-00002a10 t _mlx5dv_devx_umem_reg_ex\n-00003850 t _mlx5dv_devx_wq_modify\n-000039f0 t _mlx5dv_devx_wq_query\n-00002f40 t _mlx5dv_dm_map_op_addr\n-00000490 t _mlx5dv_free_var\n-000058f0 t _mlx5dv_map_ah_to_qp\n-0000f3a0 T _mlx5dv_mkey_check\n-00004ef0 t _mlx5dv_pp_alloc\n-000003f0 t _mlx5dv_pp_free\n-0000e0d0 T _mlx5dv_query_port\n-         U abort\n-         U calloc\n-         U close\n-00006bc0 t create_cq\n-00007830 t create_qp\n-00000000 t create_qp.cold\n-000065d0 t create_wq\n-000030e0 t crypto_login_create\n-00001b40 t crypto_login_query\n-         U free\n-         U fwrite\n-00005530 t get_hca_general_caps\n-         U getenv\n-00000178 r ib_to_mlx5_rate_table\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U ibv_query_port\n-         U ibv_resolve_eth_l2_from_gid\n-         U malloc\n-         U memcpy\n-         U memset\n-000009a0 t mlx5_alloc_dyn_uar\n-00000f00 t mlx5_err\n-000008a0 t mlx5_free_uar\n-00000c90 t mlx5_insert_dyn_uuars\n-00001220 t mlx5_memcpy_from_dm\n-000012c0 t mlx5_memcpy_to_dm\n-0000d7b0 T mlx5dv_alloc_dm\n-0000f7d0 T mlx5dv_alloc_var\n-0000a020 T mlx5dv_create_cq\n-0000dc20 T mlx5dv_create_flow\n-0000d2f0 T mlx5dv_create_flow_action_esp\n-0000d3a0 T mlx5dv_create_flow_action_modify_header\n-0000d420 T mlx5dv_create_flow_action_packet_reformat\n-0000db70 T mlx5dv_create_flow_matcher\n-0000f2f0 T mlx5dv_create_mkey\n-0000b9b0 T mlx5dv_create_qp\n-0000dc90 T mlx5dv_create_steering_anchor\n-0000cac0 T mlx5dv_create_wq\n-0000f4e0 T mlx5dv_crypto_login\n-0000f5d0 T mlx5dv_crypto_login_create\n-0000f680 T mlx5dv_crypto_login_destroy\n-0000f630 T mlx5dv_crypto_login_query\n-0000f530 T mlx5dv_crypto_login_query_state\n-0000f580 T mlx5dv_crypto_logout\n-0000f6d0 T mlx5dv_dek_create\n-0000f780 T mlx5dv_dek_destroy\n-0000f730 T mlx5dv_dek_query\n-0000dbd0 T mlx5dv_destroy_flow_matcher\n-0000f350 T mlx5dv_destroy_mkey\n-0000dcf0 T mlx5dv_destroy_steering_anchor\n-0000f950 T mlx5dv_devx_alloc_msi_vector\n-0000e260 T mlx5dv_devx_alloc_uar\n-0000e3e0 T mlx5dv_devx_cq_modify\n-0000e360 T mlx5dv_devx_cq_query\n-0000ef90 T mlx5dv_devx_create_cmd_comp\n-0000fa00 T mlx5dv_devx_create_eq\n-0000f010 T mlx5dv_devx_create_event_channel\n-0000efe0 T mlx5dv_devx_destroy_cmd_comp\n-0000fa90 T mlx5dv_devx_destroy_eq\n-0000f070 T mlx5dv_devx_destroy_event_channel\n-0000f9b0 T mlx5dv_devx_free_msi_vector\n-0000e2c0 T mlx5dv_devx_free_uar\n-0000e050 T mlx5dv_devx_general_cmd\n-0000f250 T mlx5dv_devx_get_async_cmd_comp\n-0000f2a0 T mlx5dv_devx_get_event\n-0000ef10 T mlx5dv_devx_ind_tbl_modify\n-0000ee90 T mlx5dv_devx_ind_tbl_query\n-0000de70 T mlx5dv_devx_obj_create\n-0000e000 T mlx5dv_devx_obj_destroy\n-0000df80 T mlx5dv_devx_obj_modify\n-0000df00 T mlx5dv_devx_obj_query\n-0000f1b0 T mlx5dv_devx_obj_query_async\n-0000e4e0 T mlx5dv_devx_qp_modify\n-0000e460 T mlx5dv_devx_qp_query\n-0000e300 T mlx5dv_devx_query_eqn\n-0000ed10 T mlx5dv_devx_srq_modify\n-0000ec90 T mlx5dv_devx_srq_query\n-0000f0b0 T mlx5dv_devx_subscribe_devx_event\n-0000f140 T mlx5dv_devx_subscribe_devx_event_fd\n-0000de20 T mlx5dv_devx_umem_dereg\n-0000dda0 T mlx5dv_devx_umem_reg\n-0000dd40 T mlx5dv_devx_umem_reg_ex\n-0000ee10 T mlx5dv_devx_wq_modify\n-0000ed90 T mlx5dv_devx_wq_query\n-0000d500 T mlx5dv_dm_map_op_addr\n-0000f830 T mlx5dv_free_var\n-0000b8f0 T mlx5dv_map_ah_to_qp\n-0000f880 T mlx5dv_pp_alloc\n-0000f900 T mlx5dv_pp_free\n-0000ba20 T mlx5dv_qp_ex_from_ibv_qp_ex\n-         U mmap64\n-         U munmap\n-         U posix_memalign\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U pthread_spin_destroy\n-         U pthread_spin_init\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-         U rdmacore52_0___mlx5_cq_clean\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-00005ad0 T rdmacore52_0__mlx5dv_create_flow\n-0000e140 T rdmacore52_0_clean_dyn_uars\n-         U rdmacore52_0_execute_ioctl\n-         U rdmacore52_0_get_random\n-         U rdmacore52_0_get_uar_mmap_offset\n-         U rdmacore52_0_ibv_cmd_advise_mr\n-         U rdmacore52_0_ibv_cmd_alloc_dm\n-         U rdmacore52_0_ibv_cmd_alloc_mw\n-         U rdmacore52_0_ibv_cmd_alloc_pd\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_close_xrcd\n-         U rdmacore52_0_ibv_cmd_create_ah\n-         U rdmacore52_0_ibv_cmd_create_counters\n-         U rdmacore52_0_ibv_cmd_create_cq_ex\n-         U rdmacore52_0_ibv_cmd_create_flow\n-         U rdmacore52_0_ibv_cmd_create_flow_action_esp\n-         U rdmacore52_0_ibv_cmd_create_qp_ex\n-         U rdmacore52_0_ibv_cmd_create_qp_ex2\n-         U rdmacore52_0_ibv_cmd_create_rwq_ind_table\n-         U rdmacore52_0_ibv_cmd_create_srq\n-         U rdmacore52_0_ibv_cmd_create_srq_ex\n-         U rdmacore52_0_ibv_cmd_create_wq\n-         U rdmacore52_0_ibv_cmd_dealloc_mw\n-         U rdmacore52_0_ibv_cmd_dealloc_pd\n-         U rdmacore52_0_ibv_cmd_dereg_mr\n-         U rdmacore52_0_ibv_cmd_destroy_ah\n-         U rdmacore52_0_ibv_cmd_destroy_counters\n-         U rdmacore52_0_ibv_cmd_destroy_cq\n-         U rdmacore52_0_ibv_cmd_destroy_flow\n-         U rdmacore52_0_ibv_cmd_destroy_flow_action\n-         U rdmacore52_0_ibv_cmd_destroy_qp\n-         U rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n-         U rdmacore52_0_ibv_cmd_destroy_srq\n-         U rdmacore52_0_ibv_cmd_destroy_wq\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_free_dm\n-         U rdmacore52_0_ibv_cmd_modify_cq\n-         U rdmacore52_0_ibv_cmd_modify_flow_action_esp\n-         U rdmacore52_0_ibv_cmd_modify_qp\n-         U rdmacore52_0_ibv_cmd_modify_qp_ex\n-         U rdmacore52_0_ibv_cmd_modify_srq\n-         U rdmacore52_0_ibv_cmd_modify_wq\n-         U rdmacore52_0_ibv_cmd_open_qp\n-         U rdmacore52_0_ibv_cmd_open_xrcd\n-         U rdmacore52_0_ibv_cmd_query_device_any\n-         U rdmacore52_0_ibv_cmd_query_mr\n-         U rdmacore52_0_ibv_cmd_query_port\n-         U rdmacore52_0_ibv_cmd_query_qp\n-         U rdmacore52_0_ibv_cmd_query_srq\n-         U rdmacore52_0_ibv_cmd_read_counters\n-         U rdmacore52_0_ibv_cmd_reg_dm_mr\n-         U rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n-         U rdmacore52_0_ibv_cmd_reg_mr\n-         U rdmacore52_0_ibv_cmd_rereg_mr\n-         U rdmacore52_0_ibv_cmd_resize_cq\n-         U rdmacore52_0_ibv_query_gid_type\n-         U rdmacore52_0_ilog64\n-00009c20 T rdmacore52_0_mlx5_advise_mr\n-         U rdmacore52_0_mlx5_alloc_cq_buf\n-         U rdmacore52_0_mlx5_alloc_dbrec\n-0000d890 T rdmacore52_0_mlx5_alloc_dm\n-00009e80 T rdmacore52_0_mlx5_alloc_mw\n-00009a20 T rdmacore52_0_mlx5_alloc_null_mr\n-00009710 T rdmacore52_0_mlx5_alloc_parent_domain\n-00009440 T rdmacore52_0_mlx5_alloc_pd\n-         U rdmacore52_0_mlx5_alloc_prefered_buf\n-         U rdmacore52_0_mlx5_alloc_srq_buf\n-000094f0 T rdmacore52_0_mlx5_alloc_td\n-00009420 T rdmacore52_0_mlx5_async_event\n-0000da60 T rdmacore52_0_mlx5_attach_counters_point_flow\n-0000b940 T rdmacore52_0_mlx5_attach_mcast\n-         U rdmacore52_0_mlx5_clear_mkey\n-         U rdmacore52_0_mlx5_clear_qp\n-         U rdmacore52_0_mlx5_clear_srq\n-         U rdmacore52_0_mlx5_clear_uidx\n-0000bba0 T rdmacore52_0_mlx5_close_xrcd\n-         U rdmacore52_0_mlx5_cq_clean\n-         U rdmacore52_0_mlx5_cq_fill_pfns\n-         U rdmacore52_0_mlx5_cq_resize_copy_cqes\n-0000b510 T rdmacore52_0_mlx5_create_ah\n-0000d930 T rdmacore52_0_mlx5_create_counters\n-00009f50 T rdmacore52_0_mlx5_create_cq\n-0000a000 T rdmacore52_0_mlx5_create_cq_ex\n-0000ce00 T rdmacore52_0_mlx5_create_flow\n-0000d260 T rdmacore52_0_mlx5_create_flow_action_esp\n-         U rdmacore52_0_mlx5_create_psv\n-0000a9b0 T rdmacore52_0_mlx5_create_qp\n-0000b9a0 T rdmacore52_0_mlx5_create_qp_ex\n-0000d100 T rdmacore52_0_mlx5_create_rwq_ind_table\n-0000a470 T rdmacore52_0_mlx5_create_srq\n-0000bbf0 T rdmacore52_0_mlx5_create_srq_ex\n-0000cab0 T rdmacore52_0_mlx5_create_wq\n-00009f10 T rdmacore52_0_mlx5_dealloc_mw\n-00009630 T rdmacore52_0_mlx5_dealloc_td\n-00009be0 T rdmacore52_0_mlx5_dereg_mr\n-0000b880 T rdmacore52_0_mlx5_destroy_ah\n-0000d9e0 T rdmacore52_0_mlx5_destroy_counters\n-0000a3d0 T rdmacore52_0_mlx5_destroy_cq\n-0000d0a0 T rdmacore52_0_mlx5_destroy_flow\n-0000d4b0 T rdmacore52_0_mlx5_destroy_flow_action\n-         U rdmacore52_0_mlx5_destroy_psv\n-0000aab0 T rdmacore52_0_mlx5_destroy_qp\n-0000d1c0 T rdmacore52_0_mlx5_destroy_rwq_ind_table\n-0000b0a0 T rdmacore52_0_mlx5_destroy_srq\n-0000ccb0 T rdmacore52_0_mlx5_destroy_wq\n-0000b970 T rdmacore52_0_mlx5_detach_mcast\n-         U rdmacore52_0_mlx5_free_actual_buf\n-         U rdmacore52_0_mlx5_free_cq_buf\n-         U rdmacore52_0_mlx5_free_db\n-0000d820 T rdmacore52_0_mlx5_free_dm\n-000097c0 T rdmacore52_0_mlx5_free_pd\n-         U rdmacore52_0_mlx5_get_alloc_type\n-         U rdmacore52_0_mlx5_get_cmd_status_err\n-         U rdmacore52_0_mlx5_get_dv_ops\n-0000ba30 T rdmacore52_0_mlx5_get_srq_num\n-0000d5a0 T rdmacore52_0_mlx5_import_dm\n-00009e00 T rdmacore52_0_mlx5_import_mr\n-00009c50 T rdmacore52_0_mlx5_import_pd\n-         U rdmacore52_0_mlx5_init_qp_indices\n-         U rdmacore52_0_mlx5_init_rwq_indices\n-0000d200 T rdmacore52_0_mlx5_modify_cq\n-0000d360 T rdmacore52_0_mlx5_modify_flow_action_esp\n-0000e5e0 T rdmacore52_0_mlx5_modify_qp\n-         U rdmacore52_0_mlx5_modify_qp_drain_sigerr\n-0000b400 T rdmacore52_0_mlx5_modify_qp_rate_limit\n-0000a860 T rdmacore52_0_mlx5_modify_srq\n-0000cb30 T rdmacore52_0_mlx5_modify_wq\n-0000ba50 T rdmacore52_0_mlx5_open_qp\n-0000baf0 T rdmacore52_0_mlx5_open_xrcd\n-         U rdmacore52_0_mlx5_post_wq_recv\n-         U rdmacore52_0_mlx5_qp_fill_wr_complete_error\n-         U rdmacore52_0_mlx5_qp_fill_wr_complete_real\n-         U rdmacore52_0_mlx5_qp_fill_wr_pfns\n-0000c660 T rdmacore52_0_mlx5_query_device_ctx\n-0000c3e0 T rdmacore52_0_mlx5_query_device_ex\n-0000a980 T rdmacore52_0_mlx5_query_ece\n-000093d0 T rdmacore52_0_mlx5_query_port\n-0000b350 T rdmacore52_0_mlx5_query_qp\n-0000b1c0 T rdmacore52_0_mlx5_query_qp_data_in_order\n-00009350 T rdmacore52_0_mlx5_query_rt_values\n-0000a8b0 T rdmacore52_0_mlx5_query_srq\n-0000db40 T rdmacore52_0_mlx5_read_counters\n-00009ab0 T rdmacore52_0_mlx5_reg_dm_mr\n-00009990 T rdmacore52_0_mlx5_reg_dmabuf_mr\n-000098c0 T rdmacore52_0_mlx5_reg_mr\n-00009b60 T rdmacore52_0_mlx5_rereg_mr\n-0000a090 T rdmacore52_0_mlx5_resize_cq\n-0000fae0 T rdmacore52_0_mlx5_set_dv_ctx_ops\n-0000a900 T rdmacore52_0_mlx5_set_ece\n-000096b0 T rdmacore52_0_mlx5_set_singleton_nc_uar\n-00000000 B rdmacore52_0_mlx5_single_threaded\n-         U rdmacore52_0_mlx5_store_mkey\n-         U rdmacore52_0_mlx5_store_qp\n-         U rdmacore52_0_mlx5_store_srq\n-         U rdmacore52_0_mlx5_store_uidx\n-0000d560 T rdmacore52_0_mlx5_unimport_dm\n-00009e60 T rdmacore52_0_mlx5_unimport_mr\n-00009d80 T rdmacore52_0_mlx5_unimport_pd\n-         U rdmacore52_0_mlx5_use_huge\n-         U rdmacore52_0_verbs_allow_disassociate_destroy\n-         U rdmacore52_0_verbs_init_cq\n-         U read\n-00000000 t sq_overhead\n-         U stderr\n-         U strtol\n-\n-dr_send.c.o:\n+00000000 r .LC1\n+00000054 r .LC10\n+0000007c r .LC11\n+00000070 r .LC12\n+00000089 r .LC13\n+0000009e r .LC14\n+000000a3 r .LC15\n+000000b5 r .LC16\n+000000d3 r .LC17\n+000000ea r .LC18\n+000000a4 r .LC19\n+00000005 r .LC2\n+00000103 r .LC20\n+00000105 r .LC21\n+000000cc r .LC22\n+000000f8 r .LC23\n+0000012c r .LC24\n+00000110 r .LC25\n+00000128 r .LC26\n+00000133 r .LC27\n+00000137 r .LC28\n+00000139 r .LC29\n+0000002c r .LC3\n+0000013d r .LC30\n+00000140 r .LC31\n+00000019 r .LC4\n+00000022 r .LC5\n+00000058 r .LC6\n+00000035 r .LC7\n+0000003e r .LC8\n+00000049 r .LC9\n          U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n+         U __fprintf_chk\n+         U __sprintf_chk\n          U __stack_chk_fail_local\n-         U calloc\n-000002c0 t dr_postsend_icm_data\n-00000000 t dr_rdma_segments\n-         U free\n-         U ibv_create_cq\n-         U ibv_dereg_mr\n-         U ibv_destroy_cq\n-         U ibv_reg_mr\n-         U malloc\n-         U memcpy\n-         U memset\n-         U mlx5dv_devx_obj_destroy\n-         U mlx5dv_devx_umem_dereg\n-         U mlx5dv_devx_umem_reg\n-         U mlx5dv_init_obj\n-         U mmio_write64_be\n-         U posix_memalign\n-         U pthread_spin_init\n+00000000 t dr_dump_domain\n+000011c0 t dr_dump_matcher\n+00000d70 t dr_dump_matcher_mask\n+00000310 t dr_dump_matcher_rx_tx\n+000005d0 t dr_dump_rule\n+00000470 t dr_dump_rule_rx_tx.isra.0\n+00000c50 t dr_dump_table\n+         U fputc\n+         U getpid\n+00001290 T mlx5dv_dump_dr_domain\n+000016d0 T mlx5dv_dump_dr_matcher\n+000018b0 T mlx5dv_dump_dr_rule\n+000014b0 T mlx5dv_dump_dr_table\n          U pthread_spin_lock\n          U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-         U rdmacore52_0_dr_devx_create_qp\n-         U rdmacore52_0_dr_devx_modify_qp_init2rtr\n-         U rdmacore52_0_dr_devx_modify_qp_rst2init\n-         U rdmacore52_0_dr_devx_modify_qp_rtr2rts\n-         U rdmacore52_0_dr_devx_query_gid\n-         U rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n-         U rdmacore52_0_dr_icm_pool_get_chunk_rkey\n-000014a0 T rdmacore52_0_dr_send_allow_fl\n-000006c0 T rdmacore52_0_dr_send_fill_and_append_ste_send_info\n-00001180 T rdmacore52_0_dr_send_postsend_action\n-00001390 T rdmacore52_0_dr_send_postsend_args\n-00000dc0 T rdmacore52_0_dr_send_postsend_formated_htbl\n-00000810 T rdmacore52_0_dr_send_postsend_htbl\n-000012a0 T rdmacore52_0_dr_send_postsend_pattern\n-00000740 T rdmacore52_0_dr_send_postsend_ste\n-000015b0 T rdmacore52_0_dr_send_ring_alloc\n-00001f60 T rdmacore52_0_dr_send_ring_force_drain\n-000014c0 T rdmacore52_0_dr_send_ring_free\n-         U rdmacore52_0_dr_ste_get_mr_addr\n-         U rdmacore52_0_dr_ste_prepare_for_postsend\n-         U sysconf\n+         U rdmacore52_0_dr_actions_reformat_get_id\n+         U rdmacore52_0_dr_arg_get_object_id\n+         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n+         U rdmacore52_0_dr_rule_get_reverse_rule_members\n+         U rdmacore52_0_dr_ste_get_icm_addr\n \n dr_crc32.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 b dr_ste_crc_tab32\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0_dr_crc32_init_table\n 00000130 T rdmacore52_0_dr_crc32_slice8_calc\n \n-dr_ste_v2.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 b ctx_mutex\n-00000000 r dr_ste_v2_action_modify_field_arr\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_dr_ste_get_ctx_v1\n-00000000 T rdmacore52_0_dr_ste_get_ctx_v2\n-00000020 b ste_ctx_v2\n-\n-srq.c.o:\n-00000000 r .LC0\n-00000000 r .LC1\n+dr_ste.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n+         U __memcpy_chk\n          U __stack_chk_fail_local\n-         U abort\n          U calloc\n+00000000 t dr_ste_build_empty_always_hit_tag\n+00000010 t dr_ste_copy_mask_spec\n+00000000 t dr_ste_free.cold\n          U free\n-         U fwrite\n-         U malloc\n+         U memcmp\n          U memcpy\n-         U memset\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n+00003c40 T mlx5dv_dr_aso_other_domain_link\n+00003cc0 T mlx5dv_dr_aso_other_domain_unlink\n 00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ilog64\n-         U rdmacore52_0_mlx5_alloc_prefered_buf\n-00000920 T rdmacore52_0_mlx5_alloc_srq_buf\n-00000dc0 T rdmacore52_0_mlx5_clear_srq\n-00000200 T rdmacore52_0_mlx5_complete_odp_fault\n-00000000 T rdmacore52_0_mlx5_copy_to_recv_srq\n-00000d00 T rdmacore52_0_mlx5_find_srq\n-         U rdmacore52_0_mlx5_free_actual_buf\n-000000b0 T rdmacore52_0_mlx5_free_srq_wqe\n-         U rdmacore52_0_mlx5_get_alloc_type\n-000004b0 T rdmacore52_0_mlx5_post_srq_recv\n-00000d40 T rdmacore52_0_mlx5_store_srq\n-00000180 T rdmacore52_0_srq_cooldown_wqe\n-         U stderr\n-\n-dr_table.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t dr_table_init_nic\n-000000b0 t dr_table_uninit\n-         U free\n-         U mlx5dv_devx_obj_destroy\n-00000120 T mlx5dv_dr_table_create\n-000004d0 T mlx5dv_dr_table_destroy\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_dr_devx_create_flow_table\n-         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-         U rdmacore52_0_dr_send_ring_force_drain\n-         U rdmacore52_0_dr_ste_htbl_alloc\n-         U rdmacore52_0_dr_ste_htbl_free\n-         U rdmacore52_0_dr_ste_htbl_init_and_postsend\n-\n-dr_devx.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-         U memcpy\n-         U mlx5dv_devx_general_cmd\n-         U mlx5dv_devx_obj_create\n-         U mlx5dv_devx_obj_destroy\n-         U mlx5dv_devx_obj_modify\n-         U mlx5dv_devx_obj_query\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-00000de0 T rdmacore52_0_dr_devx_create_always_hit_ft\n-00001570 T rdmacore52_0_dr_devx_create_definer\n-000013a0 T rdmacore52_0_dr_devx_create_flow_sampler\n-00000af0 T rdmacore52_0_dr_devx_create_flow_table\n-000017e0 T rdmacore52_0_dr_devx_create_meter\n-00002160 T rdmacore52_0_dr_devx_create_modify_header_arg\n-00001b60 T rdmacore52_0_dr_devx_create_qp\n-000016a0 T rdmacore52_0_dr_devx_create_reformat_ctx\n-00001360 T rdmacore52_0_dr_devx_destroy_always_hit_ft\n-00001a20 T rdmacore52_0_dr_devx_modify_meter\n-00001e10 T rdmacore52_0_dr_devx_modify_qp_init2rtr\n-00001d20 T rdmacore52_0_dr_devx_modify_qp_rst2init\n-00001f80 T rdmacore52_0_dr_devx_modify_qp_rtr2rts\n-00000310 T rdmacore52_0_dr_devx_query_device\n-000001d0 T rdmacore52_0_dr_devx_query_esw_caps\n-00000000 T rdmacore52_0_dr_devx_query_esw_vport_context\n-000014a0 T rdmacore52_0_dr_devx_query_flow_sampler\n-00000c60 T rdmacore52_0_dr_devx_query_flow_table\n-00002070 T rdmacore52_0_dr_devx_query_gid\n-00000100 T rdmacore52_0_dr_devx_query_gvmi\n-00001930 T rdmacore52_0_dr_devx_query_meter\n-00000a40 T rdmacore52_0_dr_devx_sync_steering\n-         U rdmacore52_0_mlx5_get_cmd_status_err\n-\n-dr_matcher.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __stack_chk_fail_local\n-         U calloc\n-00000680 t dr_matcher_connect\n-00000000 t dr_matcher_copy_mask\n-00002a00 t dr_matcher_init_nic\n-000007f0 t dr_matcher_is_mask_consumed\n-000004d0 t dr_matcher_set_nic_matcher_layout\n-00000a40 t dr_matcher_set_ste_builders\n-00000980 t dr_matcher_uninit_nic\n-         U free\n-         U memcmp\n-         U memcpy\n-         U mlx5dv_create_flow_matcher\n-         U mlx5dv_destroy_flow_matcher\n-         U mlx5dv_devx_obj_destroy\n-00002bc0 T mlx5dv_dr_matcher_create\n-000033a0 T mlx5dv_dr_matcher_destroy\n-00002b00 T mlx5dv_dr_matcher_set_layout\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_dr_devx_create_definer\n-         U rdmacore52_0_dr_domain_is_support_ste_icm_size\n-         U rdmacore52_0_dr_domain_set_max_ste_icm_size\n-         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-         U rdmacore52_0_dr_rule_rehash_matcher_s_anchor\n-         U rdmacore52_0_dr_send_ring_force_drain\n-         U rdmacore52_0_dr_ste_build_def0\n-         U rdmacore52_0_dr_ste_build_def16\n-         U rdmacore52_0_dr_ste_build_def2\n-         U rdmacore52_0_dr_ste_build_def22\n-         U rdmacore52_0_dr_ste_build_def24\n-         U rdmacore52_0_dr_ste_build_def25\n-         U rdmacore52_0_dr_ste_build_def26\n-         U rdmacore52_0_dr_ste_build_def28\n-         U rdmacore52_0_dr_ste_build_def33\n-         U rdmacore52_0_dr_ste_build_def6\n-         U rdmacore52_0_dr_ste_build_empty_always_hit\n-         U rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4\n-         U rdmacore52_0_dr_ste_build_eth_l2_dst\n-         U rdmacore52_0_dr_ste_build_eth_l2_src\n-         U rdmacore52_0_dr_ste_build_eth_l2_src_dst\n-         U rdmacore52_0_dr_ste_build_eth_l2_tnl\n-         U rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple\n-         U rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc\n-         U rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst\n-         U rdmacore52_0_dr_ste_build_eth_l3_ipv6_src\n-         U rdmacore52_0_dr_ste_build_eth_l4_misc\n-         U rdmacore52_0_dr_ste_build_flex_parser_0\n-         U rdmacore52_0_dr_ste_build_flex_parser_1\n-         U rdmacore52_0_dr_ste_build_general_purpose\n-         U rdmacore52_0_dr_ste_build_ib_l4\n-         U rdmacore52_0_dr_ste_build_icmp\n-         U rdmacore52_0_dr_ste_build_mpls\n-         U rdmacore52_0_dr_ste_build_pre_check\n-         U rdmacore52_0_dr_ste_build_register_0\n-         U rdmacore52_0_dr_ste_build_register_1\n-         U rdmacore52_0_dr_ste_build_src_gvmi_qpn\n-         U rdmacore52_0_dr_ste_build_tnl_geneve\n-         U rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt\n-         U rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n-         U rdmacore52_0_dr_ste_build_tnl_gre\n-         U rdmacore52_0_dr_ste_build_tnl_gtpu\n-         U rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0\n-         U rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1\n-         U rdmacore52_0_dr_ste_build_tnl_mpls_over_gre\n-         U rdmacore52_0_dr_ste_build_tnl_mpls_over_udp\n-         U rdmacore52_0_dr_ste_build_tnl_vxlan_gpe\n-         U rdmacore52_0_dr_ste_build_tunnel_header\n-         U rdmacore52_0_dr_ste_copy_param\n-         U rdmacore52_0_dr_ste_htbl_alloc\n-         U rdmacore52_0_dr_ste_htbl_free\n-         U rdmacore52_0_dr_ste_htbl_init_and_postsend\n-\n-dr_ptrn.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U calloc\n-         U free\n-         U ibv_get_device_name\n-         U memcpy\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n+         U rdmacore52_0_dr_crc32_slice8_calc\n          U rdmacore52_0_dr_icm_alloc_chunk\n          U rdmacore52_0_dr_icm_free_chunk\n-         U rdmacore52_0_dr_icm_pool_create\n-         U rdmacore52_0_dr_icm_pool_destroy\n          U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-         U rdmacore52_0_dr_icm_pool_sync_pool\n-00000020 T rdmacore52_0_dr_ptrn_cache_get_pattern\n-000003c0 T rdmacore52_0_dr_ptrn_cache_put_pattern\n-00000430 T rdmacore52_0_dr_ptrn_mngr_create\n-000004d0 T rdmacore52_0_dr_ptrn_mngr_destroy\n-00000000 T rdmacore52_0_dr_ptrn_sync_pool\n-         U rdmacore52_0_dr_send_postsend_pattern\n+         U rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n+         U rdmacore52_0_dr_rule_set_last_member\n+         U rdmacore52_0_dr_send_fill_and_append_ste_send_info\n+         U rdmacore52_0_dr_send_postsend_action\n+         U rdmacore52_0_dr_send_postsend_formated_htbl\n+         U rdmacore52_0_dr_send_postsend_ste\n+00001a10 T rdmacore52_0_dr_ste_alloc_encap\n+00001900 T rdmacore52_0_dr_ste_alloc_modify_hdr\n+00003780 T rdmacore52_0_dr_ste_build_def0\n+000038d0 T rdmacore52_0_dr_ste_build_def16\n+000037f0 T rdmacore52_0_dr_ste_build_def2\n+00003940 T rdmacore52_0_dr_ste_build_def22\n+000039b0 T rdmacore52_0_dr_ste_build_def24\n+00003a20 T rdmacore52_0_dr_ste_build_def25\n+00003a90 T rdmacore52_0_dr_ste_build_def26\n+00003b00 T rdmacore52_0_dr_ste_build_def28\n+00003b70 T rdmacore52_0_dr_ste_build_def33\n+00003860 T rdmacore52_0_dr_ste_build_def6\n+00003330 T rdmacore52_0_dr_ste_build_empty_always_hit\n+00003300 T rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4\n+00003270 T rdmacore52_0_dr_ste_build_eth_l2_dst\n+00003240 T rdmacore52_0_dr_ste_build_eth_l2_src\n+00003180 T rdmacore52_0_dr_ste_build_eth_l2_src_dst\n+000032a0 T rdmacore52_0_dr_ste_build_eth_l2_tnl\n+00003210 T rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple\n+000032d0 T rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc\n+000031b0 T rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst\n+000031e0 T rdmacore52_0_dr_ste_build_eth_l3_ipv6_src\n+000034d0 T rdmacore52_0_dr_ste_build_eth_l4_misc\n+000036b0 T rdmacore52_0_dr_ste_build_flex_parser_0\n+000036e0 T rdmacore52_0_dr_ste_build_flex_parser_1\n+000034a0 T rdmacore52_0_dr_ste_build_general_purpose\n+00003740 T rdmacore52_0_dr_ste_build_ib_l4\n+00003470 T rdmacore52_0_dr_ste_build_icmp\n+00003360 T rdmacore52_0_dr_ste_build_mpls\n+00001af0 T rdmacore52_0_dr_ste_build_pre_check\n+00003620 T rdmacore52_0_dr_ste_build_register_0\n+00003650 T rdmacore52_0_dr_ste_build_register_1\n+00003680 T rdmacore52_0_dr_ste_build_src_gvmi_qpn\n+00001bc0 T rdmacore52_0_dr_ste_build_ste_arr\n+00003530 T rdmacore52_0_dr_ste_build_tnl_geneve\n+00003560 T rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt\n+00003420 T rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n+00003390 T rdmacore52_0_dr_ste_build_tnl_gre\n+00003590 T rdmacore52_0_dr_ste_build_tnl_gtpu\n+000035c0 T rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0\n+000035f0 T rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1\n+000033c0 T rdmacore52_0_dr_ste_build_tnl_mpls_over_gre\n+000033f0 T rdmacore52_0_dr_ste_build_tnl_mpls_over_udp\n+00003500 T rdmacore52_0_dr_ste_build_tnl_vxlan_gpe\n+00003710 T rdmacore52_0_dr_ste_build_tunnel_header\n+00000540 T rdmacore52_0_dr_ste_calc_hash_index\n+000006c0 T rdmacore52_0_dr_ste_conv_bit_to_byte_mask\n+00001750 T rdmacore52_0_dr_ste_conv_modify_hdr_sw_field\n+00001d20 T rdmacore52_0_dr_ste_copy_param\n+000014a0 T rdmacore52_0_dr_ste_create_next_htbl\n+00000940 T rdmacore52_0_dr_ste_equal_tag\n+00000af0 T rdmacore52_0_dr_ste_free\n+00001ad0 T rdmacore52_0_dr_ste_free_encap\n+000019d0 T rdmacore52_0_dr_ste_free_modify_hdr\n+00003be0 T rdmacore52_0_dr_ste_get_ctx\n+         U rdmacore52_0_dr_ste_get_ctx_v0\n+         U rdmacore52_0_dr_ste_get_ctx_v1\n+         U rdmacore52_0_dr_ste_get_ctx_v2\n+00000840 T rdmacore52_0_dr_ste_get_icm_addr\n+000008c0 T rdmacore52_0_dr_ste_get_miss_list\n+000008e0 T rdmacore52_0_dr_ste_get_miss_list_top\n+00000880 T rdmacore52_0_dr_ste_get_mr_addr\n+00001360 T rdmacore52_0_dr_ste_htbl_alloc\n+000016d0 T rdmacore52_0_dr_ste_htbl_free\n+00001150 T rdmacore52_0_dr_ste_htbl_init_and_postsend\n+00000920 T rdmacore52_0_dr_ste_is_last_in_rule\n+000009c0 T rdmacore52_0_dr_ste_prepare_for_postsend\n+000017d0 T rdmacore52_0_dr_ste_set_action_add\n+00001820 T rdmacore52_0_dr_ste_set_action_copy\n+00001880 T rdmacore52_0_dr_ste_set_action_decap_l3_list\n+00001780 T rdmacore52_0_dr_ste_set_action_set\n+00001730 T rdmacore52_0_dr_ste_set_actions_rx\n+00001710 T rdmacore52_0_dr_ste_set_actions_tx\n+00000780 T rdmacore52_0_dr_ste_set_bit_mask\n+000009f0 T rdmacore52_0_dr_ste_set_formated_ste\n+000007f0 T rdmacore52_0_dr_ste_set_hit_addr\n+00000980 T rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl\n+00000820 T rdmacore52_0_dr_ste_set_hit_gvmi\n+000007c0 T rdmacore52_0_dr_ste_set_miss_addr\n \n dr_action.c.o:\n 00000f5f t .L137\n 00001050 t .L139\n 00000dbe t .L140\n 000010d4 t .L141\n 000010c2 t .L142\n@@ -1877,150 +902,267 @@\n          U rdmacore52_0_dr_ste_set_action_set\n          U rdmacore52_0_dr_ste_set_actions_rx\n          U rdmacore52_0_dr_ste_set_actions_tx\n          U rdmacore52_0_dr_vports_table_get_ib_port_cap\n          U rdmacore52_0_dr_vports_table_get_vport_cap\n          U rdmacore52_0_mlx5_destroy_flow_action\n \n-dr_icm_pool.c.o:\n-00000000 r .LC0\n+dr_domain.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n          U calloc\n-00000000 t dr_icm_buddy_destroy\n-00000170 t dr_icm_pool_sync_pool_buddies\n          U free\n-         U ibv_dereg_mr\n-         U malloc\n-         U memset\n-         U mlx5dv_alloc_dm\n+         U ibv_alloc_pd\n+         U ibv_dealloc_pd\n+         U ibv_get_device_name\n+         U ibv_query_device\n+         U ibv_query_port\n+         U mlx5dv_devx_alloc_uar\n+         U mlx5dv_devx_free_uar\n+00000f30 T mlx5dv_dr_domain_allow_duplicate_rules\n+000000b0 T mlx5dv_dr_domain_create\n+00001010 T mlx5dv_dr_domain_destroy\n+00000e50 T mlx5dv_dr_domain_set_reclaim_device_memory\n+00000d40 T mlx5dv_dr_domain_sync\n+         U mlx5dv_init_obj\n          U pthread_spin_destroy\n          U pthread_spin_init\n          U pthread_spin_lock\n          U pthread_spin_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-         U rdmacore52_0_dr_buddy_alloc_mem\n-         U rdmacore52_0_dr_buddy_cleanup\n-         U rdmacore52_0_dr_buddy_free_mem\n-         U rdmacore52_0_dr_buddy_init\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0_dr_arg_mngr_create\n+         U rdmacore52_0_dr_arg_mngr_destroy\n+         U rdmacore52_0_dr_crc32_init_table\n+         U rdmacore52_0_dr_devx_query_device\n+         U rdmacore52_0_dr_devx_query_esw_caps\n+         U rdmacore52_0_dr_devx_query_esw_vport_context\n          U rdmacore52_0_dr_devx_sync_steering\n-00000410 T rdmacore52_0_dr_icm_alloc_chunk\n-00000a90 T rdmacore52_0_dr_icm_free_chunk\n-00000c30 T rdmacore52_0_dr_icm_pool_create\n-00000d40 T rdmacore52_0_dr_icm_pool_destroy\n-00000b80 T rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-00000bd0 T rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n-00000c20 T rdmacore52_0_dr_icm_pool_get_chunk_rkey\n-00000b40 T rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz\n-000003c0 T rdmacore52_0_dr_icm_pool_sync_pool\n+00000010 T rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n+00000030 T rdmacore52_0_dr_domain_is_support_ste_icm_size\n+00000000 T rdmacore52_0_dr_domain_is_support_sw_encap\n+00000050 T rdmacore52_0_dr_domain_set_max_ste_icm_size\n+         U rdmacore52_0_dr_icm_pool_create\n+         U rdmacore52_0_dr_icm_pool_destroy\n+         U rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz\n+         U rdmacore52_0_dr_icm_pool_sync_pool\n+         U rdmacore52_0_dr_ptrn_mngr_create\n+         U rdmacore52_0_dr_ptrn_mngr_destroy\n+         U rdmacore52_0_dr_ptrn_sync_pool\n+         U rdmacore52_0_dr_send_allow_fl\n+         U rdmacore52_0_dr_send_ring_alloc\n          U rdmacore52_0_dr_send_ring_force_drain\n-         U rdmacore52_0_mlx5_free_dm\n+         U rdmacore52_0_dr_send_ring_free\n+         U rdmacore52_0_dr_ste_get_ctx\n+         U rdmacore52_0_dr_vports_table_add_wire\n+         U rdmacore52_0_dr_vports_table_create\n+         U rdmacore52_0_dr_vports_table_del_wire\n+         U rdmacore52_0_dr_vports_table_destroy\n+         U rdmacore52_0_dr_vports_table_get_ib_port_cap\n \n-dr_buddy.c.o:\n+dr_send.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n+         U __stack_chk_fail_local\n          U calloc\n+000002c0 t dr_postsend_icm_data\n+00000000 t dr_rdma_segments\n          U free\n+         U ibv_create_cq\n+         U ibv_dereg_mr\n+         U ibv_destroy_cq\n+         U ibv_reg_mr\n+         U malloc\n+         U memcpy\n+         U memset\n+         U mlx5dv_devx_obj_destroy\n+         U mlx5dv_devx_umem_dereg\n+         U mlx5dv_devx_umem_reg\n+         U mlx5dv_init_obj\n+         U mmio_write64_be\n+         U posix_memalign\n+         U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_bitmap_find_first_bit\n-00000260 T rdmacore52_0_dr_buddy_alloc_mem\n-000001f0 T rdmacore52_0_dr_buddy_cleanup\n-000003f0 T rdmacore52_0_dr_buddy_free_mem\n-00000000 T rdmacore52_0_dr_buddy_init\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+         U rdmacore52_0_dr_devx_create_qp\n+         U rdmacore52_0_dr_devx_modify_qp_init2rtr\n+         U rdmacore52_0_dr_devx_modify_qp_rst2init\n+         U rdmacore52_0_dr_devx_modify_qp_rtr2rts\n+         U rdmacore52_0_dr_devx_query_gid\n+         U rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n+         U rdmacore52_0_dr_icm_pool_get_chunk_rkey\n+000014a0 T rdmacore52_0_dr_send_allow_fl\n+000006c0 T rdmacore52_0_dr_send_fill_and_append_ste_send_info\n+00001180 T rdmacore52_0_dr_send_postsend_action\n+00001390 T rdmacore52_0_dr_send_postsend_args\n+00000dc0 T rdmacore52_0_dr_send_postsend_formated_htbl\n+00000810 T rdmacore52_0_dr_send_postsend_htbl\n+000012a0 T rdmacore52_0_dr_send_postsend_pattern\n+00000740 T rdmacore52_0_dr_send_postsend_ste\n+000015b0 T rdmacore52_0_dr_send_ring_alloc\n+00001f60 T rdmacore52_0_dr_send_ring_force_drain\n+000014c0 T rdmacore52_0_dr_send_ring_free\n+         U rdmacore52_0_dr_ste_get_mr_addr\n+         U rdmacore52_0_dr_ste_prepare_for_postsend\n+         U sysconf\n \n-buf.c.o:\n-00000168 t .L18\n-00000140 t .L19\n-00000290 t .L21\n-00000268 t .L22\n-000001b8 t .L23\n-00000190 t .L24\n+dr_ste_v2.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 b ctx_mutex\n+00000000 r dr_ste_v2_action_modify_field_arr\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_dr_ste_get_ctx_v1\n+00000000 T rdmacore52_0_dr_ste_get_ctx_v2\n+00000020 b ste_ctx_v2\n+\n+qp.c.o:\n+000088f8 t .L1580\n+00008948 t .L1582\n+00008b60 t .L1583\n+00008cc0 t .L1584\n+00008d28 t .L1585\n+00009126 t .L1588\n+00009219 t .L1589\n+0000913e t .L1591\n+00008ec6 t .L1592\n+00008e88 t .L1593\n+00008750 t .L1628\n+0000af25 t .L2111\n+0000af50 t .L2115\n+0000b040 t .L2117\n+0000b0b8 t .L2118\n+0000b148 t .L2119\n+0000b200 t .L2120\n+0000ce56 t .L2415\n+0000ce90 t .L2416\n+0000cf48 t .L2418\n+0000cf0a t .L2419\n+0000cf29 t .L2420\n+0000ce4c t .L2421\n+0000cecc t .L2422\n+0000ceeb t .L2423\n 00000000 r .LC0\n-00000000 r .LC1\n-0000006b r .LC10\n-00000084 r .LC11\n-00000015 r .LC2\n-00000023 r .LC3\n-00000028 r .LC4\n-0000002d r .LC5\n-00000034 r .LC6\n-00000042 r .LC7\n-0000004e r .LC8\n-00000052 r .LC9\n+0000008c r .LC3\n+00000000 r .LC4\n+00000148 r CSWTCH.207\n+00000134 r CSWTCH.216\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n-         U __snprintf_chk\n-         U __sprintf_chk\n          U __stack_chk_fail_local\n          U __vfprintf_chk\n+00008520 t _mlx5_post_send\n          U abort\n+00000154 r bs_selector.0\n          U calloc\n          U free\n          U fwrite\n          U getenv\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U malloc\n+         U ibv_qp_to_qp_ex\n+         U memcpy\n+         U memset\n 00000000 t mlx5_err\n-         U mmap64\n-         U munmap\n-         U posix_memalign\n+00000160 r mlx5_ib_opcode\n+00000100 t mlx5_qp_query_sqd\n+000000a0 t mlx5_send_wr_abort\n+00004c40 t mlx5_send_wr_atomic_cmp_swp\n+00004200 t mlx5_send_wr_atomic_fetch_add\n+00005320 t mlx5_send_wr_bind_mw\n+000009c0 t mlx5_send_wr_complete\n+00000030 t mlx5_send_wr_complete_error\n+00005e20 t mlx5_send_wr_local_inv\n+00007ee0 t mlx5_send_wr_mkey_configure\n+00009ed0 t mlx5_send_wr_mr_interleaved\n+0000a370 t mlx5_send_wr_mr_list\n+00003ce0 t mlx5_send_wr_rdma_read\n+00003a50 t mlx5_send_wr_rdma_write\n+00003f70 t mlx5_send_wr_rdma_write_imm\n+000044e0 t mlx5_send_wr_send_eth\n+00003590 t mlx5_send_wr_send_imm\n+000037f0 t mlx5_send_wr_send_inv\n+00003340 t mlx5_send_wr_send_other\n+00004f40 t mlx5_send_wr_send_tso\n+000023a0 t mlx5_send_wr_set_dc_addr\n+000025a0 t mlx5_send_wr_set_dc_addr_stream\n+00001640 t mlx5_send_wr_set_inline_data_eth\n+00002c40 t mlx5_send_wr_set_inline_data_list_eth\n+00001070 t mlx5_send_wr_set_inline_data_list_rc_uc\n+00003070 t mlx5_send_wr_set_inline_data_list_ud_xrc_dc\n+00000e30 t mlx5_send_wr_set_inline_data_rc_uc\n+000029e0 t mlx5_send_wr_set_inline_data_ud_xrc_dc\n+00007de0 t mlx5_send_wr_set_mkey_access_flags\n+00007750 t mlx5_send_wr_set_mkey_crypto\n+00007a20 t mlx5_send_wr_set_mkey_layout\n+00007db0 t mlx5_send_wr_set_mkey_layout_interleaved\n+000082e0 t mlx5_send_wr_set_mkey_layout_list\n+00007830 t mlx5_send_wr_set_mkey_sig_block\n+00001310 t mlx5_send_wr_set_sge_eth\n+00001a00 t mlx5_send_wr_set_sge_list_eth\n+00000c30 t mlx5_send_wr_set_sge_list_rc_uc\n+000027b0 t mlx5_send_wr_set_sge_list_ud_xrc_dc\n+00000820 t mlx5_send_wr_set_sge_rc_uc\n+000021e0 t mlx5_send_wr_set_sge_ud_xrc_dc\n+00001ff0 t mlx5_send_wr_set_ud_addr\n+00001e40 t mlx5_send_wr_set_xrc_srqn\n+00000290 t mlx5_send_wr_start\n+00000340 t mlx5_umr_fill_sig_bsf\n+000001f0 t mlx5_validate_sig_block_domain\n+00005940 t mlx5_wr_memcpy\n+000047a0 t mlx5_wr_raw_wqe\n+         U mlx5dv_devx_qp_query\n+0000ccb0 T mlx5dv_qp_cancel_posted_send_wrs\n+         U mmio_write64_be\n          U pthread_spin_lock\n          U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_bitmap_fill_region\n-         U rdmacore52_0_bitmap_find_free_region\n-         U rdmacore52_0_bitmap_zero_region\n-00001030 T rdmacore52_0_mlx5_alloc_buf\n-00000600 T rdmacore52_0_mlx5_alloc_buf_contig\n-00000080 T rdmacore52_0_mlx5_alloc_buf_extern\n-00000860 T rdmacore52_0_mlx5_alloc_prefered_buf\n-00000110 T rdmacore52_0_mlx5_free_actual_buf\n-000010c0 T rdmacore52_0_mlx5_free_buf\n-00001000 T rdmacore52_0_mlx5_free_buf_contig\n-00000030 T rdmacore52_0_mlx5_free_buf_extern\n-00000430 T rdmacore52_0_mlx5_get_alloc_type\n-000003e0 T rdmacore52_0_mlx5_is_custom_alloc\n-00000410 T rdmacore52_0_mlx5_is_extern_alloc\n-         U shmat\n-         U shmctl\n-         U shmdt\n-         U shmget\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+0000b440 T rdmacore52_0_mlx5_bind_mw\n+0000cc50 T rdmacore52_0_mlx5_clear_qp\n+0000a990 T rdmacore52_0_mlx5_copy_to_recv_wqe\n+0000aa80 T rdmacore52_0_mlx5_copy_to_send_wqe\n+0000cb90 T rdmacore52_0_mlx5_find_qp\n+0000ad50 T rdmacore52_0_mlx5_get_atomic_laddr\n+         U rdmacore52_0_mlx5_get_cmd_status_err\n+0000acd0 T rdmacore52_0_mlx5_get_send_wqe\n+0000ad10 T rdmacore52_0_mlx5_init_qp_indices\n+0000acf0 T rdmacore52_0_mlx5_init_rwq_indices\n+0000bae0 T rdmacore52_0_mlx5_post_recv\n+0000ad80 T rdmacore52_0_mlx5_post_send\n+0000c0a0 T rdmacore52_0_mlx5_post_srq_ops\n+0000b580 T rdmacore52_0_mlx5_post_wq_recv\n+0000ada0 T rdmacore52_0_mlx5_qp_fill_wr_complete_error\n+0000add0 T rdmacore52_0_mlx5_qp_fill_wr_complete_real\n+0000ae00 T rdmacore52_0_mlx5_qp_fill_wr_pfns\n+0000cbd0 T rdmacore52_0_mlx5_store_qp\n+0000cb40 T rdmacore52_0_mlx5_use_huge\n          U stderr\n-         U strcasecmp\n-         U strerror\n-         U strtol\n+000061f0 t umr_finalize_and_set_psvs\n+00006c40 t umr_wqe_finalize\n \n-dr_arg.c.o:\n+dr_buddy.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n-         U __stack_chk_fail_local\n          U calloc\n-00000000 t dr_arg_pool_alloc_objs\n          U free\n-         U mlx5dv_devx_obj_destroy\n-         U pthread_mutex_destroy\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-000001d0 T rdmacore52_0_dr_arg_get_obj\n-000001c0 T rdmacore52_0_dr_arg_get_object_id\n-000003a0 T rdmacore52_0_dr_arg_mngr_create\n-00000540 T rdmacore52_0_dr_arg_mngr_destroy\n-00000350 T rdmacore52_0_dr_arg_put_obj\n-         U rdmacore52_0_dr_devx_create_modify_header_arg\n-         U rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n-         U rdmacore52_0_dr_send_postsend_args\n+         U rdmacore52_0_bitmap_find_first_bit\n+00000260 T rdmacore52_0_dr_buddy_alloc_mem\n+000001f0 T rdmacore52_0_dr_buddy_cleanup\n+000003f0 T rdmacore52_0_dr_buddy_free_mem\n+00000000 T rdmacore52_0_dr_buddy_init\n \n dr_vports.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n          U _mlx5dv_query_port\n          U calloc\n@@ -2033,93 +1175,45 @@\n 00000480 T rdmacore52_0_dr_vports_table_add_wire\n 00000570 T rdmacore52_0_dr_vports_table_create\n 000004d0 T rdmacore52_0_dr_vports_table_del_wire\n 000005b0 T rdmacore52_0_dr_vports_table_destroy\n 00000210 T rdmacore52_0_dr_vports_table_get_ib_port_cap\n 00000000 T rdmacore52_0_dr_vports_table_get_vport_cap\n \n-dr_dbg.c.o:\n-00000b20 t .L62\n-00000690 t .L64\n-00000758 t .L65\n-00000780 t .L66\n-000007a8 t .L67\n-000007d0 t .L68\n-00000800 t .L69\n-00000850 t .L70\n-000008a8 t .L71\n-000008c8 t .L72\n-00000908 t .L73\n-00000930 t .L74\n-000009b0 t .L75\n-000009d0 t .L76\n-00000a00 t .L77\n-00000a30 t .L78\n-00000a60 t .L79\n-00000a80 t .L80\n-00000ab0 t .L81\n-00000ad0 t .L82\n-00000b00 t .L83\n+srq.c.o:\n 00000000 r .LC0\n 00000000 r .LC1\n-00000054 r .LC10\n-0000007c r .LC11\n-00000070 r .LC12\n-00000089 r .LC13\n-0000009e r .LC14\n-000000a3 r .LC15\n-000000b5 r .LC16\n-000000d3 r .LC17\n-000000ea r .LC18\n-000000a4 r .LC19\n-00000005 r .LC2\n-00000103 r .LC20\n-00000105 r .LC21\n-000000cc r .LC22\n-000000f8 r .LC23\n-0000012c r .LC24\n-00000110 r .LC25\n-00000128 r .LC26\n-00000133 r .LC27\n-00000137 r .LC28\n-00000139 r .LC29\n-0000002c r .LC3\n-0000013d r .LC30\n-00000140 r .LC31\n-00000019 r .LC4\n-00000022 r .LC5\n-00000058 r .LC6\n-00000035 r .LC7\n-0000003e r .LC8\n-00000049 r .LC9\n          U _GLOBAL_OFFSET_TABLE_\n-         U __fprintf_chk\n-         U __sprintf_chk\n+         U __errno_location\n          U __stack_chk_fail_local\n-00000000 t dr_dump_domain\n-000011c0 t dr_dump_matcher\n-00000d70 t dr_dump_matcher_mask\n-00000310 t dr_dump_matcher_rx_tx\n-000005d0 t dr_dump_rule\n-00000470 t dr_dump_rule_rx_tx.isra.0\n-00000c50 t dr_dump_table\n-         U fputc\n-         U getpid\n-00001290 T mlx5dv_dump_dr_domain\n-000016d0 T mlx5dv_dump_dr_matcher\n-000018b0 T mlx5dv_dump_dr_rule\n-000014b0 T mlx5dv_dump_dr_table\n+         U abort\n+         U calloc\n+         U free\n+         U fwrite\n+         U malloc\n+         U memcpy\n+         U memset\n          U pthread_spin_lock\n          U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_dr_actions_reformat_get_id\n-         U rdmacore52_0_dr_arg_get_object_id\n-         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-         U rdmacore52_0_dr_rule_get_reverse_rule_members\n-         U rdmacore52_0_dr_ste_get_icm_addr\n+         U rdmacore52_0_ilog64\n+         U rdmacore52_0_mlx5_alloc_prefered_buf\n+00000920 T rdmacore52_0_mlx5_alloc_srq_buf\n+00000dc0 T rdmacore52_0_mlx5_clear_srq\n+00000200 T rdmacore52_0_mlx5_complete_odp_fault\n+00000000 T rdmacore52_0_mlx5_copy_to_recv_srq\n+00000d00 T rdmacore52_0_mlx5_find_srq\n+         U rdmacore52_0_mlx5_free_actual_buf\n+000000b0 T rdmacore52_0_mlx5_free_srq_wqe\n+         U rdmacore52_0_mlx5_get_alloc_type\n+000004b0 T rdmacore52_0_mlx5_post_srq_recv\n+00000d40 T rdmacore52_0_mlx5_store_srq\n+00000180 T rdmacore52_0_srq_cooldown_wqe\n+         U stderr\n \n dr_ste_v0.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n 00000000 r dr_ste_v0_action_modify_field_arr\n 00001fe0 t dr_ste_v0_build_eth_ipv6_l3_l4_init\n@@ -2202,176 +1296,756 @@\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 00000000 T rdmacore52_0___x86.get_pc_thunk.si\n          U rdmacore52_0_dr_ste_conv_bit_to_byte_mask\n 000044b0 T rdmacore52_0_dr_ste_get_ctx_v0\n          U rdmacore52_0_dr_vports_table_get_vport_cap\n 00000000 d ste_ctx_v0\n \n-dr_ste.c.o:\n+dr_ptrn.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n-         U __memcpy_chk\n-         U __stack_chk_fail_local\n          U calloc\n-00000000 t dr_ste_build_empty_always_hit_tag\n-00000010 t dr_ste_copy_mask_spec\n-00000000 t dr_ste_free.cold\n          U free\n-         U memcmp\n+         U ibv_get_device_name\n          U memcpy\n-00003c40 T mlx5dv_dr_aso_other_domain_link\n-00003cc0 T mlx5dv_dr_aso_other_domain_unlink\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0_dr_crc32_slice8_calc\n+         U rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n          U rdmacore52_0_dr_icm_alloc_chunk\n          U rdmacore52_0_dr_icm_free_chunk\n+         U rdmacore52_0_dr_icm_pool_create\n+         U rdmacore52_0_dr_icm_pool_destroy\n          U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n-         U rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n-         U rdmacore52_0_dr_rule_set_last_member\n-         U rdmacore52_0_dr_send_fill_and_append_ste_send_info\n-         U rdmacore52_0_dr_send_postsend_action\n-         U rdmacore52_0_dr_send_postsend_formated_htbl\n-         U rdmacore52_0_dr_send_postsend_ste\n-00001a10 T rdmacore52_0_dr_ste_alloc_encap\n-00001900 T rdmacore52_0_dr_ste_alloc_modify_hdr\n-00003780 T rdmacore52_0_dr_ste_build_def0\n-000038d0 T rdmacore52_0_dr_ste_build_def16\n-000037f0 T rdmacore52_0_dr_ste_build_def2\n-00003940 T rdmacore52_0_dr_ste_build_def22\n-000039b0 T rdmacore52_0_dr_ste_build_def24\n-00003a20 T rdmacore52_0_dr_ste_build_def25\n-00003a90 T rdmacore52_0_dr_ste_build_def26\n-00003b00 T rdmacore52_0_dr_ste_build_def28\n-00003b70 T rdmacore52_0_dr_ste_build_def33\n-00003860 T rdmacore52_0_dr_ste_build_def6\n-00003330 T rdmacore52_0_dr_ste_build_empty_always_hit\n-00003300 T rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4\n-00003270 T rdmacore52_0_dr_ste_build_eth_l2_dst\n-00003240 T rdmacore52_0_dr_ste_build_eth_l2_src\n-00003180 T rdmacore52_0_dr_ste_build_eth_l2_src_dst\n-000032a0 T rdmacore52_0_dr_ste_build_eth_l2_tnl\n-00003210 T rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple\n-000032d0 T rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc\n-000031b0 T rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst\n-000031e0 T rdmacore52_0_dr_ste_build_eth_l3_ipv6_src\n-000034d0 T rdmacore52_0_dr_ste_build_eth_l4_misc\n-000036b0 T rdmacore52_0_dr_ste_build_flex_parser_0\n-000036e0 T rdmacore52_0_dr_ste_build_flex_parser_1\n-000034a0 T rdmacore52_0_dr_ste_build_general_purpose\n-00003740 T rdmacore52_0_dr_ste_build_ib_l4\n-00003470 T rdmacore52_0_dr_ste_build_icmp\n-00003360 T rdmacore52_0_dr_ste_build_mpls\n-00001af0 T rdmacore52_0_dr_ste_build_pre_check\n-00003620 T rdmacore52_0_dr_ste_build_register_0\n-00003650 T rdmacore52_0_dr_ste_build_register_1\n-00003680 T rdmacore52_0_dr_ste_build_src_gvmi_qpn\n-00001bc0 T rdmacore52_0_dr_ste_build_ste_arr\n-00003530 T rdmacore52_0_dr_ste_build_tnl_geneve\n-00003560 T rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt\n-00003420 T rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n-00003390 T rdmacore52_0_dr_ste_build_tnl_gre\n-00003590 T rdmacore52_0_dr_ste_build_tnl_gtpu\n-000035c0 T rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0\n-000035f0 T rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1\n-000033c0 T rdmacore52_0_dr_ste_build_tnl_mpls_over_gre\n-000033f0 T rdmacore52_0_dr_ste_build_tnl_mpls_over_udp\n-00003500 T rdmacore52_0_dr_ste_build_tnl_vxlan_gpe\n-00003710 T rdmacore52_0_dr_ste_build_tunnel_header\n-00000540 T rdmacore52_0_dr_ste_calc_hash_index\n-000006c0 T rdmacore52_0_dr_ste_conv_bit_to_byte_mask\n-00001750 T rdmacore52_0_dr_ste_conv_modify_hdr_sw_field\n-00001d20 T rdmacore52_0_dr_ste_copy_param\n-000014a0 T rdmacore52_0_dr_ste_create_next_htbl\n-00000940 T rdmacore52_0_dr_ste_equal_tag\n-00000af0 T rdmacore52_0_dr_ste_free\n-00001ad0 T rdmacore52_0_dr_ste_free_encap\n-000019d0 T rdmacore52_0_dr_ste_free_modify_hdr\n-00003be0 T rdmacore52_0_dr_ste_get_ctx\n-         U rdmacore52_0_dr_ste_get_ctx_v0\n-         U rdmacore52_0_dr_ste_get_ctx_v1\n-         U rdmacore52_0_dr_ste_get_ctx_v2\n-00000840 T rdmacore52_0_dr_ste_get_icm_addr\n-000008c0 T rdmacore52_0_dr_ste_get_miss_list\n-000008e0 T rdmacore52_0_dr_ste_get_miss_list_top\n-00000880 T rdmacore52_0_dr_ste_get_mr_addr\n-00001360 T rdmacore52_0_dr_ste_htbl_alloc\n-000016d0 T rdmacore52_0_dr_ste_htbl_free\n-00001150 T rdmacore52_0_dr_ste_htbl_init_and_postsend\n-00000920 T rdmacore52_0_dr_ste_is_last_in_rule\n-000009c0 T rdmacore52_0_dr_ste_prepare_for_postsend\n-000017d0 T rdmacore52_0_dr_ste_set_action_add\n-00001820 T rdmacore52_0_dr_ste_set_action_copy\n-00001880 T rdmacore52_0_dr_ste_set_action_decap_l3_list\n-00001780 T rdmacore52_0_dr_ste_set_action_set\n-00001730 T rdmacore52_0_dr_ste_set_actions_rx\n-00001710 T rdmacore52_0_dr_ste_set_actions_tx\n-00000780 T rdmacore52_0_dr_ste_set_bit_mask\n-000009f0 T rdmacore52_0_dr_ste_set_formated_ste\n-000007f0 T rdmacore52_0_dr_ste_set_hit_addr\n-00000980 T rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl\n-00000820 T rdmacore52_0_dr_ste_set_hit_gvmi\n-000007c0 T rdmacore52_0_dr_ste_set_miss_addr\n+         U rdmacore52_0_dr_icm_pool_sync_pool\n+00000020 T rdmacore52_0_dr_ptrn_cache_get_pattern\n+000003c0 T rdmacore52_0_dr_ptrn_cache_put_pattern\n+00000430 T rdmacore52_0_dr_ptrn_mngr_create\n+000004d0 T rdmacore52_0_dr_ptrn_mngr_destroy\n+00000000 T rdmacore52_0_dr_ptrn_sync_pool\n+         U rdmacore52_0_dr_send_postsend_pattern\n \n-dr_domain.c.o:\n+dr_table.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n          U calloc\n+00000000 t dr_table_init_nic\n+000000b0 t dr_table_uninit\n          U free\n-         U ibv_alloc_pd\n-         U ibv_dealloc_pd\n-         U ibv_get_device_name\n-         U ibv_query_device\n-         U ibv_query_port\n-         U mlx5dv_devx_alloc_uar\n-         U mlx5dv_devx_free_uar\n-00000f30 T mlx5dv_dr_domain_allow_duplicate_rules\n-000000b0 T mlx5dv_dr_domain_create\n-00001010 T mlx5dv_dr_domain_destroy\n-00000e50 T mlx5dv_dr_domain_set_reclaim_device_memory\n-00000d40 T mlx5dv_dr_domain_sync\n-         U mlx5dv_init_obj\n+         U mlx5dv_devx_obj_destroy\n+00000120 T mlx5dv_dr_table_create\n+000004d0 T mlx5dv_dr_table_destroy\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_dr_devx_create_flow_table\n+         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n+         U rdmacore52_0_dr_send_ring_force_drain\n+         U rdmacore52_0_dr_ste_htbl_alloc\n+         U rdmacore52_0_dr_ste_htbl_free\n+         U rdmacore52_0_dr_ste_htbl_init_and_postsend\n+\n+buf.c.o:\n+00000168 t .L18\n+00000140 t .L19\n+00000290 t .L21\n+00000268 t .L22\n+000001b8 t .L23\n+00000190 t .L24\n+00000000 r .LC0\n+00000000 r .LC1\n+0000006b r .LC10\n+00000084 r .LC11\n+00000015 r .LC2\n+00000023 r .LC3\n+00000028 r .LC4\n+0000002d r .LC5\n+00000034 r .LC6\n+00000042 r .LC7\n+0000004e r .LC8\n+00000052 r .LC9\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __snprintf_chk\n+         U __sprintf_chk\n+         U __stack_chk_fail_local\n+         U __vfprintf_chk\n+         U abort\n+         U calloc\n+         U free\n+         U fwrite\n+         U getenv\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U malloc\n+00000000 t mlx5_err\n+         U mmap64\n+         U munmap\n+         U posix_memalign\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_bitmap_fill_region\n+         U rdmacore52_0_bitmap_find_free_region\n+         U rdmacore52_0_bitmap_zero_region\n+00001030 T rdmacore52_0_mlx5_alloc_buf\n+00000600 T rdmacore52_0_mlx5_alloc_buf_contig\n+00000080 T rdmacore52_0_mlx5_alloc_buf_extern\n+00000860 T rdmacore52_0_mlx5_alloc_prefered_buf\n+00000110 T rdmacore52_0_mlx5_free_actual_buf\n+000010c0 T rdmacore52_0_mlx5_free_buf\n+00001000 T rdmacore52_0_mlx5_free_buf_contig\n+00000030 T rdmacore52_0_mlx5_free_buf_extern\n+00000430 T rdmacore52_0_mlx5_get_alloc_type\n+000003e0 T rdmacore52_0_mlx5_is_custom_alloc\n+00000410 T rdmacore52_0_mlx5_is_extern_alloc\n+         U shmat\n+         U shmctl\n+         U shmdt\n+         U shmget\n+         U stderr\n+         U strcasecmp\n+         U strerror\n+         U strtol\n+\n+dr_icm_pool.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t dr_icm_buddy_destroy\n+00000170 t dr_icm_pool_sync_pool_buddies\n+         U free\n+         U ibv_dereg_mr\n+         U malloc\n+         U memset\n+         U mlx5dv_alloc_dm\n          U pthread_spin_destroy\n          U pthread_spin_init\n          U pthread_spin_lock\n          U pthread_spin_unlock\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-         U rdmacore52_0_dr_arg_mngr_create\n-         U rdmacore52_0_dr_arg_mngr_destroy\n-         U rdmacore52_0_dr_crc32_init_table\n-         U rdmacore52_0_dr_devx_query_device\n-         U rdmacore52_0_dr_devx_query_esw_caps\n-         U rdmacore52_0_dr_devx_query_esw_vport_context\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+         U rdmacore52_0_dr_buddy_alloc_mem\n+         U rdmacore52_0_dr_buddy_cleanup\n+         U rdmacore52_0_dr_buddy_free_mem\n+         U rdmacore52_0_dr_buddy_init\n          U rdmacore52_0_dr_devx_sync_steering\n-00000010 T rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n-00000030 T rdmacore52_0_dr_domain_is_support_ste_icm_size\n-00000000 T rdmacore52_0_dr_domain_is_support_sw_encap\n-00000050 T rdmacore52_0_dr_domain_set_max_ste_icm_size\n-         U rdmacore52_0_dr_icm_pool_create\n-         U rdmacore52_0_dr_icm_pool_destroy\n-         U rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz\n-         U rdmacore52_0_dr_icm_pool_sync_pool\n-         U rdmacore52_0_dr_ptrn_mngr_create\n-         U rdmacore52_0_dr_ptrn_mngr_destroy\n-         U rdmacore52_0_dr_ptrn_sync_pool\n-         U rdmacore52_0_dr_send_allow_fl\n-         U rdmacore52_0_dr_send_ring_alloc\n+00000410 T rdmacore52_0_dr_icm_alloc_chunk\n+00000a90 T rdmacore52_0_dr_icm_free_chunk\n+00000c30 T rdmacore52_0_dr_icm_pool_create\n+00000d40 T rdmacore52_0_dr_icm_pool_destroy\n+00000b80 T rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n+00000bd0 T rdmacore52_0_dr_icm_pool_get_chunk_mr_addr\n+00000c20 T rdmacore52_0_dr_icm_pool_get_chunk_rkey\n+00000b40 T rdmacore52_0_dr_icm_pool_set_pool_max_log_chunk_sz\n+000003c0 T rdmacore52_0_dr_icm_pool_sync_pool\n          U rdmacore52_0_dr_send_ring_force_drain\n-         U rdmacore52_0_dr_send_ring_free\n-         U rdmacore52_0_dr_ste_get_ctx\n-         U rdmacore52_0_dr_vports_table_add_wire\n-         U rdmacore52_0_dr_vports_table_create\n-         U rdmacore52_0_dr_vports_table_del_wire\n-         U rdmacore52_0_dr_vports_table_destroy\n-         U rdmacore52_0_dr_vports_table_get_ib_port_cap\n+         U rdmacore52_0_mlx5_free_dm\n+\n+dr_matcher.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U calloc\n+00000680 t dr_matcher_connect\n+00000000 t dr_matcher_copy_mask\n+00002a00 t dr_matcher_init_nic\n+000007f0 t dr_matcher_is_mask_consumed\n+000004d0 t dr_matcher_set_nic_matcher_layout\n+00000a40 t dr_matcher_set_ste_builders\n+00000980 t dr_matcher_uninit_nic\n+         U free\n+         U memcmp\n+         U memcpy\n+         U mlx5dv_create_flow_matcher\n+         U mlx5dv_destroy_flow_matcher\n+         U mlx5dv_devx_obj_destroy\n+00002bc0 T mlx5dv_dr_matcher_create\n+000033a0 T mlx5dv_dr_matcher_destroy\n+00002b00 T mlx5dv_dr_matcher_set_layout\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_dr_devx_create_definer\n+         U rdmacore52_0_dr_domain_is_support_ste_icm_size\n+         U rdmacore52_0_dr_domain_set_max_ste_icm_size\n+         U rdmacore52_0_dr_icm_pool_get_chunk_icm_addr\n+         U rdmacore52_0_dr_rule_rehash_matcher_s_anchor\n+         U rdmacore52_0_dr_send_ring_force_drain\n+         U rdmacore52_0_dr_ste_build_def0\n+         U rdmacore52_0_dr_ste_build_def16\n+         U rdmacore52_0_dr_ste_build_def2\n+         U rdmacore52_0_dr_ste_build_def22\n+         U rdmacore52_0_dr_ste_build_def24\n+         U rdmacore52_0_dr_ste_build_def25\n+         U rdmacore52_0_dr_ste_build_def26\n+         U rdmacore52_0_dr_ste_build_def28\n+         U rdmacore52_0_dr_ste_build_def33\n+         U rdmacore52_0_dr_ste_build_def6\n+         U rdmacore52_0_dr_ste_build_empty_always_hit\n+         U rdmacore52_0_dr_ste_build_eth_ipv6_l3_l4\n+         U rdmacore52_0_dr_ste_build_eth_l2_dst\n+         U rdmacore52_0_dr_ste_build_eth_l2_src\n+         U rdmacore52_0_dr_ste_build_eth_l2_src_dst\n+         U rdmacore52_0_dr_ste_build_eth_l2_tnl\n+         U rdmacore52_0_dr_ste_build_eth_l3_ipv4_5_tuple\n+         U rdmacore52_0_dr_ste_build_eth_l3_ipv4_misc\n+         U rdmacore52_0_dr_ste_build_eth_l3_ipv6_dst\n+         U rdmacore52_0_dr_ste_build_eth_l3_ipv6_src\n+         U rdmacore52_0_dr_ste_build_eth_l4_misc\n+         U rdmacore52_0_dr_ste_build_flex_parser_0\n+         U rdmacore52_0_dr_ste_build_flex_parser_1\n+         U rdmacore52_0_dr_ste_build_general_purpose\n+         U rdmacore52_0_dr_ste_build_ib_l4\n+         U rdmacore52_0_dr_ste_build_icmp\n+         U rdmacore52_0_dr_ste_build_mpls\n+         U rdmacore52_0_dr_ste_build_pre_check\n+         U rdmacore52_0_dr_ste_build_register_0\n+         U rdmacore52_0_dr_ste_build_register_1\n+         U rdmacore52_0_dr_ste_build_src_gvmi_qpn\n+         U rdmacore52_0_dr_ste_build_tnl_geneve\n+         U rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt\n+         U rdmacore52_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n+         U rdmacore52_0_dr_ste_build_tnl_gre\n+         U rdmacore52_0_dr_ste_build_tnl_gtpu\n+         U rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_0\n+         U rdmacore52_0_dr_ste_build_tnl_gtpu_flex_parser_1\n+         U rdmacore52_0_dr_ste_build_tnl_mpls_over_gre\n+         U rdmacore52_0_dr_ste_build_tnl_mpls_over_udp\n+         U rdmacore52_0_dr_ste_build_tnl_vxlan_gpe\n+         U rdmacore52_0_dr_ste_build_tunnel_header\n+         U rdmacore52_0_dr_ste_copy_param\n+         U rdmacore52_0_dr_ste_htbl_alloc\n+         U rdmacore52_0_dr_ste_htbl_free\n+         U rdmacore52_0_dr_ste_htbl_init_and_postsend\n+\n+dr_devx.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U memcpy\n+         U mlx5dv_devx_general_cmd\n+         U mlx5dv_devx_obj_create\n+         U mlx5dv_devx_obj_destroy\n+         U mlx5dv_devx_obj_modify\n+         U mlx5dv_devx_obj_query\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+00000de0 T rdmacore52_0_dr_devx_create_always_hit_ft\n+00001570 T rdmacore52_0_dr_devx_create_definer\n+000013a0 T rdmacore52_0_dr_devx_create_flow_sampler\n+00000af0 T rdmacore52_0_dr_devx_create_flow_table\n+000017e0 T rdmacore52_0_dr_devx_create_meter\n+00002160 T rdmacore52_0_dr_devx_create_modify_header_arg\n+00001b60 T rdmacore52_0_dr_devx_create_qp\n+000016a0 T rdmacore52_0_dr_devx_create_reformat_ctx\n+00001360 T rdmacore52_0_dr_devx_destroy_always_hit_ft\n+00001a20 T rdmacore52_0_dr_devx_modify_meter\n+00001e10 T rdmacore52_0_dr_devx_modify_qp_init2rtr\n+00001d20 T rdmacore52_0_dr_devx_modify_qp_rst2init\n+00001f80 T rdmacore52_0_dr_devx_modify_qp_rtr2rts\n+00000310 T rdmacore52_0_dr_devx_query_device\n+000001d0 T rdmacore52_0_dr_devx_query_esw_caps\n+00000000 T rdmacore52_0_dr_devx_query_esw_vport_context\n+000014a0 T rdmacore52_0_dr_devx_query_flow_sampler\n+00000c60 T rdmacore52_0_dr_devx_query_flow_table\n+00002070 T rdmacore52_0_dr_devx_query_gid\n+00000100 T rdmacore52_0_dr_devx_query_gvmi\n+00001930 T rdmacore52_0_dr_devx_query_meter\n+00000a40 T rdmacore52_0_dr_devx_sync_steering\n+         U rdmacore52_0_mlx5_get_cmd_status_err\n+\n+dr_ste_v1.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U calloc\n+00000060 r dr_ste_v1_action_modify_field_arr\n+00000000 r dr_ste_v1_action_modify_flex_field_arr\n+00004de0 t dr_ste_v1_alloc_modify_hdr_ptrn_arg\n+00005830 t dr_ste_v1_aso_other_domain_link\n+00004ea0 t dr_ste_v1_aso_other_domain_unlink\n+00004d90 t dr_ste_v1_build_def0_init\n+00001d70 t dr_ste_v1_build_def0_tag\n+00006810 t dr_ste_v1_build_def16_init\n+00003be0 t dr_ste_v1_build_def16_tag\n+00007c60 t dr_ste_v1_build_def22_init\n+000013b0 t dr_ste_v1_build_def22_tag\n+00007fa0 t dr_ste_v1_build_def24_init\n+000010b0 t dr_ste_v1_build_def24_tag\n+000082f0 t dr_ste_v1_build_def25_init\n+00000d90 t dr_ste_v1_build_def25_tag\n+00004d30 t dr_ste_v1_build_def26_init\n+000009c0 t dr_ste_v1_build_def26_tag\n+00004cd0 t dr_ste_v1_build_def28_init\n+000005f0 t dr_ste_v1_build_def28_tag\n+00001d20 t dr_ste_v1_build_def2_init\n+000018f0 t dr_ste_v1_build_def2_tag\n+00004c80 t dr_ste_v1_build_def33_init\n+000001f0 t dr_ste_v1_build_def33_tag\n+00006d60 t dr_ste_v1_build_def6_init\n+00001680 t dr_ste_v1_build_def6_tag\n+00004330 t dr_ste_v1_build_eth_ipv6_l3_l4_init\n+00002760 t dr_ste_v1_build_eth_ipv6_l3_l4_tag\n+00004510 t dr_ste_v1_build_eth_l2_dst_init\n+00003950 t dr_ste_v1_build_eth_l2_dst_tag\n+000047f0 t dr_ste_v1_build_eth_l2_src_dst_init\n+00003a10 t dr_ste_v1_build_eth_l2_src_dst_tag\n+00006a80 t dr_ste_v1_build_eth_l2_src_init\n+00003640 t dr_ste_v1_build_eth_l2_src_or_dst_tag\n+000039b0 t dr_ste_v1_build_eth_l2_src_tag\n+00004380 t dr_ste_v1_build_eth_l2_tnl_init\n+00003470 t dr_ste_v1_build_eth_l2_tnl_tag\n+00008f20 t dr_ste_v1_build_eth_l3_ipv4_5_tuple_init\n+00002ac0 t dr_ste_v1_build_eth_l3_ipv4_5_tuple_tag\n+00005610 t dr_ste_v1_build_eth_l3_ipv4_misc_init\n+00002a60 t dr_ste_v1_build_eth_l3_ipv4_misc_tag\n+000056f0 t dr_ste_v1_build_eth_l3_ipv6_dst_init\n+00002d20 t dr_ste_v1_build_eth_l3_ipv6_dst_tag\n+00005790 t dr_ste_v1_build_eth_l3_ipv6_src_init\n+00002d90 t dr_ste_v1_build_eth_l3_ipv6_src_tag\n+00005060 t dr_ste_v1_build_eth_l4_misc_init\n+00004ad0 t dr_ste_v1_build_eth_l4_misc_tag\n+000061f0 t dr_ste_v1_build_felx_parser_tag\n+000065b0 t dr_ste_v1_build_flex_parser_0_init\n+00006560 t dr_ste_v1_build_flex_parser_1_init\n+00005db0 t dr_ste_v1_build_flex_parser_tnl_geneve_init\n+00002370 t dr_ste_v1_build_flex_parser_tnl_geneve_tag\n+00004090 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init\n+00002330 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_tag\n+00004100 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init\n+00003130 t dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_tag\n+00005220 t dr_ste_v1_build_flex_parser_tnl_gtpu_init\n+000022c0 t dr_ste_v1_build_flex_parser_tnl_gtpu_tag\n+00005490 t dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init\n+00004a50 t dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_tag\n+00004170 t dr_ste_v1_build_general_purpose_init\n+00002410 t dr_ste_v1_build_general_purpose_tag\n+00005560 t dr_ste_v1_build_ib_l4_init\n+00004950 t dr_ste_v1_build_ib_l4_tag\n+000052e0 t dr_ste_v1_build_icmp_init\n+00002440 t dr_ste_v1_build_icmp_tag\n+00006600 t dr_ste_v1_build_mpls_init\n+000025c0 t dr_ste_v1_build_mpls_tag\n+00003fe0 t dr_ste_v1_build_register_0_init\n+00002250 t dr_ste_v1_build_register_0_tag\n+00003f30 t dr_ste_v1_build_register_1_init\n+000021e0 t dr_ste_v1_build_register_1_tag\n+00003ea0 t dr_ste_v1_build_src_gvmi_qpn_init\n+00003df0 t dr_ste_v1_build_src_gvmi_qpn_tag\n+000060d0 t dr_ste_v1_build_tnl_gre_init\n+000024e0 t dr_ste_v1_build_tnl_gre_tag\n+00005e80 t dr_ste_v1_build_tnl_gtpu_flex_parser_0_init\n+00003050 t dr_ste_v1_build_tnl_gtpu_flex_parser_0_tag\n+00005fb0 t dr_ste_v1_build_tnl_gtpu_flex_parser_1_init\n+00002f70 t dr_ste_v1_build_tnl_gtpu_flex_parser_1_tag\n+00004280 t dr_ste_v1_build_tnl_mpls_over_gre_init\n+000031d0 t dr_ste_v1_build_tnl_mpls_over_gre_tag\n+000041d0 t dr_ste_v1_build_tnl_mpls_over_udp_init\n+00003170 t dr_ste_v1_build_tnl_mpls_over_udp_tag\n+00005120 t dr_ste_v1_build_tunnel_header_init\n+000049d0 t dr_ste_v1_build_tunnel_header_tag\n+00003300 t dr_ste_v1_dealloc_modify_hdr_ptrn_arg\n+00004bf0 t dr_ste_v1_get_action_hw_field\n+00002f40 t dr_ste_v1_get_byte_mask\n+00002f50 t dr_ste_v1_get_miss_addr\n+00000000 t dr_ste_v1_get_next_lu_type\n+00002eb0 t dr_ste_v1_init\n+00003280 t dr_ste_v1_prepare_for_postsend\n+00000090 t dr_ste_v1_set_action_add\n+00000020 t dr_ste_v1_set_action_copy\n+00003340 t dr_ste_v1_set_action_decap_l3_list\n+000000e0 t dr_ste_v1_set_action_set\n+00006ff0 t dr_ste_v1_set_actions_rx\n+000087c0 t dr_ste_v1_set_actions_tx\n+00003230 t dr_ste_v1_set_aso_ct_cross_dmn\n+00004e80 t dr_ste_v1_set_byte_mask\n+000053c0 t dr_ste_v1_set_ctrl_always_hit_htbl\n+00002e40 t dr_ste_v1_set_ctrl_always_miss\n+00000150 t dr_ste_v1_set_hit_addr\n+00000130 t dr_ste_v1_set_hit_gvmi\n+000001b0 t dr_ste_v1_set_miss_addr\n+00002e00 t dr_ste_v1_set_next_lu_type\n+00004b60 t dr_ste_v1_set_rewrite_actions\n+         U free\n+         U malloc\n+         U memcpy\n+         U mlx5dv_dr_domain_sync\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0_dr_arg_get_obj\n+         U rdmacore52_0_dr_arg_put_obj\n+         U rdmacore52_0_dr_ptrn_cache_get_pattern\n+         U rdmacore52_0_dr_ptrn_cache_put_pattern\n+         U rdmacore52_0_dr_rule_send_update_list\n+         U rdmacore52_0_dr_send_fill_and_append_ste_send_info\n+         U rdmacore52_0_dr_ste_conv_bit_to_byte_mask\n+00009230 T rdmacore52_0_dr_ste_get_ctx_v1\n+         U rdmacore52_0_dr_ste_get_miss_list\n+         U rdmacore52_0_dr_ste_htbl_alloc\n+         U rdmacore52_0_dr_ste_htbl_free\n+         U rdmacore52_0_dr_ste_set_hit_addr_by_next_htbl\n+000091e0 T rdmacore52_0_dr_ste_v1_set_aso_ct\n+         U rdmacore52_0_dr_vports_table_get_vport_cap\n+00000000 d ste_ctx_v1\n+\n+mlx5_vfio.c.o:\n+00007378 t .L1123\n+000073d9 t .L1124\n+000073e5 t .L1126\n+000073f1 t .L1127\n+000073fd t .L1128\n+00007409 t .L1129\n+00007418 t .L1130\n+00007427 t .L1131\n+00007436 t .L1132\n+00007445 t .L1133\n+00007454 t .L1134\n+00007463 t .L1135\n+00007472 t .L1136\n+00007481 t .L1137\n+0000749f t .L1139\n+00007490 t .L1142\n+00007630 t .L1153\n+00007689 t .L1154\n+00007695 t .L1156\n+000076a1 t .L1157\n+000076ad t .L1158\n+000076b9 t .L1159\n+000076c8 t .L1160\n+000076d7 t .L1161\n+000076e6 t .L1162\n+000076f5 t .L1163\n+00007704 t .L1164\n+00007713 t .L1165\n+00007722 t .L1166\n+00007731 t .L1167\n+0000774f t .L1169\n+00007740 t .L1172\n+000078d8 t .L1183\n+00007939 t .L1184\n+00007945 t .L1186\n+00007951 t .L1187\n+0000795d t .L1188\n+00007969 t .L1189\n+00007978 t .L1190\n+00007987 t .L1191\n+00007996 t .L1192\n+000079a5 t .L1193\n+000079b4 t .L1194\n+000079c3 t .L1195\n+000079d2 t .L1196\n+000079e1 t .L1197\n+000079ff t .L1199\n+000079f0 t .L1202\n+00007e96 t .L1219\n+00007dbf t .L1220\n+00007e2e t .L1222\n+00007e36 t .L1223\n+00007e3e t .L1224\n+00007e49 t .L1225\n+00007e54 t .L1226\n+00007e5f t .L1227\n+00007e6a t .L1228\n+00007e75 t .L1229\n+00007e8b t .L1231\n+00007e80 t .L1240\n+00001f70 t .L328\n+00001fba t .L329\n+00001fc2 t .L331\n+00001fca t .L332\n+00001fd2 t .L333\n+00001fda t .L334\n+00001fe2 t .L335\n+00001fea t .L336\n+00001ff2 t .L337\n+00001ffd t .L338\n+00002008 t .L339\n+00002013 t .L340\n+0000201e t .L341\n+00002029 t .L342\n+0000203f t .L344\n+00002034 t .L346\n+00002e80 t .L520\n+000031fe t .L521\n+00002fc0 t .L523\n+00002fea t .L524\n+00003014 t .L525\n+00003090 t .L526\n+00003116 t .L527\n+0000318c t .L528\n+000031b2 t .L529\n+000031d8 t .L530\n+00002f4e t .L531\n+00002f74 t .L532\n+00002f9a t .L533\n+0000324e t .L534\n+000032fe t .L536\n+0000332f t .L537\n+00003282 t .L538\n+000032a8 t .L539\n+00003228 t .L540\n+00002ead t .L554\n+00003610 t .L575\n+0000364f t .L576\n+00003648 t .L577\n+00003641 t .L578\n+0000363a t .L579\n+00003633 t .L580\n+0000362c t .L581\n+00003625 t .L582\n+0000361e t .L583\n+000035fb t .L584\n+000035f4 t .L585\n+00003617 t .L586\n+00003609 t .L587\n+00003602 t .L588\n+00000710 t .L74\n+000007c7 t .L75\n+000007bc t .L77\n+000007b1 t .L78\n+000007a6 t .L79\n+0000079b t .L80\n+00000790 t .L81\n+00000788 t .L82\n+00000780 t .L83\n+000052d8 t .L833\n+00005333 t .L834\n+0000533f t .L836\n+0000534b t .L837\n+00005357 t .L838\n+00005363 t .L839\n+00000778 t .L84\n+0000536f t .L840\n+0000537e t .L841\n+0000538d t .L842\n+0000539c t .L843\n+000053ab t .L844\n+000053ba t .L845\n+000053c9 t .L846\n+000053d8 t .L847\n+000053f6 t .L849\n+00000770 t .L85\n+000053e7 t .L852\n+00000768 t .L86\n+00005530 t .L863\n+00005583 t .L864\n+0000558f t .L866\n+0000559b t .L867\n+000055a7 t .L868\n+000055b3 t .L869\n+00000760 t .L87\n+000055bf t .L870\n+000055ce t .L871\n+000055dd t .L872\n+000055ec t .L873\n+000055fb t .L874\n+0000560a t .L875\n+00005619 t .L876\n+00005628 t .L877\n+00005646 t .L879\n+00000758 t .L88\n+00005637 t .L882\n+00005758 t .L897\n+000057a0 t .L898\n+000007dd t .L90\n+000057a8 t .L900\n+000057b0 t .L901\n+000057b8 t .L902\n+000057c0 t .L903\n+000057c8 t .L904\n+000057d0 t .L905\n+000057d8 t .L906\n+000057e0 t .L907\n+000057eb t .L908\n+000057f6 t .L909\n+00005801 t .L910\n+0000580c t .L911\n+00005822 t .L913\n+00005817 t .L916\n+000007d2 t .L92\n+00000000 r .LC0\n+0000000f r .LC1\n+00000093 r .LC10\n+000000a0 r .LC11\n+000000b1 r .LC12\n+000000c3 r .LC13\n+000000d0 r .LC14\n+00000000 r .LC15\n+00000024 r .LC16\n+000000e7 r .LC17\n+00000074 r .LC18\n+000000f9 r .LC19\n+0000001e r .LC2\n+00000103 r .LC20\n+0000010d r .LC21\n+00000110 r .LC22\n+0000011d r .LC23\n+000000a0 r .LC24\n+000000d0 r .LC25\n+00000100 r .LC26\n+00000138 r .LC27\n+00000129 r .LC28\n+00000147 r .LC29\n+0000002c r .LC3\n+00000156 r .LC30\n+0000016e r .LC31\n+00000183 r .LC32\n+000001a0 r .LC33\n+000001b3 r .LC34\n+000001c7 r .LC35\n+000001d7 r .LC36\n+000001ef r .LC37\n+000001f8 r .LC38\n+0000020e r .LC39\n+0000003a r .LC4\n+0000021a r .LC40\n+0000022b r .LC41\n+0000023e r .LC42\n+00000158 r .LC43\n+0000025b r .LC44\n+00000272 r .LC45\n+0000028a r .LC46\n+000002a0 r .LC47\n+000002a9 r .LC48\n+000002b4 r .LC49\n+0000004b r .LC5\n+000002c2 r .LC50\n+000002d2 r .LC51\n+000002e1 r .LC52\n+000002f2 r .LC53\n+00000305 r .LC54\n+00000058 r .LC6\n+00000066 r .LC7\n+00000076 r .LC8\n+00000089 r .LC9\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+00000d9c r __func__.2\n+00000db4 r __func__.3\n+         U __isoc23_sscanf\n+         U __isoc23_strtoul\n+         U __pread64_chk\n+         U __snprintf_chk\n+         U __sprintf_chk\n+         U __stack_chk_fail_local\n+         U __strncat_chk\n+         U __vfprintf_chk\n+000047e0 t _vfio_devx_umem_reg\n+         U abort\n+00000350 t alloc_cmd_box\n+         U basename\n+         U calloc\n+         U close\n+00000000 b curr.0\n+         U eventfd\n+         U free\n+         U gettimeofday\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U ioctl\n+         U memcpy\n+         U memset\n+00000070 t mlx5_err\n+00005840 t mlx5_vfio_alloc_context\n+00005410 t mlx5_vfio_alloc_pd\n+00001270 t mlx5_vfio_clean_cmd_interface\n+00000f90 t mlx5_vfio_clean_device_dma\n+000006c0 t mlx5_vfio_cmd_check\n+00000b20 t mlx5_vfio_cmd_comp\n+000026d0 t mlx5_vfio_cmd_do\n+00001f00 t mlx5_vfio_cmd_exec.constprop.0\n+00000040 d mlx5_vfio_common_ops\n+000051d0 t mlx5_vfio_dealloc_pd\n+000074c0 t mlx5_vfio_dereg_mr\n+00000000 d mlx5_vfio_dev_ops\n+00000000 d mlx5_vfio_dv_ctx_ops\n+00000b90 t mlx5_vfio_enable_pci_cmd\n+00001610 t mlx5_vfio_enlarge_cmd_msg\n+000010b0 t mlx5_vfio_free_cmd_slot\n+000041f0 t mlx5_vfio_free_context\n+000004c0 t mlx5_vfio_free_page\n+000036d0 t mlx5_vfio_get_caps_mode\n+00000cb0 t mlx5_vfio_get_iommu_group_id\n+00002050 t mlx5_vfio_give_pages\n+00000170 t mlx5_vfio_new_block\n+000018a0 t mlx5_vfio_post_cmd\n+000023b0 t mlx5_vfio_process_async_events\n+00001bd0 t mlx5_vfio_process_page_request_comp\n+000038c0 t mlx5_vfio_reg_mr\n+00005660 t mlx5_vfio_satisfy_startup_pages\n+00004d20 t mlx5_vfio_setup_cmd_slot\n+00004010 t mlx5_vfio_teardown_hca.isra.0\n+00000120 t mlx5_vfio_uninit_device\n+00007eb0 T mlx5dv_get_vfio_device_list\n+00007a20 T mlx5dv_vfio_get_events_fd\n+00007a30 T mlx5dv_vfio_process_events\n+         U mmap64\n+         U munmap\n+         U open64\n+         U poll\n+         U posix_memalign\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U pwrite64\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_bitmap_find_first_bit\n+         U rdmacore52_0_ilog64\n+00007ff0 T rdmacore52_0_is_mlx5_vfio_dev\n+         U rdmacore52_0_iset_alloc_range\n+         U rdmacore52_0_iset_create\n+         U rdmacore52_0_iset_destroy\n+         U rdmacore52_0_iset_insert_range\n+         U rdmacore52_0_mlx5_close_debug_file\n+         U rdmacore52_0_mlx5_cmd_status_to_err\n+         U rdmacore52_0_mlx5_hca_table\n+         U rdmacore52_0_mlx5_open_debug_file\n+         U rdmacore52_0_mlx5_set_debug_mask\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+         U read\n+         U readlink\n+         U realloc\n+         U sched_yield\n+00000008 b start.1\n+         U stat64\n+         U strdup\n+         U strlen\n+         U sysconf\n+         U usleep\n+00000960 t vfio_devx_alloc_msi_vector\n+000000a0 t vfio_devx_alloc_uar\n+00004460 t vfio_devx_create_eq\n+00007220 t vfio_devx_destroy_eq\n+000007f0 t vfio_devx_free_msi_vector\n+00000150 t vfio_devx_free_uar\n+00003660 t vfio_devx_general_cmd\n+00002b40 t vfio_devx_obj_create\n+00003820 t vfio_devx_obj_destroy\n+00003690 t vfio_devx_obj_modify\n+00002b00 t vfio_devx_obj_query\n+00000000 t vfio_devx_query_eqn\n+00007770 t vfio_devx_umem_dereg\n+00004cf0 t vfio_devx_umem_reg\n+00004c90 t vfio_devx_umem_reg_ex\n+00000030 t vfio_init_obj\n+         U write\n \n cq.c.o:\n 000046b9 t .L1019\n 00003f10 t .L1085\n 00004a40 t .L1113\n 00004b58 t .L1114\n 00004c58 t .L1116\n@@ -2806,367 +2480,686 @@\n 00000008 D rdmacore52_0_mlx5_stall_cq_poll_max\n 0000000c D rdmacore52_0_mlx5_stall_cq_poll_min\n 00000010 D rdmacore52_0_mlx5_stall_num_loop\n          U rdmacore52_0_mlx5_use_huge\n          U sleep\n          U stderr\n \n-mlx5_vfio.c.o:\n-00007378 t .L1123\n-000073d9 t .L1124\n-000073e5 t .L1126\n-000073f1 t .L1127\n-000073fd t .L1128\n-00007409 t .L1129\n-00007418 t .L1130\n-00007427 t .L1131\n-00007436 t .L1132\n-00007445 t .L1133\n-00007454 t .L1134\n-00007463 t .L1135\n-00007472 t .L1136\n-00007481 t .L1137\n-0000749f t .L1139\n-00007490 t .L1142\n-00007630 t .L1153\n-00007689 t .L1154\n-00007695 t .L1156\n-000076a1 t .L1157\n-000076ad t .L1158\n-000076b9 t .L1159\n-000076c8 t .L1160\n-000076d7 t .L1161\n-000076e6 t .L1162\n-000076f5 t .L1163\n-00007704 t .L1164\n-00007713 t .L1165\n-00007722 t .L1166\n-00007731 t .L1167\n-0000774f t .L1169\n-00007740 t .L1172\n-000078d8 t .L1183\n-00007939 t .L1184\n-00007945 t .L1186\n-00007951 t .L1187\n-0000795d t .L1188\n-00007969 t .L1189\n-00007978 t .L1190\n-00007987 t .L1191\n-00007996 t .L1192\n-000079a5 t .L1193\n-000079b4 t .L1194\n-000079c3 t .L1195\n-000079d2 t .L1196\n-000079e1 t .L1197\n-000079ff t .L1199\n-000079f0 t .L1202\n-00007e96 t .L1219\n-00007dbf t .L1220\n-00007e2e t .L1222\n-00007e36 t .L1223\n-00007e3e t .L1224\n-00007e49 t .L1225\n-00007e54 t .L1226\n-00007e5f t .L1227\n-00007e6a t .L1228\n-00007e75 t .L1229\n-00007e8b t .L1231\n-00007e80 t .L1240\n-00001f70 t .L328\n-00001fba t .L329\n-00001fc2 t .L331\n-00001fca t .L332\n-00001fd2 t .L333\n-00001fda t .L334\n-00001fe2 t .L335\n-00001fea t .L336\n-00001ff2 t .L337\n-00001ffd t .L338\n-00002008 t .L339\n-00002013 t .L340\n-0000201e t .L341\n-00002029 t .L342\n-0000203f t .L344\n-00002034 t .L346\n-00002e80 t .L520\n-000031fe t .L521\n-00002fc0 t .L523\n-00002fea t .L524\n-00003014 t .L525\n-00003090 t .L526\n-00003116 t .L527\n-0000318c t .L528\n-000031b2 t .L529\n-000031d8 t .L530\n-00002f4e t .L531\n-00002f74 t .L532\n-00002f9a t .L533\n-0000324e t .L534\n-000032fe t .L536\n-0000332f t .L537\n-00003282 t .L538\n-000032a8 t .L539\n-00003228 t .L540\n-00002ead t .L554\n-00003610 t .L575\n-0000364f t .L576\n-00003648 t .L577\n-00003641 t .L578\n-0000363a t .L579\n-00003633 t .L580\n-0000362c t .L581\n-00003625 t .L582\n-0000361e t .L583\n-000035fb t .L584\n-000035f4 t .L585\n-00003617 t .L586\n-00003609 t .L587\n-00003602 t .L588\n-00000710 t .L74\n-000007c7 t .L75\n-000007bc t .L77\n-000007b1 t .L78\n-000007a6 t .L79\n-0000079b t .L80\n-00000790 t .L81\n-00000788 t .L82\n-00000780 t .L83\n-000052d8 t .L833\n-00005333 t .L834\n-0000533f t .L836\n-0000534b t .L837\n-00005357 t .L838\n-00005363 t .L839\n-00000778 t .L84\n-0000536f t .L840\n-0000537e t .L841\n-0000538d t .L842\n-0000539c t .L843\n-000053ab t .L844\n-000053ba t .L845\n-000053c9 t .L846\n-000053d8 t .L847\n-000053f6 t .L849\n-00000770 t .L85\n-000053e7 t .L852\n-00000768 t .L86\n-00005530 t .L863\n-00005583 t .L864\n-0000558f t .L866\n-0000559b t .L867\n-000055a7 t .L868\n-000055b3 t .L869\n-00000760 t .L87\n-000055bf t .L870\n-000055ce t .L871\n-000055dd t .L872\n-000055ec t .L873\n-000055fb t .L874\n-0000560a t .L875\n-00005619 t .L876\n-00005628 t .L877\n-00005646 t .L879\n-00000758 t .L88\n-00005637 t .L882\n-00005758 t .L897\n-000057a0 t .L898\n-000007dd t .L90\n-000057a8 t .L900\n-000057b0 t .L901\n-000057b8 t .L902\n-000057c0 t .L903\n-000057c8 t .L904\n-000057d0 t .L905\n-000057d8 t .L906\n-000057e0 t .L907\n-000057eb t .L908\n-000057f6 t .L909\n-00005801 t .L910\n-0000580c t .L911\n-00005822 t .L913\n-00005817 t .L916\n-000007d2 t .L92\n+dr_arg.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t dr_arg_pool_alloc_objs\n+         U free\n+         U mlx5dv_devx_obj_destroy\n+         U pthread_mutex_destroy\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+000001d0 T rdmacore52_0_dr_arg_get_obj\n+000001c0 T rdmacore52_0_dr_arg_get_object_id\n+000003a0 T rdmacore52_0_dr_arg_mngr_create\n+00000540 T rdmacore52_0_dr_arg_mngr_destroy\n+00000350 T rdmacore52_0_dr_arg_put_obj\n+         U rdmacore52_0_dr_devx_create_modify_header_arg\n+         U rdmacore52_0_dr_domain_is_support_modify_hdr_cache\n+         U rdmacore52_0_dr_send_postsend_args\n+\n+mlx5.c.o:\n 00000000 r .LC0\n-0000000f r .LC1\n-00000093 r .LC10\n-000000a0 r .LC11\n-000000b1 r .LC12\n-000000c3 r .LC13\n-000000d0 r .LC14\n-00000000 r .LC15\n-00000024 r .LC16\n-000000e7 r .LC17\n-00000074 r .LC18\n-000000f9 r .LC19\n-0000001e r .LC2\n-00000103 r .LC20\n-0000010d r .LC21\n-00000110 r .LC22\n-0000011d r .LC23\n-000000a0 r .LC24\n-000000d0 r .LC25\n-00000100 r .LC26\n-00000138 r .LC27\n-00000129 r .LC28\n-00000147 r .LC29\n+00000000 r .LC1\n+0000006d r .LC10\n+00000082 r .LC11\n+00000093 r .LC12\n+000000aa r .LC13\n+000000c3 r .LC14\n+000000b0 r .LC15\n+000000d3 r .LC16\n+000000e6 r .LC17\n+00000010 r .LC2\n+00000100 r .LC21\n+00000128 r .LC22\n+0000010f r .LC23\n+00000123 r .LC24\n+0000013a r .LC25\n+00000151 r .LC26\n+00000168 r .LC27\n 0000002c r .LC3\n-00000156 r .LC30\n-0000016e r .LC31\n-00000183 r .LC32\n-000001a0 r .LC33\n-000001b3 r .LC34\n-000001c7 r .LC35\n-000001d7 r .LC36\n-000001ef r .LC37\n-000001f8 r .LC38\n-0000020e r .LC39\n-0000003a r .LC4\n-0000021a r .LC40\n-0000022b r .LC41\n-0000023e r .LC42\n-00000158 r .LC43\n-0000025b r .LC44\n-00000272 r .LC45\n-0000028a r .LC46\n-000002a0 r .LC47\n-000002a9 r .LC48\n-000002b4 r .LC49\n-0000004b r .LC5\n-000002c2 r .LC50\n-000002d2 r .LC51\n-000002e1 r .LC52\n-000002f2 r .LC53\n-00000305 r .LC54\n-00000058 r .LC6\n-00000066 r .LC7\n-00000076 r .LC8\n-00000089 r .LC9\n+0000006c r .LC4\n+00000012 r .LC5\n+00000022 r .LC6\n+00000026 r .LC7\n+00000044 r .LC8\n+00000054 r .LC9\n+00000000 r CSWTCH.158\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n-00000d9c r __func__.2\n-00000db4 r __func__.3\n-         U __isoc23_sscanf\n+         U __isoc23_strtol\n          U __isoc23_strtoul\n-         U __pread64_chk\n          U __snprintf_chk\n-         U __sprintf_chk\n          U __stack_chk_fail_local\n-         U __strncat_chk\n          U __vfprintf_chk\n-000047e0 t _vfio_devx_umem_reg\n+00000780 t _mlx5dv_get_clock_info\n+00000cb0 t _mlx5dv_init_obj\n+00001b30 t _mlx5dv_modify_qp_lag_port\n+00001850 t _mlx5dv_modify_qp_sched_elem\n+00001a00 t _mlx5dv_modify_qp_udp_sport\n+00000380 t _mlx5dv_query_device\n+00002210 t _mlx5dv_query_qp_lag_port\n+00000a60 t _mlx5dv_reserved_qpn_alloc\n+00000020 t _mlx5dv_reserved_qpn_dealloc\n+00002130 t _mlx5dv_sched_leaf_create\n+00000190 t _mlx5dv_sched_leaf_destroy\n+00001d90 t _mlx5dv_sched_leaf_modify\n+00001620 t _mlx5dv_sched_node_create\n+000001d0 t _mlx5dv_sched_node_destroy\n+00001ce0 t _mlx5dv_sched_node_modify\n+00000740 t _mlx5dv_set_context_attr\n+         U calloc\n+00000000 t drv__register_driver\n+         U fclose\n+         U fgets\n+         U fopen64\n+         U free\n+000002a0 t get_dc_odp_caps\n+         U getenv\n+         U gethostname\n+         U ibv_get_device_name\n+         U memcmp\n+000045f0 t mlx5_alloc_context\n+00000140 d mlx5_ctx_common_ops\n+00000000 d mlx5_ctx_cqev1_ops\n+00000000 d mlx5_dev_ops\n+00000240 t mlx5_device_alloc\n+00000000 d mlx5_dv_ctx_ops\n+00000210 t mlx5_err\n+00001050 t mlx5_free_context\n+000044c0 t mlx5_import_context\n+00001e40 t mlx5_init_context\n+00000830 t mlx5_local_cpu_set\n+00003690 t mlx5_set_context\n+00000000 t mlx5_uninit_device\n+00002d70 T mlx5dv_dci_stream_id_reset\n+         U mlx5dv_devx_general_cmd\n+         U mlx5dv_devx_obj_create\n+         U mlx5dv_devx_obj_destroy\n+         U mlx5dv_devx_obj_modify\n+         U mlx5dv_devx_qp_modify\n+         U mlx5dv_devx_qp_query\n+00004870 T mlx5dv_get_clock_info\n+00003420 T mlx5dv_init_obj\n+000048f0 T mlx5dv_is_supported\n+00002c60 T mlx5dv_modify_qp_lag_port\n+000031b0 T mlx5dv_modify_qp_sched_elem\n+00002cf0 T mlx5dv_modify_qp_udp_sport\n+00004910 T mlx5dv_open_device\n+00002b50 T mlx5dv_query_device\n+00002bd0 T mlx5dv_query_qp_lag_port\n+00003320 T mlx5dv_reserved_qpn_alloc\n+000033a0 T mlx5dv_reserved_qpn_dealloc\n+00002f50 T mlx5dv_sched_leaf_create\n+00003140 T mlx5dv_sched_leaf_destroy\n+00003050 T mlx5dv_sched_leaf_modify\n+000014e0 t mlx5dv_sched_nic_create\n+000013d0 t mlx5dv_sched_nic_modify\n+00002ed0 T mlx5dv_sched_node_create\n+000030d0 T mlx5dv_sched_node_destroy\n+00002fd0 T mlx5dv_sched_node_modify\n+000047e0 T mlx5dv_set_context_attr\n+         U mmap64\n+000011d0 t modify_ib_qp_sched_elem_init\n+000012d0 t modify_ib_qp_sched_elem_rts\n+00001900 t modify_qp_lag_port\n+00001720 t modify_raw_qp_sched_elem\n+         U munmap\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U pthread_spin_init\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_cl_qmap_init\n+         U rdmacore52_0_clean_dyn_uars\n+00003590 T rdmacore52_0_get_uar_mmap_offset\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_ibv_cmd_query_context\n+         U rdmacore52_0_is_mlx5_vfio_dev\n+         U rdmacore52_0_mlx5_advise_mr\n+         U rdmacore52_0_mlx5_alloc_dm\n+         U rdmacore52_0_mlx5_alloc_mw\n+         U rdmacore52_0_mlx5_alloc_null_mr\n+         U rdmacore52_0_mlx5_alloc_parent_domain\n+         U rdmacore52_0_mlx5_alloc_pd\n+         U rdmacore52_0_mlx5_alloc_td\n+         U rdmacore52_0_mlx5_arm_cq\n+         U rdmacore52_0_mlx5_async_event\n+         U rdmacore52_0_mlx5_attach_counters_point_flow\n+         U rdmacore52_0_mlx5_attach_mcast\n+         U rdmacore52_0_mlx5_bind_mw\n+00002850 T rdmacore52_0_mlx5_clear_mkey\n+000026e0 T rdmacore52_0_mlx5_clear_uidx\n+00002ad0 T rdmacore52_0_mlx5_close_debug_file\n+         U rdmacore52_0_mlx5_close_xrcd\n+00002540 T rdmacore52_0_mlx5_cmd_status_to_err\n+         U rdmacore52_0_mlx5_cq_event\n+         U rdmacore52_0_mlx5_create_ah\n+         U rdmacore52_0_mlx5_create_counters\n+         U rdmacore52_0_mlx5_create_cq\n+         U rdmacore52_0_mlx5_create_cq_ex\n+         U rdmacore52_0_mlx5_create_flow\n+         U rdmacore52_0_mlx5_create_flow_action_esp\n+000028d0 T rdmacore52_0_mlx5_create_psv\n+         U rdmacore52_0_mlx5_create_qp\n+         U rdmacore52_0_mlx5_create_qp_ex\n+         U rdmacore52_0_mlx5_create_rwq_ind_table\n+         U rdmacore52_0_mlx5_create_srq\n+         U rdmacore52_0_mlx5_create_srq_ex\n+         U rdmacore52_0_mlx5_create_wq\n+         U rdmacore52_0_mlx5_dealloc_mw\n+         U rdmacore52_0_mlx5_dealloc_td\n+00000004 B rdmacore52_0_mlx5_debug_mask\n+         U rdmacore52_0_mlx5_dereg_mr\n+         U rdmacore52_0_mlx5_destroy_ah\n+         U rdmacore52_0_mlx5_destroy_counters\n+         U rdmacore52_0_mlx5_destroy_cq\n+         U rdmacore52_0_mlx5_destroy_flow\n+         U rdmacore52_0_mlx5_destroy_flow_action\n+00002a00 T rdmacore52_0_mlx5_destroy_psv\n+         U rdmacore52_0_mlx5_destroy_qp\n+         U rdmacore52_0_mlx5_destroy_rwq_ind_table\n+         U rdmacore52_0_mlx5_destroy_srq\n+         U rdmacore52_0_mlx5_destroy_wq\n+         U rdmacore52_0_mlx5_detach_mcast\n+00002760 T rdmacore52_0_mlx5_find_mkey\n+         U rdmacore52_0_mlx5_free_dm\n+         U rdmacore52_0_mlx5_free_pd\n+00000000 B rdmacore52_0_mlx5_freeze_on_error_cqe\n+00002570 T rdmacore52_0_mlx5_get_cmd_status_err\n+00004970 T rdmacore52_0_mlx5_get_dv_ops\n+         U rdmacore52_0_mlx5_get_srq_num\n+00000060 R rdmacore52_0_mlx5_hca_table\n+         U rdmacore52_0_mlx5_import_dm\n+         U rdmacore52_0_mlx5_import_mr\n+         U rdmacore52_0_mlx5_import_pd\n+000035d0 T rdmacore52_0_mlx5_mmap\n+         U rdmacore52_0_mlx5_modify_cq\n+         U rdmacore52_0_mlx5_modify_flow_action_esp\n+         U rdmacore52_0_mlx5_modify_qp\n+00003240 T rdmacore52_0_mlx5_modify_qp_drain_sigerr\n+         U rdmacore52_0_mlx5_modify_qp_rate_limit\n+         U rdmacore52_0_mlx5_modify_srq\n+         U rdmacore52_0_mlx5_modify_wq\n+00002a50 T rdmacore52_0_mlx5_open_debug_file\n+         U rdmacore52_0_mlx5_open_qp\n+         U rdmacore52_0_mlx5_open_xrcd\n+         U rdmacore52_0_mlx5_poll_cq\n+         U rdmacore52_0_mlx5_poll_cq_v1\n+         U rdmacore52_0_mlx5_post_recv\n+         U rdmacore52_0_mlx5_post_send\n+         U rdmacore52_0_mlx5_post_srq_ops\n+         U rdmacore52_0_mlx5_post_srq_recv\n+         U rdmacore52_0_mlx5_query_device_ctx\n+         U rdmacore52_0_mlx5_query_device_ex\n+         U rdmacore52_0_mlx5_query_ece\n+         U rdmacore52_0_mlx5_query_port\n+         U rdmacore52_0_mlx5_query_qp\n+         U rdmacore52_0_mlx5_query_qp_data_in_order\n+         U rdmacore52_0_mlx5_query_rt_values\n+         U rdmacore52_0_mlx5_query_srq\n+         U rdmacore52_0_mlx5_read_counters\n+         U rdmacore52_0_mlx5_reg_dm_mr\n+         U rdmacore52_0_mlx5_reg_dmabuf_mr\n+         U rdmacore52_0_mlx5_reg_mr\n+         U rdmacore52_0_mlx5_rereg_mr\n+         U rdmacore52_0_mlx5_resize_cq\n+00002b10 T rdmacore52_0_mlx5_set_debug_mask\n+         U rdmacore52_0_mlx5_set_dv_ctx_ops\n+         U rdmacore52_0_mlx5_set_ece\n+         U rdmacore52_0_mlx5_set_singleton_nc_uar\n+         U rdmacore52_0_mlx5_single_threaded\n+         U rdmacore52_0_mlx5_stall_cq_dec_step\n+         U rdmacore52_0_mlx5_stall_cq_inc_step\n+         U rdmacore52_0_mlx5_stall_cq_poll_max\n+         U rdmacore52_0_mlx5_stall_cq_poll_min\n+         U rdmacore52_0_mlx5_stall_num_loop\n+000027a0 T rdmacore52_0_mlx5_store_mkey\n+000025b0 T rdmacore52_0_mlx5_store_uidx\n+         U rdmacore52_0_mlx5_unimport_dm\n+         U rdmacore52_0_mlx5_unimport_mr\n+         U rdmacore52_0_mlx5_unimport_pd\n+         U rdmacore52_0_verbs_open_device\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+         U sched_getaffinity\n+         U stderr\n+         U strchr\n+         U strncpy\n+         U strrchr\n+         U sysconf\n+00000000 D verbs_provider_mlx5\n+\n+dbrec.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U free\n+         U malloc\n+         U memset\n+00000000 t mlx5_alloc_dbrec.cold\n+00000007 t mlx5_free_db.cold\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_cl_qmap_get\n+         U rdmacore52_0_cl_qmap_insert\n+         U rdmacore52_0_cl_qmap_remove_item\n+         U rdmacore52_0_mlx5_alloc_buf\n+         U rdmacore52_0_mlx5_alloc_buf_extern\n+00000000 T rdmacore52_0_mlx5_alloc_dbrec\n+         U rdmacore52_0_mlx5_free_buf\n+         U rdmacore52_0_mlx5_free_buf_extern\n+00000240 T rdmacore52_0_mlx5_free_db\n+         U rdmacore52_0_mlx5_is_custom_alloc\n+         U rdmacore52_0_mlx5_is_extern_alloc\n+\n+verbs.c.o:\n+00005370 t .L788\n+000053d0 t .L802\n+000053e8 t .L804\n+00005400 t .L805\n+00005418 t .L806\n+00005438 t .L807\n+000054a0 t .L809\n+000054ea t .L810\n+000054f3 t .L812\n+000054fc t .L813\n+00005505 t .L814\n+00005496 t .L815\n+000060a0 t .L904\n+00006110 t .L906\n+00006168 t .L907\n+000061d0 t .L908\n+00006220 t .L909\n+00006248 t .L910\n+000062a0 t .L911\n+00005cb0 t .L922\n+00005de0 t .L924\n+00005e80 t .L925\n+00005ee0 t .L926\n+00005f30 t .L927\n+00005f58 t .L928\n+00005fb0 t .L929\n+00006300 t .L957\n+00006008 t .L966\n+00000041 r .LC10\n+0000004e r .LC11\n+00000056 r .LC12\n+0000006a r .LC13\n+0000007c r .LC14\n+00000000 r .LC16\n+00000083 r .LC17\n+0000008c r .LC18\n+0000008b r .LC19\n+0000009e r .LC20\n+00000000 r .LC3\n+00000013 r .LC4\n+0000001b r .LC5\n+00000029 r .LC7\n+00000031 r .LC8\n+00000039 r .LC9\n+00000120 r CSWTCH.373\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+00000154 r __func__.0\n+00000168 r __func__.2\n+         U __memcpy_chk\n+00001de0 t __mlx5dv_query_port\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U __vfprintf_chk\n+00001360 t _mlx5dv_alloc_dm\n+000006e0 t _mlx5dv_alloc_var\n+00007220 t _mlx5dv_create_cq\n+00000f30 t _mlx5dv_create_flow_action_esp\n+00004890 t _mlx5dv_create_flow_action_modify_header\n+00002ce0 t _mlx5dv_create_flow_action_packet_reformat\n+000025e0 t _mlx5dv_create_flow_matcher\n+00007280 t _mlx5dv_create_mkey\n+00009330 t _mlx5dv_create_qp\n+00001900 t _mlx5dv_create_steering_anchor\n+00006ba0 t _mlx5dv_create_wq\n+00003320 t _mlx5dv_crypto_login\n+00003290 t _mlx5dv_crypto_login_create\n+00002920 t _mlx5dv_crypto_login_destroy\n+00001ce0 t _mlx5dv_crypto_login_query\n+00001c40 t _mlx5dv_crypto_login_query_state\n+00002980 t _mlx5dv_crypto_logout\n+00004c70 t _mlx5dv_dek_create\n+000028c0 t _mlx5dv_dek_destroy\n+00002020 t _mlx5dv_dek_query\n+00000320 t _mlx5dv_destroy_flow_matcher\n+00003400 t _mlx5dv_destroy_mkey\n+00000270 t _mlx5dv_destroy_steering_anchor\n+00001650 t _mlx5dv_devx_alloc_uar\n+00004210 t _mlx5dv_devx_cq_modify\n+000043b0 t _mlx5dv_devx_cq_query\n+00000530 t _mlx5dv_devx_create_cmd_comp\n+00001ee0 t _mlx5dv_devx_create_event_channel\n+000018d0 t _mlx5dv_devx_destroy_cmd_comp\n+00001090 t _mlx5dv_devx_destroy_event_channel\n+00001ad0 t _mlx5dv_devx_free_uar\n+00002140 t _mlx5dv_devx_general_cmd\n+000011d0 t _mlx5dv_devx_get_async_cmd_comp\n+000010c0 t _mlx5dv_devx_get_event\n+00003510 t _mlx5dv_devx_ind_tbl_modify\n+000036b0 t _mlx5dv_devx_ind_tbl_query\n+00005160 t _mlx5dv_devx_obj_create\n+00000630 t _mlx5dv_devx_obj_destroy\n+00004550 t _mlx5dv_devx_obj_modify\n+000046f0 t _mlx5dv_devx_obj_query\n+00004a70 t _mlx5dv_devx_obj_query_async\n+00003ed0 t _mlx5dv_devx_qp_modify\n+00004070 t _mlx5dv_devx_qp_query\n+00001d10 t _mlx5dv_devx_query_eqn\n+00003b90 t _mlx5dv_devx_srq_modify\n+00003d30 t _mlx5dv_devx_srq_query\n+00002420 t _mlx5dv_devx_subscribe_devx_event\n+000022c0 t _mlx5dv_devx_subscribe_devx_event_fd\n+00001110 t _mlx5dv_devx_umem_dereg\n+000063b0 t _mlx5dv_devx_umem_reg\n+00002a10 t _mlx5dv_devx_umem_reg_ex\n+00003850 t _mlx5dv_devx_wq_modify\n+000039f0 t _mlx5dv_devx_wq_query\n+00002f40 t _mlx5dv_dm_map_op_addr\n+00000490 t _mlx5dv_free_var\n+000058f0 t _mlx5dv_map_ah_to_qp\n+0000f3a0 T _mlx5dv_mkey_check\n+00004ef0 t _mlx5dv_pp_alloc\n+000003f0 t _mlx5dv_pp_free\n+0000e0d0 T _mlx5dv_query_port\n          U abort\n-00000350 t alloc_cmd_box\n-         U basename\n          U calloc\n          U close\n-00000000 b curr.0\n-         U eventfd\n+00006bc0 t create_cq\n+00007830 t create_qp\n+00000000 t create_qp.cold\n+000065d0 t create_wq\n+000030e0 t crypto_login_create\n+00001b40 t crypto_login_query\n          U free\n-         U gettimeofday\n+         U fwrite\n+00005530 t get_hca_general_caps\n+         U getenv\n+00000178 r ib_to_mlx5_rate_table\n          U ibv_dofork_range\n          U ibv_dontfork_range\n-         U ioctl\n+         U ibv_query_port\n+         U ibv_resolve_eth_l2_from_gid\n+         U malloc\n          U memcpy\n          U memset\n-00000070 t mlx5_err\n-00005840 t mlx5_vfio_alloc_context\n-00005410 t mlx5_vfio_alloc_pd\n-00001270 t mlx5_vfio_clean_cmd_interface\n-00000f90 t mlx5_vfio_clean_device_dma\n-000006c0 t mlx5_vfio_cmd_check\n-00000b20 t mlx5_vfio_cmd_comp\n-000026d0 t mlx5_vfio_cmd_do\n-00001f00 t mlx5_vfio_cmd_exec.constprop.0\n-00000040 d mlx5_vfio_common_ops\n-000051d0 t mlx5_vfio_dealloc_pd\n-000074c0 t mlx5_vfio_dereg_mr\n-00000000 d mlx5_vfio_dev_ops\n-00000000 d mlx5_vfio_dv_ctx_ops\n-00000b90 t mlx5_vfio_enable_pci_cmd\n-00001610 t mlx5_vfio_enlarge_cmd_msg\n-000010b0 t mlx5_vfio_free_cmd_slot\n-000041f0 t mlx5_vfio_free_context\n-000004c0 t mlx5_vfio_free_page\n-000036d0 t mlx5_vfio_get_caps_mode\n-00000cb0 t mlx5_vfio_get_iommu_group_id\n-00002050 t mlx5_vfio_give_pages\n-00000170 t mlx5_vfio_new_block\n-000018a0 t mlx5_vfio_post_cmd\n-000023b0 t mlx5_vfio_process_async_events\n-00001bd0 t mlx5_vfio_process_page_request_comp\n-000038c0 t mlx5_vfio_reg_mr\n-00005660 t mlx5_vfio_satisfy_startup_pages\n-00004d20 t mlx5_vfio_setup_cmd_slot\n-00004010 t mlx5_vfio_teardown_hca.isra.0\n-00000120 t mlx5_vfio_uninit_device\n-00007eb0 T mlx5dv_get_vfio_device_list\n-00007a20 T mlx5dv_vfio_get_events_fd\n-00007a30 T mlx5dv_vfio_process_events\n+000009a0 t mlx5_alloc_dyn_uar\n+00000f00 t mlx5_err\n+000008a0 t mlx5_free_uar\n+00000c90 t mlx5_insert_dyn_uuars\n+00001220 t mlx5_memcpy_from_dm\n+000012c0 t mlx5_memcpy_to_dm\n+0000d7b0 T mlx5dv_alloc_dm\n+0000f7d0 T mlx5dv_alloc_var\n+0000a020 T mlx5dv_create_cq\n+0000dc20 T mlx5dv_create_flow\n+0000d2f0 T mlx5dv_create_flow_action_esp\n+0000d3a0 T mlx5dv_create_flow_action_modify_header\n+0000d420 T mlx5dv_create_flow_action_packet_reformat\n+0000db70 T mlx5dv_create_flow_matcher\n+0000f2f0 T mlx5dv_create_mkey\n+0000b9b0 T mlx5dv_create_qp\n+0000dc90 T mlx5dv_create_steering_anchor\n+0000cac0 T mlx5dv_create_wq\n+0000f4e0 T mlx5dv_crypto_login\n+0000f5d0 T mlx5dv_crypto_login_create\n+0000f680 T mlx5dv_crypto_login_destroy\n+0000f630 T mlx5dv_crypto_login_query\n+0000f530 T mlx5dv_crypto_login_query_state\n+0000f580 T mlx5dv_crypto_logout\n+0000f6d0 T mlx5dv_dek_create\n+0000f780 T mlx5dv_dek_destroy\n+0000f730 T mlx5dv_dek_query\n+0000dbd0 T mlx5dv_destroy_flow_matcher\n+0000f350 T mlx5dv_destroy_mkey\n+0000dcf0 T mlx5dv_destroy_steering_anchor\n+0000f950 T mlx5dv_devx_alloc_msi_vector\n+0000e260 T mlx5dv_devx_alloc_uar\n+0000e3e0 T mlx5dv_devx_cq_modify\n+0000e360 T mlx5dv_devx_cq_query\n+0000ef90 T mlx5dv_devx_create_cmd_comp\n+0000fa00 T mlx5dv_devx_create_eq\n+0000f010 T mlx5dv_devx_create_event_channel\n+0000efe0 T mlx5dv_devx_destroy_cmd_comp\n+0000fa90 T mlx5dv_devx_destroy_eq\n+0000f070 T mlx5dv_devx_destroy_event_channel\n+0000f9b0 T mlx5dv_devx_free_msi_vector\n+0000e2c0 T mlx5dv_devx_free_uar\n+0000e050 T mlx5dv_devx_general_cmd\n+0000f250 T mlx5dv_devx_get_async_cmd_comp\n+0000f2a0 T mlx5dv_devx_get_event\n+0000ef10 T mlx5dv_devx_ind_tbl_modify\n+0000ee90 T mlx5dv_devx_ind_tbl_query\n+0000de70 T mlx5dv_devx_obj_create\n+0000e000 T mlx5dv_devx_obj_destroy\n+0000df80 T mlx5dv_devx_obj_modify\n+0000df00 T mlx5dv_devx_obj_query\n+0000f1b0 T mlx5dv_devx_obj_query_async\n+0000e4e0 T mlx5dv_devx_qp_modify\n+0000e460 T mlx5dv_devx_qp_query\n+0000e300 T mlx5dv_devx_query_eqn\n+0000ed10 T mlx5dv_devx_srq_modify\n+0000ec90 T mlx5dv_devx_srq_query\n+0000f0b0 T mlx5dv_devx_subscribe_devx_event\n+0000f140 T mlx5dv_devx_subscribe_devx_event_fd\n+0000de20 T mlx5dv_devx_umem_dereg\n+0000dda0 T mlx5dv_devx_umem_reg\n+0000dd40 T mlx5dv_devx_umem_reg_ex\n+0000ee10 T mlx5dv_devx_wq_modify\n+0000ed90 T mlx5dv_devx_wq_query\n+0000d500 T mlx5dv_dm_map_op_addr\n+0000f830 T mlx5dv_free_var\n+0000b8f0 T mlx5dv_map_ah_to_qp\n+0000f880 T mlx5dv_pp_alloc\n+0000f900 T mlx5dv_pp_free\n+0000ba20 T mlx5dv_qp_ex_from_ibv_qp_ex\n          U mmap64\n          U munmap\n-         U open64\n-         U poll\n          U posix_memalign\n          U pthread_mutex_init\n          U pthread_mutex_lock\n          U pthread_mutex_unlock\n-         U pwrite64\n+         U pthread_spin_destroy\n+         U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+         U rdmacore52_0___mlx5_cq_clean\n 00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_bitmap_find_first_bit\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+00005ad0 T rdmacore52_0__mlx5dv_create_flow\n+0000e140 T rdmacore52_0_clean_dyn_uars\n+         U rdmacore52_0_execute_ioctl\n+         U rdmacore52_0_get_random\n+         U rdmacore52_0_get_uar_mmap_offset\n+         U rdmacore52_0_ibv_cmd_advise_mr\n+         U rdmacore52_0_ibv_cmd_alloc_dm\n+         U rdmacore52_0_ibv_cmd_alloc_mw\n+         U rdmacore52_0_ibv_cmd_alloc_pd\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_close_xrcd\n+         U rdmacore52_0_ibv_cmd_create_ah\n+         U rdmacore52_0_ibv_cmd_create_counters\n+         U rdmacore52_0_ibv_cmd_create_cq_ex\n+         U rdmacore52_0_ibv_cmd_create_flow\n+         U rdmacore52_0_ibv_cmd_create_flow_action_esp\n+         U rdmacore52_0_ibv_cmd_create_qp_ex\n+         U rdmacore52_0_ibv_cmd_create_qp_ex2\n+         U rdmacore52_0_ibv_cmd_create_rwq_ind_table\n+         U rdmacore52_0_ibv_cmd_create_srq\n+         U rdmacore52_0_ibv_cmd_create_srq_ex\n+         U rdmacore52_0_ibv_cmd_create_wq\n+         U rdmacore52_0_ibv_cmd_dealloc_mw\n+         U rdmacore52_0_ibv_cmd_dealloc_pd\n+         U rdmacore52_0_ibv_cmd_dereg_mr\n+         U rdmacore52_0_ibv_cmd_destroy_ah\n+         U rdmacore52_0_ibv_cmd_destroy_counters\n+         U rdmacore52_0_ibv_cmd_destroy_cq\n+         U rdmacore52_0_ibv_cmd_destroy_flow\n+         U rdmacore52_0_ibv_cmd_destroy_flow_action\n+         U rdmacore52_0_ibv_cmd_destroy_qp\n+         U rdmacore52_0_ibv_cmd_destroy_rwq_ind_table\n+         U rdmacore52_0_ibv_cmd_destroy_srq\n+         U rdmacore52_0_ibv_cmd_destroy_wq\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_free_dm\n+         U rdmacore52_0_ibv_cmd_modify_cq\n+         U rdmacore52_0_ibv_cmd_modify_flow_action_esp\n+         U rdmacore52_0_ibv_cmd_modify_qp\n+         U rdmacore52_0_ibv_cmd_modify_qp_ex\n+         U rdmacore52_0_ibv_cmd_modify_srq\n+         U rdmacore52_0_ibv_cmd_modify_wq\n+         U rdmacore52_0_ibv_cmd_open_qp\n+         U rdmacore52_0_ibv_cmd_open_xrcd\n+         U rdmacore52_0_ibv_cmd_query_device_any\n+         U rdmacore52_0_ibv_cmd_query_mr\n+         U rdmacore52_0_ibv_cmd_query_port\n+         U rdmacore52_0_ibv_cmd_query_qp\n+         U rdmacore52_0_ibv_cmd_query_srq\n+         U rdmacore52_0_ibv_cmd_read_counters\n+         U rdmacore52_0_ibv_cmd_reg_dm_mr\n+         U rdmacore52_0_ibv_cmd_reg_dmabuf_mr\n+         U rdmacore52_0_ibv_cmd_reg_mr\n+         U rdmacore52_0_ibv_cmd_rereg_mr\n+         U rdmacore52_0_ibv_cmd_resize_cq\n+         U rdmacore52_0_ibv_query_gid_type\n          U rdmacore52_0_ilog64\n-00007ff0 T rdmacore52_0_is_mlx5_vfio_dev\n-         U rdmacore52_0_iset_alloc_range\n-         U rdmacore52_0_iset_create\n-         U rdmacore52_0_iset_destroy\n-         U rdmacore52_0_iset_insert_range\n-         U rdmacore52_0_mlx5_close_debug_file\n-         U rdmacore52_0_mlx5_cmd_status_to_err\n-         U rdmacore52_0_mlx5_hca_table\n-         U rdmacore52_0_mlx5_open_debug_file\n-         U rdmacore52_0_mlx5_set_debug_mask\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n+00009c20 T rdmacore52_0_mlx5_advise_mr\n+         U rdmacore52_0_mlx5_alloc_cq_buf\n+         U rdmacore52_0_mlx5_alloc_dbrec\n+0000d890 T rdmacore52_0_mlx5_alloc_dm\n+00009e80 T rdmacore52_0_mlx5_alloc_mw\n+00009a20 T rdmacore52_0_mlx5_alloc_null_mr\n+00009710 T rdmacore52_0_mlx5_alloc_parent_domain\n+00009440 T rdmacore52_0_mlx5_alloc_pd\n+         U rdmacore52_0_mlx5_alloc_prefered_buf\n+         U rdmacore52_0_mlx5_alloc_srq_buf\n+000094f0 T rdmacore52_0_mlx5_alloc_td\n+00009420 T rdmacore52_0_mlx5_async_event\n+0000da60 T rdmacore52_0_mlx5_attach_counters_point_flow\n+0000b940 T rdmacore52_0_mlx5_attach_mcast\n+         U rdmacore52_0_mlx5_clear_mkey\n+         U rdmacore52_0_mlx5_clear_qp\n+         U rdmacore52_0_mlx5_clear_srq\n+         U rdmacore52_0_mlx5_clear_uidx\n+0000bba0 T rdmacore52_0_mlx5_close_xrcd\n+         U rdmacore52_0_mlx5_cq_clean\n+         U rdmacore52_0_mlx5_cq_fill_pfns\n+         U rdmacore52_0_mlx5_cq_resize_copy_cqes\n+0000b510 T rdmacore52_0_mlx5_create_ah\n+0000d930 T rdmacore52_0_mlx5_create_counters\n+00009f50 T rdmacore52_0_mlx5_create_cq\n+0000a000 T rdmacore52_0_mlx5_create_cq_ex\n+0000ce00 T rdmacore52_0_mlx5_create_flow\n+0000d260 T rdmacore52_0_mlx5_create_flow_action_esp\n+         U rdmacore52_0_mlx5_create_psv\n+0000a9b0 T rdmacore52_0_mlx5_create_qp\n+0000b9a0 T rdmacore52_0_mlx5_create_qp_ex\n+0000d100 T rdmacore52_0_mlx5_create_rwq_ind_table\n+0000a470 T rdmacore52_0_mlx5_create_srq\n+0000bbf0 T rdmacore52_0_mlx5_create_srq_ex\n+0000cab0 T rdmacore52_0_mlx5_create_wq\n+00009f10 T rdmacore52_0_mlx5_dealloc_mw\n+00009630 T rdmacore52_0_mlx5_dealloc_td\n+00009be0 T rdmacore52_0_mlx5_dereg_mr\n+0000b880 T rdmacore52_0_mlx5_destroy_ah\n+0000d9e0 T rdmacore52_0_mlx5_destroy_counters\n+0000a3d0 T rdmacore52_0_mlx5_destroy_cq\n+0000d0a0 T rdmacore52_0_mlx5_destroy_flow\n+0000d4b0 T rdmacore52_0_mlx5_destroy_flow_action\n+         U rdmacore52_0_mlx5_destroy_psv\n+0000aab0 T rdmacore52_0_mlx5_destroy_qp\n+0000d1c0 T rdmacore52_0_mlx5_destroy_rwq_ind_table\n+0000b0a0 T rdmacore52_0_mlx5_destroy_srq\n+0000ccb0 T rdmacore52_0_mlx5_destroy_wq\n+0000b970 T rdmacore52_0_mlx5_detach_mcast\n+         U rdmacore52_0_mlx5_free_actual_buf\n+         U rdmacore52_0_mlx5_free_cq_buf\n+         U rdmacore52_0_mlx5_free_db\n+0000d820 T rdmacore52_0_mlx5_free_dm\n+000097c0 T rdmacore52_0_mlx5_free_pd\n+         U rdmacore52_0_mlx5_get_alloc_type\n+         U rdmacore52_0_mlx5_get_cmd_status_err\n+         U rdmacore52_0_mlx5_get_dv_ops\n+0000ba30 T rdmacore52_0_mlx5_get_srq_num\n+0000d5a0 T rdmacore52_0_mlx5_import_dm\n+00009e00 T rdmacore52_0_mlx5_import_mr\n+00009c50 T rdmacore52_0_mlx5_import_pd\n+         U rdmacore52_0_mlx5_init_qp_indices\n+         U rdmacore52_0_mlx5_init_rwq_indices\n+0000d200 T rdmacore52_0_mlx5_modify_cq\n+0000d360 T rdmacore52_0_mlx5_modify_flow_action_esp\n+0000e5e0 T rdmacore52_0_mlx5_modify_qp\n+         U rdmacore52_0_mlx5_modify_qp_drain_sigerr\n+0000b400 T rdmacore52_0_mlx5_modify_qp_rate_limit\n+0000a860 T rdmacore52_0_mlx5_modify_srq\n+0000cb30 T rdmacore52_0_mlx5_modify_wq\n+0000ba50 T rdmacore52_0_mlx5_open_qp\n+0000baf0 T rdmacore52_0_mlx5_open_xrcd\n+         U rdmacore52_0_mlx5_post_wq_recv\n+         U rdmacore52_0_mlx5_qp_fill_wr_complete_error\n+         U rdmacore52_0_mlx5_qp_fill_wr_complete_real\n+         U rdmacore52_0_mlx5_qp_fill_wr_pfns\n+0000c660 T rdmacore52_0_mlx5_query_device_ctx\n+0000c3e0 T rdmacore52_0_mlx5_query_device_ex\n+0000a980 T rdmacore52_0_mlx5_query_ece\n+000093d0 T rdmacore52_0_mlx5_query_port\n+0000b350 T rdmacore52_0_mlx5_query_qp\n+0000b1c0 T rdmacore52_0_mlx5_query_qp_data_in_order\n+00009350 T rdmacore52_0_mlx5_query_rt_values\n+0000a8b0 T rdmacore52_0_mlx5_query_srq\n+0000db40 T rdmacore52_0_mlx5_read_counters\n+00009ab0 T rdmacore52_0_mlx5_reg_dm_mr\n+00009990 T rdmacore52_0_mlx5_reg_dmabuf_mr\n+000098c0 T rdmacore52_0_mlx5_reg_mr\n+00009b60 T rdmacore52_0_mlx5_rereg_mr\n+0000a090 T rdmacore52_0_mlx5_resize_cq\n+0000fae0 T rdmacore52_0_mlx5_set_dv_ctx_ops\n+0000a900 T rdmacore52_0_mlx5_set_ece\n+000096b0 T rdmacore52_0_mlx5_set_singleton_nc_uar\n+00000000 B rdmacore52_0_mlx5_single_threaded\n+         U rdmacore52_0_mlx5_store_mkey\n+         U rdmacore52_0_mlx5_store_qp\n+         U rdmacore52_0_mlx5_store_srq\n+         U rdmacore52_0_mlx5_store_uidx\n+0000d560 T rdmacore52_0_mlx5_unimport_dm\n+00009e60 T rdmacore52_0_mlx5_unimport_mr\n+00009d80 T rdmacore52_0_mlx5_unimport_pd\n+         U rdmacore52_0_mlx5_use_huge\n+         U rdmacore52_0_verbs_allow_disassociate_destroy\n+         U rdmacore52_0_verbs_init_cq\n          U read\n-         U readlink\n-         U realloc\n-         U sched_yield\n-00000008 b start.1\n-         U stat64\n-         U strdup\n-         U strlen\n-         U sysconf\n-         U usleep\n-00000960 t vfio_devx_alloc_msi_vector\n-000000a0 t vfio_devx_alloc_uar\n-00004460 t vfio_devx_create_eq\n-00007220 t vfio_devx_destroy_eq\n-000007f0 t vfio_devx_free_msi_vector\n-00000150 t vfio_devx_free_uar\n-00003660 t vfio_devx_general_cmd\n-00002b40 t vfio_devx_obj_create\n-00003820 t vfio_devx_obj_destroy\n-00003690 t vfio_devx_obj_modify\n-00002b00 t vfio_devx_obj_query\n-00000000 t vfio_devx_query_eqn\n-00007770 t vfio_devx_umem_dereg\n-00004cf0 t vfio_devx_umem_reg\n-00004c90 t vfio_devx_umem_reg_ex\n-00000030 t vfio_init_obj\n-         U write\n-\n-str.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0_strcount\n-         U strlen\n-         U strstr\n+00000000 t sq_overhead\n+         U stderr\n+         U strtol\n \n ilog.c.o:\n 00000000 r DEBRUIJN_IDX32\n          U _GLOBAL_OFFSET_TABLE_\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n@@ -3182,7 +3175,14 @@\n          U abort\n 00000000 t list_check_node.part.0\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n 00000000 T rdmacore52_0___x86.get_pc_thunk.di\n 000000f0 T rdmacore52_0_list_check\n 00000040 T rdmacore52_0_list_check_node\n          U stderr\n+\n+str.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0_strcount\n+         U strlen\n+         U strstr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,30 +1,30 @@\n ----------   0        0        0    18684 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    44264 1970-01-01 00:00:00.000000 mlx5.c.o\n ?rw-r--r--   0        0        0    17740 1970-01-01 00:00:00.000000 dr_rule.c.o\n-?rw-r--r--   0        0        0    55836 1970-01-01 00:00:00.000000 dr_ste_v1.c.o\n-?rw-r--r--   0        0        0     3300 1970-01-01 00:00:00.000000 dbrec.c.o\n-?rw-r--r--   0        0        0    71384 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r--   0        0        0   116400 1970-01-01 00:00:00.000000 verbs.c.o\n-?rw-r--r--   0        0        0    14940 1970-01-01 00:00:00.000000 dr_send.c.o\n+?rw-r--r--   0        0        0    14936 1970-01-01 00:00:00.000000 dr_dbg.c.o\n ?rw-r--r--   0        0        0     1956 1970-01-01 00:00:00.000000 dr_crc32.c.o\n-?rw-r--r--   0        0        0     2984 1970-01-01 00:00:00.000000 dr_ste_v2.c.o\n-?rw-r--r--   0        0        0     7356 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r--   0        0        0     3976 1970-01-01 00:00:00.000000 dr_table.c.o\n-?rw-r--r--   0        0        0    15560 1970-01-01 00:00:00.000000 dr_devx.c.o\n-?rw-r--r--   0        0        0    22824 1970-01-01 00:00:00.000000 dr_matcher.c.o\n-?rw-r--r--   0        0        0     4048 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n+?rw-r--r--   0        0        0    28232 1970-01-01 00:00:00.000000 dr_ste.c.o\n ?rw-r--r--   0        0        0    32080 1970-01-01 00:00:00.000000 dr_action.c.o\n-?rw-r--r--   0        0        0     8048 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n+?rw-r--r--   0        0        0    10376 1970-01-01 00:00:00.000000 dr_domain.c.o\n+?rw-r--r--   0        0        0    14940 1970-01-01 00:00:00.000000 dr_send.c.o\n+?rw-r--r--   0        0        0     2984 1970-01-01 00:00:00.000000 dr_ste_v2.c.o\n+?rw-r--r--   0        0        0    71384 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r--   0        0        0     3484 1970-01-01 00:00:00.000000 dr_buddy.c.o\n-?rw-r--r--   0        0        0    10756 1970-01-01 00:00:00.000000 buf.c.o\n-?rw-r--r--   0        0        0     4396 1970-01-01 00:00:00.000000 dr_arg.c.o\n ?rw-r--r--   0        0        0     4036 1970-01-01 00:00:00.000000 dr_vports.c.o\n-?rw-r--r--   0        0        0    14936 1970-01-01 00:00:00.000000 dr_dbg.c.o\n+?rw-r--r--   0        0        0     7356 1970-01-01 00:00:00.000000 srq.c.o\n ?rw-r--r--   0        0        0    30864 1970-01-01 00:00:00.000000 dr_ste_v0.c.o\n-?rw-r--r--   0        0        0    28232 1970-01-01 00:00:00.000000 dr_ste.c.o\n-?rw-r--r--   0        0        0    10376 1970-01-01 00:00:00.000000 dr_domain.c.o\n-?rw-r--r--   0        0        0   159456 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r--   0        0        0     4048 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n+?rw-r--r--   0        0        0     3976 1970-01-01 00:00:00.000000 dr_table.c.o\n+?rw-r--r--   0        0        0    10756 1970-01-01 00:00:00.000000 buf.c.o\n+?rw-r--r--   0        0        0     8048 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n+?rw-r--r--   0        0        0    22824 1970-01-01 00:00:00.000000 dr_matcher.c.o\n+?rw-r--r--   0        0        0    15560 1970-01-01 00:00:00.000000 dr_devx.c.o\n+?rw-r--r--   0        0        0    55836 1970-01-01 00:00:00.000000 dr_ste_v1.c.o\n ?rw-r--r--   0        0        0    69360 1970-01-01 00:00:00.000000 mlx5_vfio.c.o\n-?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n+?rw-r--r--   0        0        0   159456 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r--   0        0        0     4396 1970-01-01 00:00:00.000000 dr_arg.c.o\n+?rw-r--r--   0        0        0    44264 1970-01-01 00:00:00.000000 mlx5.c.o\n+?rw-r--r--   0        0        0     3300 1970-01-01 00:00:00.000000 dbrec.c.o\n+?rw-r--r--   0        0        0   116400 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     2324 1970-01-01 00:00:00.000000 ilog.c.o\n ?rw-r--r--   0        0        0     2288 1970-01-01 00:00:00.000000 list.c.o\n+?rw-r--r--   0        0        0     1184 1970-01-01 00:00:00.000000 str.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libmthca-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libmthca-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,17 @@\n \n Archive index:\n+rdmacore52_0_mthca_alloc_db in memfree.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in memfree.c.o\n+rdmacore52_0_mthca_set_db_qn in memfree.c.o\n+rdmacore52_0_mthca_free_db in memfree.c.o\n+rdmacore52_0_mthca_alloc_db_tab in memfree.c.o\n+rdmacore52_0_mthca_free_db_tab in memfree.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in mthca.c.o\n+verbs_provider_mthca in mthca.c.o\n rdmacore52_0_mthca_alloc_av in ah.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in ah.c.o\n rdmacore52_0_mthca_free_av in ah.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ah.c.o\n rdmacore52_0_mthca_init_qp_indices in qp.c.o\n rdmacore52_0_mthca_tavor_post_send in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n@@ -13,40 +21,14 @@\n rdmacore52_0___x86.get_pc_thunk.ax in qp.c.o\n rdmacore52_0_mthca_alloc_qp_buf in qp.c.o\n rdmacore52_0_mthca_find_qp in qp.c.o\n rdmacore52_0_mthca_store_qp in qp.c.o\n rdmacore52_0_mthca_clear_qp in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.si in qp.c.o\n rdmacore52_0_mthca_free_err_wqe in qp.c.o\n-rdmacore52_0_mthca_alloc_db in memfree.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in memfree.c.o\n-rdmacore52_0_mthca_set_db_qn in memfree.c.o\n-rdmacore52_0_mthca_free_db in memfree.c.o\n-rdmacore52_0_mthca_alloc_db_tab in memfree.c.o\n-rdmacore52_0_mthca_free_db_tab in memfree.c.o\n-rdmacore52_0_mthca_query_device in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n-rdmacore52_0_mthca_query_port in verbs.c.o\n-rdmacore52_0_mthca_alloc_pd in verbs.c.o\n-rdmacore52_0_mthca_free_pd in verbs.c.o\n-rdmacore52_0_mthca_reg_mr in verbs.c.o\n-rdmacore52_0_mthca_dereg_mr in verbs.c.o\n-rdmacore52_0_mthca_create_cq in verbs.c.o\n-rdmacore52_0_mthca_resize_cq in verbs.c.o\n-rdmacore52_0_mthca_destroy_cq in verbs.c.o\n-rdmacore52_0_mthca_create_srq in verbs.c.o\n-rdmacore52_0_mthca_modify_srq in verbs.c.o\n-rdmacore52_0_mthca_query_srq in verbs.c.o\n-rdmacore52_0_mthca_destroy_srq in verbs.c.o\n-rdmacore52_0_mthca_create_qp in verbs.c.o\n-rdmacore52_0_mthca_query_qp in verbs.c.o\n-rdmacore52_0_mthca_modify_qp in verbs.c.o\n-rdmacore52_0_mthca_destroy_qp in verbs.c.o\n-rdmacore52_0_mthca_create_ah in verbs.c.o\n-rdmacore52_0_mthca_destroy_ah in verbs.c.o\n rdmacore52_0_mthca_free_srq_wqe in srq.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in srq.c.o\n rdmacore52_0_mthca_tavor_post_srq_recv in srq.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in srq.c.o\n rdmacore52_0_mthca_arbel_post_srq_recv in srq.c.o\n rdmacore52_0_mthca_alloc_srq_buf in srq.c.o\n rdmacore52_0_mthca_alloc_buf in buf.c.o\n@@ -59,16 +41,111 @@\n rdmacore52_0_mthca_arbel_arm_cq in cq.c.o\n rdmacore52_0_mthca_arbel_cq_event in cq.c.o\n rdmacore52_0___mthca_cq_clean in cq.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in cq.c.o\n rdmacore52_0_mthca_cq_clean in cq.c.o\n rdmacore52_0_mthca_cq_resize_copy_cqes in cq.c.o\n rdmacore52_0_mthca_alloc_cq_buf in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in mthca.c.o\n-verbs_provider_mthca in mthca.c.o\n+rdmacore52_0_mthca_query_device in verbs.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n+rdmacore52_0_mthca_query_port in verbs.c.o\n+rdmacore52_0_mthca_alloc_pd in verbs.c.o\n+rdmacore52_0_mthca_free_pd in verbs.c.o\n+rdmacore52_0_mthca_reg_mr in verbs.c.o\n+rdmacore52_0_mthca_dereg_mr in verbs.c.o\n+rdmacore52_0_mthca_create_cq in verbs.c.o\n+rdmacore52_0_mthca_resize_cq in verbs.c.o\n+rdmacore52_0_mthca_destroy_cq in verbs.c.o\n+rdmacore52_0_mthca_create_srq in verbs.c.o\n+rdmacore52_0_mthca_modify_srq in verbs.c.o\n+rdmacore52_0_mthca_query_srq in verbs.c.o\n+rdmacore52_0_mthca_destroy_srq in verbs.c.o\n+rdmacore52_0_mthca_create_qp in verbs.c.o\n+rdmacore52_0_mthca_query_qp in verbs.c.o\n+rdmacore52_0_mthca_modify_qp in verbs.c.o\n+rdmacore52_0_mthca_destroy_qp in verbs.c.o\n+rdmacore52_0_mthca_create_ah in verbs.c.o\n+rdmacore52_0_mthca_destroy_ah in verbs.c.o\n+\n+memfree.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U free\n+         U malloc\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_mthca_alloc_buf\n+00000000 T rdmacore52_0_mthca_alloc_db\n+00000580 T rdmacore52_0_mthca_alloc_db_tab\n+         U rdmacore52_0_mthca_free_buf\n+000004d0 T rdmacore52_0_mthca_free_db\n+00000610 T rdmacore52_0_mthca_free_db_tab\n+000004b0 T rdmacore52_0_mthca_set_db_qn\n+\n+mthca.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+         U free\n+00000000 r hca_table\n+         U mmap64\n+00000070 t mthca_alloc_context\n+00000140 d mthca_ctx_arbel_ops\n+00000280 d mthca_ctx_common_ops\n+00000000 d mthca_ctx_tavor_ops\n+00000000 d mthca_dev_ops\n+00000020 t mthca_device_alloc\n+000002a0 t mthca_free_context\n+00000000 t mthca_uninit_device\n+         U munmap\n+         U pthread_mutex_init\n+         U pthread_spin_init\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_ibv_cmd_attach_mcast\n+         U rdmacore52_0_ibv_cmd_detach_mcast\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_mthca_alloc_db_tab\n+         U rdmacore52_0_mthca_alloc_pd\n+         U rdmacore52_0_mthca_arbel_arm_cq\n+         U rdmacore52_0_mthca_arbel_cq_event\n+         U rdmacore52_0_mthca_arbel_post_recv\n+         U rdmacore52_0_mthca_arbel_post_send\n+         U rdmacore52_0_mthca_arbel_post_srq_recv\n+         U rdmacore52_0_mthca_create_ah\n+         U rdmacore52_0_mthca_create_cq\n+         U rdmacore52_0_mthca_create_qp\n+         U rdmacore52_0_mthca_create_srq\n+         U rdmacore52_0_mthca_dereg_mr\n+         U rdmacore52_0_mthca_destroy_ah\n+         U rdmacore52_0_mthca_destroy_cq\n+         U rdmacore52_0_mthca_destroy_qp\n+         U rdmacore52_0_mthca_destroy_srq\n+         U rdmacore52_0_mthca_free_db_tab\n+         U rdmacore52_0_mthca_free_pd\n+         U rdmacore52_0_mthca_modify_qp\n+         U rdmacore52_0_mthca_modify_srq\n+         U rdmacore52_0_mthca_poll_cq\n+         U rdmacore52_0_mthca_query_device\n+         U rdmacore52_0_mthca_query_port\n+         U rdmacore52_0_mthca_query_qp\n+         U rdmacore52_0_mthca_query_srq\n+         U rdmacore52_0_mthca_reg_mr\n+         U rdmacore52_0_mthca_resize_cq\n+         U rdmacore52_0_mthca_tavor_arm_cq\n+         U rdmacore52_0_mthca_tavor_post_recv\n+         U rdmacore52_0_mthca_tavor_post_send\n+         U rdmacore52_0_mthca_tavor_post_srq_recv\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+         U sysconf\n+00000000 D verbs_provider_mthca\n \n ah.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U free\n          U malloc\n          U memset\n          U pthread_mutex_lock\n@@ -104,96 +181,14 @@\n 00001640 T rdmacore52_0_mthca_find_qp\n 00001790 T rdmacore52_0_mthca_free_err_wqe\n 00000000 T rdmacore52_0_mthca_init_qp_indices\n 00001690 T rdmacore52_0_mthca_store_qp\n 00000660 T rdmacore52_0_mthca_tavor_post_recv\n 00000090 T rdmacore52_0_mthca_tavor_post_send\n \n-memfree.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U free\n-         U malloc\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_mthca_alloc_buf\n-00000000 T rdmacore52_0_mthca_alloc_db\n-00000580 T rdmacore52_0_mthca_alloc_db_tab\n-         U rdmacore52_0_mthca_free_buf\n-000004d0 T rdmacore52_0_mthca_free_db\n-00000610 T rdmacore52_0_mthca_free_db_tab\n-000004b0 T rdmacore52_0_mthca_set_db_qn\n-\n-verbs.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U free\n-         U malloc\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U pthread_spin_init\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-         U rdmacore52_0___mthca_cq_clean\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibv_cmd_alloc_pd\n-         U rdmacore52_0_ibv_cmd_create_cq\n-         U rdmacore52_0_ibv_cmd_create_qp\n-         U rdmacore52_0_ibv_cmd_create_srq\n-         U rdmacore52_0_ibv_cmd_dealloc_pd\n-         U rdmacore52_0_ibv_cmd_dereg_mr\n-         U rdmacore52_0_ibv_cmd_destroy_cq\n-         U rdmacore52_0_ibv_cmd_destroy_qp\n-         U rdmacore52_0_ibv_cmd_destroy_srq\n-         U rdmacore52_0_ibv_cmd_modify_qp\n-         U rdmacore52_0_ibv_cmd_modify_srq\n-         U rdmacore52_0_ibv_cmd_query_device_any\n-         U rdmacore52_0_ibv_cmd_query_port\n-         U rdmacore52_0_ibv_cmd_query_qp\n-         U rdmacore52_0_ibv_cmd_query_srq\n-         U rdmacore52_0_ibv_cmd_reg_mr\n-         U rdmacore52_0_ibv_cmd_resize_cq\n-         U rdmacore52_0_mthca_alloc_av\n-         U rdmacore52_0_mthca_alloc_cq_buf\n-         U rdmacore52_0_mthca_alloc_db\n-00000110 T rdmacore52_0_mthca_alloc_pd\n-         U rdmacore52_0_mthca_alloc_qp_buf\n-         U rdmacore52_0_mthca_alloc_srq_buf\n-         U rdmacore52_0_mthca_clear_qp\n-         U rdmacore52_0_mthca_cq_clean\n-         U rdmacore52_0_mthca_cq_resize_copy_cqes\n-00001740 T rdmacore52_0_mthca_create_ah\n-00000320 T rdmacore52_0_mthca_create_cq\n-00000e40 T rdmacore52_0_mthca_create_qp\n-000009c0 T rdmacore52_0_mthca_create_srq\n-000002e0 T rdmacore52_0_mthca_dereg_mr\n-000017a0 T rdmacore52_0_mthca_destroy_ah\n-00000910 T rdmacore52_0_mthca_destroy_cq\n-00001500 T rdmacore52_0_mthca_destroy_qp\n-00000da0 T rdmacore52_0_mthca_destroy_srq\n-         U rdmacore52_0_mthca_free_av\n-         U rdmacore52_0_mthca_free_buf\n-         U rdmacore52_0_mthca_free_db\n-000001d0 T rdmacore52_0_mthca_free_pd\n-         U rdmacore52_0_mthca_init_qp_indices\n-000013f0 T rdmacore52_0_mthca_modify_qp\n-00000d00 T rdmacore52_0_mthca_modify_srq\n-00000000 T rdmacore52_0_mthca_query_device\n-000000c0 T rdmacore52_0_mthca_query_port\n-00001390 T rdmacore52_0_mthca_query_qp\n-00000d50 T rdmacore52_0_mthca_query_srq\n-00000210 T rdmacore52_0_mthca_reg_mr\n-000006c0 T rdmacore52_0_mthca_resize_cq\n-         U rdmacore52_0_mthca_set_db_qn\n-         U rdmacore52_0_mthca_store_qp\n-\n srq.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U free\n          U malloc\n          U memset\n          U mmio_write64_be\n          U pthread_spin_lock\n@@ -265,67 +260,72 @@\n 00000c30 T rdmacore52_0_mthca_cq_resize_copy_cqes\n          U rdmacore52_0_mthca_find_qp\n          U rdmacore52_0_mthca_free_err_wqe\n          U rdmacore52_0_mthca_free_srq_wqe\n 00000000 T rdmacore52_0_mthca_poll_cq\n 000007d0 T rdmacore52_0_mthca_tavor_arm_cq\n \n-mthca.c.o:\n+verbs.c.o:\n+00000000 r .LC0\n          U _GLOBAL_OFFSET_TABLE_\n+         U __snprintf_chk\n          U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n          U free\n-00000000 r hca_table\n-         U mmap64\n-00000070 t mthca_alloc_context\n-00000140 d mthca_ctx_arbel_ops\n-00000280 d mthca_ctx_common_ops\n-00000000 d mthca_ctx_tavor_ops\n-00000000 d mthca_dev_ops\n-00000020 t mthca_device_alloc\n-000002a0 t mthca_free_context\n-00000000 t mthca_uninit_device\n-         U munmap\n+         U malloc\n          U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n          U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+         U rdmacore52_0___mthca_cq_clean\n 00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_ibv_cmd_attach_mcast\n-         U rdmacore52_0_ibv_cmd_detach_mcast\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_mthca_alloc_db_tab\n-         U rdmacore52_0_mthca_alloc_pd\n-         U rdmacore52_0_mthca_arbel_arm_cq\n-         U rdmacore52_0_mthca_arbel_cq_event\n-         U rdmacore52_0_mthca_arbel_post_recv\n-         U rdmacore52_0_mthca_arbel_post_send\n-         U rdmacore52_0_mthca_arbel_post_srq_recv\n-         U rdmacore52_0_mthca_create_ah\n-         U rdmacore52_0_mthca_create_cq\n-         U rdmacore52_0_mthca_create_qp\n-         U rdmacore52_0_mthca_create_srq\n-         U rdmacore52_0_mthca_dereg_mr\n-         U rdmacore52_0_mthca_destroy_ah\n-         U rdmacore52_0_mthca_destroy_cq\n-         U rdmacore52_0_mthca_destroy_qp\n-         U rdmacore52_0_mthca_destroy_srq\n-         U rdmacore52_0_mthca_free_db_tab\n-         U rdmacore52_0_mthca_free_pd\n-         U rdmacore52_0_mthca_modify_qp\n-         U rdmacore52_0_mthca_modify_srq\n-         U rdmacore52_0_mthca_poll_cq\n-         U rdmacore52_0_mthca_query_device\n-         U rdmacore52_0_mthca_query_port\n-         U rdmacore52_0_mthca_query_qp\n-         U rdmacore52_0_mthca_query_srq\n-         U rdmacore52_0_mthca_reg_mr\n-         U rdmacore52_0_mthca_resize_cq\n-         U rdmacore52_0_mthca_tavor_arm_cq\n-         U rdmacore52_0_mthca_tavor_post_recv\n-         U rdmacore52_0_mthca_tavor_post_send\n-         U rdmacore52_0_mthca_tavor_post_srq_recv\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-         U sysconf\n-00000000 D verbs_provider_mthca\n+         U rdmacore52_0_ibv_cmd_alloc_pd\n+         U rdmacore52_0_ibv_cmd_create_cq\n+         U rdmacore52_0_ibv_cmd_create_qp\n+         U rdmacore52_0_ibv_cmd_create_srq\n+         U rdmacore52_0_ibv_cmd_dealloc_pd\n+         U rdmacore52_0_ibv_cmd_dereg_mr\n+         U rdmacore52_0_ibv_cmd_destroy_cq\n+         U rdmacore52_0_ibv_cmd_destroy_qp\n+         U rdmacore52_0_ibv_cmd_destroy_srq\n+         U rdmacore52_0_ibv_cmd_modify_qp\n+         U rdmacore52_0_ibv_cmd_modify_srq\n+         U rdmacore52_0_ibv_cmd_query_device_any\n+         U rdmacore52_0_ibv_cmd_query_port\n+         U rdmacore52_0_ibv_cmd_query_qp\n+         U rdmacore52_0_ibv_cmd_query_srq\n+         U rdmacore52_0_ibv_cmd_reg_mr\n+         U rdmacore52_0_ibv_cmd_resize_cq\n+         U rdmacore52_0_mthca_alloc_av\n+         U rdmacore52_0_mthca_alloc_cq_buf\n+         U rdmacore52_0_mthca_alloc_db\n+00000110 T rdmacore52_0_mthca_alloc_pd\n+         U rdmacore52_0_mthca_alloc_qp_buf\n+         U rdmacore52_0_mthca_alloc_srq_buf\n+         U rdmacore52_0_mthca_clear_qp\n+         U rdmacore52_0_mthca_cq_clean\n+         U rdmacore52_0_mthca_cq_resize_copy_cqes\n+00001740 T rdmacore52_0_mthca_create_ah\n+00000320 T rdmacore52_0_mthca_create_cq\n+00000e40 T rdmacore52_0_mthca_create_qp\n+000009c0 T rdmacore52_0_mthca_create_srq\n+000002e0 T rdmacore52_0_mthca_dereg_mr\n+000017a0 T rdmacore52_0_mthca_destroy_ah\n+00000910 T rdmacore52_0_mthca_destroy_cq\n+00001500 T rdmacore52_0_mthca_destroy_qp\n+00000da0 T rdmacore52_0_mthca_destroy_srq\n+         U rdmacore52_0_mthca_free_av\n+         U rdmacore52_0_mthca_free_buf\n+         U rdmacore52_0_mthca_free_db\n+000001d0 T rdmacore52_0_mthca_free_pd\n+         U rdmacore52_0_mthca_init_qp_indices\n+000013f0 T rdmacore52_0_mthca_modify_qp\n+00000d00 T rdmacore52_0_mthca_modify_srq\n+00000000 T rdmacore52_0_mthca_query_device\n+000000c0 T rdmacore52_0_mthca_query_port\n+00001390 T rdmacore52_0_mthca_query_qp\n+00000d50 T rdmacore52_0_mthca_query_srq\n+00000210 T rdmacore52_0_mthca_reg_mr\n+000006c0 T rdmacore52_0_mthca_resize_cq\n+         U rdmacore52_0_mthca_set_db_qn\n+         U rdmacore52_0_mthca_store_qp\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,9 +1,9 @@\n ----------   0        0        0     2308 1970-01-01 00:00:00.000000 /\n+?rw-r--r--   0        0        0     3560 1970-01-01 00:00:00.000000 memfree.c.o\n+?rw-r--r--   0        0        0     7044 1970-01-01 00:00:00.000000 mthca.c.o\n ?rw-r--r--   0        0        0     3216 1970-01-01 00:00:00.000000 ah.c.o\n ?rw-r--r--   0        0        0     9664 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r--   0        0        0     3560 1970-01-01 00:00:00.000000 memfree.c.o\n-?rw-r--r--   0        0        0    14412 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     3964 1970-01-01 00:00:00.000000 srq.c.o\n ?rw-r--r--   0        0        0     1608 1970-01-01 00:00:00.000000 buf.c.o\n ?rw-r--r--   0        0        0     8080 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r--   0        0        0     7044 1970-01-01 00:00:00.000000 mthca.c.o\n+?rw-r--r--   0        0        0    14412 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libocrdma-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libocrdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,11 +1,9 @@\n \n Archive index:\n-rdmacore52_0___x86.get_pc_thunk.bx in ocrdma_main.c.o\n-verbs_provider_ocrdma in ocrdma_main.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in ocrdma_verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.di in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_query_device in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_query_port in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_init_ahid_tbl in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_alloc_pd in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_free_pd in ocrdma_verbs.c.o\n@@ -28,69 +26,16 @@\n rdmacore52_0_ocrdma_poll_cq in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_arm_cq in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_post_srq_recv in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_create_ah in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_destroy_ah in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_attach_mcast in ocrdma_verbs.c.o\n rdmacore52_0_ocrdma_detach_mcast in ocrdma_verbs.c.o\n-\n-ocrdma_main.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-00000000 r __func__.0\n-         U __printf_chk\n-         U __stack_chk_fail_local\n-         U calloc\n-00000000 t drv__register_driver\n-         U free\n-         U mmap64\n-         U munmap\n-000000f0 t ocrdma_alloc_context\n-00000000 d ocrdma_ctx_ops\n-00000000 d ocrdma_dev_ops\n-00000020 t ocrdma_device_alloc\n-000000a0 t ocrdma_free_context\n-00000000 t ocrdma_uninit_device\n-         U pthread_mutex_init\n-         U pthread_spin_init\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0__verbs_init_and_alloc_context\n-         U rdmacore52_0_ibv_cmd_get_context\n-         U rdmacore52_0_ocrdma_alloc_pd\n-         U rdmacore52_0_ocrdma_arm_cq\n-         U rdmacore52_0_ocrdma_attach_mcast\n-         U rdmacore52_0_ocrdma_create_ah\n-         U rdmacore52_0_ocrdma_create_cq\n-         U rdmacore52_0_ocrdma_create_qp\n-         U rdmacore52_0_ocrdma_create_srq\n-         U rdmacore52_0_ocrdma_dereg_mr\n-         U rdmacore52_0_ocrdma_destroy_ah\n-         U rdmacore52_0_ocrdma_destroy_cq\n-         U rdmacore52_0_ocrdma_destroy_qp\n-         U rdmacore52_0_ocrdma_destroy_srq\n-         U rdmacore52_0_ocrdma_detach_mcast\n-         U rdmacore52_0_ocrdma_free_pd\n-         U rdmacore52_0_ocrdma_init_ahid_tbl\n-         U rdmacore52_0_ocrdma_modify_qp\n-         U rdmacore52_0_ocrdma_modify_srq\n-         U rdmacore52_0_ocrdma_poll_cq\n-         U rdmacore52_0_ocrdma_post_recv\n-         U rdmacore52_0_ocrdma_post_send\n-         U rdmacore52_0_ocrdma_post_srq_recv\n-         U rdmacore52_0_ocrdma_query_device\n-         U rdmacore52_0_ocrdma_query_port\n-         U rdmacore52_0_ocrdma_query_qp\n-         U rdmacore52_0_ocrdma_query_srq\n-         U rdmacore52_0_ocrdma_reg_mr\n-         U rdmacore52_0_ocrdma_resize_cq\n-         U rdmacore52_0_verbs_register_driver_34\n-         U rdmacore52_0_verbs_set_ops\n-         U rdmacore52_0_verbs_uninit_context\n-00000020 r ucna_table\n-00000000 D verbs_provider_ocrdma\n+rdmacore52_0___x86.get_pc_thunk.bx in ocrdma_main.c.o\n+verbs_provider_ocrdma in ocrdma_main.c.o\n \n ocrdma_verbs.c.o:\n 00001be0 t .L355\n 000019a0 t .L357\n 000019ae t .L358\n 00001ac0 t .L359\n 00001ad4 t .L360\n@@ -178,7 +123,62 @@\n 00003190 T rdmacore52_0_ocrdma_post_srq_recv\n 00000560 T rdmacore52_0_ocrdma_query_device\n 00000630 T rdmacore52_0_ocrdma_query_port\n 00001090 T rdmacore52_0_ocrdma_query_qp\n 00000f00 T rdmacore52_0_ocrdma_query_srq\n 00000850 T rdmacore52_0_ocrdma_reg_mr\n 00000b50 T rdmacore52_0_ocrdma_resize_cq\n+\n+ocrdma_main.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+00000000 r __func__.0\n+         U __printf_chk\n+         U __stack_chk_fail_local\n+         U calloc\n+00000000 t drv__register_driver\n+         U free\n+         U mmap64\n+         U munmap\n+000000f0 t ocrdma_alloc_context\n+00000000 d ocrdma_ctx_ops\n+00000000 d ocrdma_dev_ops\n+00000020 t ocrdma_device_alloc\n+000000a0 t ocrdma_free_context\n+00000000 t ocrdma_uninit_device\n+         U pthread_mutex_init\n+         U pthread_spin_init\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0__verbs_init_and_alloc_context\n+         U rdmacore52_0_ibv_cmd_get_context\n+         U rdmacore52_0_ocrdma_alloc_pd\n+         U rdmacore52_0_ocrdma_arm_cq\n+         U rdmacore52_0_ocrdma_attach_mcast\n+         U rdmacore52_0_ocrdma_create_ah\n+         U rdmacore52_0_ocrdma_create_cq\n+         U rdmacore52_0_ocrdma_create_qp\n+         U rdmacore52_0_ocrdma_create_srq\n+         U rdmacore52_0_ocrdma_dereg_mr\n+         U rdmacore52_0_ocrdma_destroy_ah\n+         U rdmacore52_0_ocrdma_destroy_cq\n+         U rdmacore52_0_ocrdma_destroy_qp\n+         U rdmacore52_0_ocrdma_destroy_srq\n+         U rdmacore52_0_ocrdma_detach_mcast\n+         U rdmacore52_0_ocrdma_free_pd\n+         U rdmacore52_0_ocrdma_init_ahid_tbl\n+         U rdmacore52_0_ocrdma_modify_qp\n+         U rdmacore52_0_ocrdma_modify_srq\n+         U rdmacore52_0_ocrdma_poll_cq\n+         U rdmacore52_0_ocrdma_post_recv\n+         U rdmacore52_0_ocrdma_post_send\n+         U rdmacore52_0_ocrdma_post_srq_recv\n+         U rdmacore52_0_ocrdma_query_device\n+         U rdmacore52_0_ocrdma_query_port\n+         U rdmacore52_0_ocrdma_query_qp\n+         U rdmacore52_0_ocrdma_query_srq\n+         U rdmacore52_0_ocrdma_reg_mr\n+         U rdmacore52_0_ocrdma_resize_cq\n+         U rdmacore52_0_verbs_register_driver_34\n+         U rdmacore52_0_verbs_set_ops\n+         U rdmacore52_0_verbs_uninit_context\n+00000020 r ucna_table\n+00000000 D verbs_provider_ocrdma\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ----------   0        0        0     1116 1970-01-01 00:00:00.000000 /\n ----------   0        0        0        0 1970-01-01 00:00:00.000000 //\n-?rw-r--r--   0        0        0     5880 1970-01-01 00:00:00.000000 ocrdma_main.c.o\n ?rw-r--r--   0        0        0    24968 1970-01-01 00:00:00.000000 ocrdma_verbs.c.o\n+?rw-r--r--   0        0        0     5880 1970-01-01 00:00:00.000000 ocrdma_main.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libqedr-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libqedr-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,16 +1,16 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in qelr_main.c.o\n+verbs_provider_qedr in qelr_main.c.o\n rdmacore52_0_qelr_chain_get_last_elem in qelr_chain.c.o\n rdmacore52_0_qelr_chain_reset in qelr_chain.c.o\n rdmacore52_0_qelr_chain_alloc in qelr_chain.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qelr_chain.c.o\n rdmacore52_0_qelr_chain_free in qelr_chain.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in qelr_main.c.o\n-verbs_provider_qedr in qelr_main.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qelr_verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.si in qelr_verbs.c.o\n rdmacore52_0_qelr_query_device in qelr_verbs.c.o\n rdmacore52_0_qelr_query_port in qelr_verbs.c.o\n rdmacore52_0_qelr_alloc_pd in qelr_verbs.c.o\n rdmacore52_0_qelr_dealloc_pd in qelr_verbs.c.o\n rdmacore52_0_qelr_reg_mr in qelr_verbs.c.o\n@@ -35,27 +35,14 @@\n rdmacore52_0_qelr_open_xrcd in qelr_verbs.c.o\n rdmacore52_0_qelr_close_xrcd in qelr_verbs.c.o\n rdmacore52_0_qelr_get_srq_num in qelr_verbs.c.o\n rdmacore52_0_qelr_create_srq_ex in qelr_verbs.c.o\n rdmacore52_0_qelr_create_qp_ex in qelr_verbs.c.o\n rdmacore52_0_qelr_create_qp in qelr_verbs.c.o\n \n-qelr_chain.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U ibv_dofork_range\n-         U ibv_dontfork_range\n-         U mmap64\n-         U munmap\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000040 T rdmacore52_0_qelr_chain_alloc\n-00000140 T rdmacore52_0_qelr_chain_free\n-00000000 T rdmacore52_0_qelr_chain_get_last_elem\n-00000020 T rdmacore52_0_qelr_chain_reset\n-\n qelr_main.c.o:\n 00000000 r .LC0\n 0000002c r .LC1\n 000000a0 r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n 00000000 r __func__.0\n@@ -107,14 +94,27 @@\n          U rdmacore52_0_qelr_reg_mr\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n          U sysconf\n 00000000 D verbs_provider_qedr\n \n+qelr_chain.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U ibv_dofork_range\n+         U ibv_dontfork_range\n+         U mmap64\n+         U munmap\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000040 T rdmacore52_0_qelr_chain_alloc\n+00000140 T rdmacore52_0_qelr_chain_free\n+00000000 T rdmacore52_0_qelr_chain_get_last_elem\n+00000020 T rdmacore52_0_qelr_chain_reset\n+\n qelr_verbs.c.o:\n 00001760 t .L240\n 00001ea8 t .L241\n 00001800 t .L243\n 00001d30 t .L244\n 00001de0 t .L245\n 00001c50 t .L246\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ----------   0        0        0     1278 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0     2008 1970-01-01 00:00:00.000000 qelr_chain.c.o\n ?rw-r--r--   0        0        0     7196 1970-01-01 00:00:00.000000 qelr_main.c.o\n+?rw-r--r--   0        0        0     2008 1970-01-01 00:00:00.000000 qelr_chain.c.o\n ?rw-r--r--   0        0        0    46892 1970-01-01 00:00:00.000000 qelr_verbs.c.o\n"}]}, {"source1": "./usr/lib/i386-linux-gnu/libvmw_pvrdma-rdmav34.a", "source2": "./usr/lib/i386-linux-gnu/libvmw_pvrdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,13 @@\n \n Archive index:\n+rdmacore52_0___x86.get_pc_thunk.bx in pvrdma_main.c.o\n+rdmacore52_0_pvrdma_alloc_buf in pvrdma_main.c.o\n+rdmacore52_0_pvrdma_free_buf in pvrdma_main.c.o\n+verbs_provider_vmw_pvrdma in pvrdma_main.c.o\n rdmacore52_0_pvrdma_alloc_qp_buf in qp.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in qp.c.o\n rdmacore52_0_pvrdma_init_srq_queue in qp.c.o\n rdmacore52_0_pvrdma_modify_srq in qp.c.o\n rdmacore52_0_pvrdma_query_srq in qp.c.o\n rdmacore52_0_pvrdma_destroy_srq in qp.c.o\n rdmacore52_0_pvrdma_create_qp in qp.c.o\n@@ -11,103 +15,31 @@\n rdmacore52_0_pvrdma_modify_qp in qp.c.o\n rdmacore52_0_pvrdma_destroy_qp in qp.c.o\n rdmacore52_0_pvrdma_post_send in qp.c.o\n rdmacore52_0_pvrdma_post_recv in qp.c.o\n rdmacore52_0_pvrdma_post_srq_recv in qp.c.o\n rdmacore52_0_pvrdma_alloc_srq_buf in qp.c.o\n rdmacore52_0_pvrdma_create_srq in qp.c.o\n+rdmacore52_0_pvrdma_alloc_cq_buf in cq.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n+rdmacore52_0_pvrdma_poll_cq in cq.c.o\n+rdmacore52_0_pvrdma_cq_clean_int in cq.c.o\n+rdmacore52_0_pvrdma_cq_clean in cq.c.o\n+rdmacore52_0_pvrdma_create_cq in cq.c.o\n+rdmacore52_0_pvrdma_destroy_cq in cq.c.o\n+rdmacore52_0_pvrdma_req_notify_cq in cq.c.o\n rdmacore52_0_pvrdma_query_device in verbs.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in verbs.c.o\n rdmacore52_0_pvrdma_query_port in verbs.c.o\n rdmacore52_0_pvrdma_alloc_pd in verbs.c.o\n rdmacore52_0_pvrdma_free_pd in verbs.c.o\n rdmacore52_0_pvrdma_reg_mr in verbs.c.o\n rdmacore52_0_pvrdma_dereg_mr in verbs.c.o\n rdmacore52_0_pvrdma_create_ah in verbs.c.o\n rdmacore52_0_pvrdma_destroy_ah in verbs.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in pvrdma_main.c.o\n-rdmacore52_0_pvrdma_alloc_buf in pvrdma_main.c.o\n-rdmacore52_0_pvrdma_free_buf in pvrdma_main.c.o\n-verbs_provider_vmw_pvrdma in pvrdma_main.c.o\n-rdmacore52_0_pvrdma_alloc_cq_buf in cq.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in cq.c.o\n-rdmacore52_0_pvrdma_poll_cq in cq.c.o\n-rdmacore52_0_pvrdma_cq_clean_int in cq.c.o\n-rdmacore52_0_pvrdma_cq_clean in cq.c.o\n-rdmacore52_0_pvrdma_create_cq in cq.c.o\n-rdmacore52_0_pvrdma_destroy_cq in cq.c.o\n-rdmacore52_0_pvrdma_req_notify_cq in cq.c.o\n-\n-qp.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-         U fwrite\n-         U malloc\n-         U memset\n-         U pthread_spin_destroy\n-         U pthread_spin_init\n-         U pthread_spin_lock\n-         U pthread_spin_unlock\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibv_cmd_create_qp\n-         U rdmacore52_0_ibv_cmd_create_srq\n-         U rdmacore52_0_ibv_cmd_destroy_qp\n-         U rdmacore52_0_ibv_cmd_destroy_srq\n-         U rdmacore52_0_ibv_cmd_modify_qp\n-         U rdmacore52_0_ibv_cmd_modify_srq\n-         U rdmacore52_0_ibv_cmd_query_qp\n-         U rdmacore52_0_ibv_cmd_query_srq\n-         U rdmacore52_0_pvrdma_alloc_buf\n-00000000 T rdmacore52_0_pvrdma_alloc_qp_buf\n-000012b0 T rdmacore52_0_pvrdma_alloc_srq_buf\n-         U rdmacore52_0_pvrdma_cq_clean\n-         U rdmacore52_0_pvrdma_cq_clean_int\n-000002c0 T rdmacore52_0_pvrdma_create_qp\n-00001350 T rdmacore52_0_pvrdma_create_srq\n-00000870 T rdmacore52_0_pvrdma_destroy_qp\n-00000260 T rdmacore52_0_pvrdma_destroy_srq\n-         U rdmacore52_0_pvrdma_free_buf\n-000001a0 T rdmacore52_0_pvrdma_init_srq_queue\n-00000780 T rdmacore52_0_pvrdma_modify_qp\n-000001c0 T rdmacore52_0_pvrdma_modify_srq\n-00000e10 T rdmacore52_0_pvrdma_post_recv\n-00000a50 T rdmacore52_0_pvrdma_post_send\n-00001080 T rdmacore52_0_pvrdma_post_srq_recv\n-000006e0 T rdmacore52_0_pvrdma_query_qp\n-00000210 T rdmacore52_0_pvrdma_query_srq\n-         U stderr\n-\n-verbs.c.o:\n-00000000 r .LC0\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __snprintf_chk\n-         U __stack_chk_fail_local\n-         U calloc\n-         U free\n-         U ibv_query_port\n-         U ibv_resolve_eth_l2_from_gid\n-         U malloc\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-         U rdmacore52_0_ibv_cmd_alloc_pd\n-         U rdmacore52_0_ibv_cmd_dealloc_pd\n-         U rdmacore52_0_ibv_cmd_dereg_mr\n-         U rdmacore52_0_ibv_cmd_query_device_any\n-         U rdmacore52_0_ibv_cmd_query_port\n-         U rdmacore52_0_ibv_cmd_reg_mr\n-00000110 T rdmacore52_0_pvrdma_alloc_pd\n-000002e0 T rdmacore52_0_pvrdma_create_ah\n-000002a0 T rdmacore52_0_pvrdma_dereg_mr\n-00000500 T rdmacore52_0_pvrdma_destroy_ah\n-000001a0 T rdmacore52_0_pvrdma_free_pd\n-00000000 T rdmacore52_0_pvrdma_query_device\n-000000c0 T rdmacore52_0_pvrdma_query_port\n-000001e0 T rdmacore52_0_pvrdma_reg_mr\n \n pvrdma_main.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __stack_chk_fail_local\n          U calloc\n 00000000 t drv__register_driver\n@@ -154,14 +86,56 @@\n          U rdmacore52_0_pvrdma_req_notify_cq\n          U rdmacore52_0_verbs_register_driver_34\n          U rdmacore52_0_verbs_set_ops\n          U rdmacore52_0_verbs_uninit_context\n          U sysconf\n 00000000 D verbs_provider_vmw_pvrdma\n \n+qp.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U fwrite\n+         U malloc\n+         U memset\n+         U pthread_spin_destroy\n+         U pthread_spin_init\n+         U pthread_spin_lock\n+         U pthread_spin_unlock\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_ibv_cmd_create_qp\n+         U rdmacore52_0_ibv_cmd_create_srq\n+         U rdmacore52_0_ibv_cmd_destroy_qp\n+         U rdmacore52_0_ibv_cmd_destroy_srq\n+         U rdmacore52_0_ibv_cmd_modify_qp\n+         U rdmacore52_0_ibv_cmd_modify_srq\n+         U rdmacore52_0_ibv_cmd_query_qp\n+         U rdmacore52_0_ibv_cmd_query_srq\n+         U rdmacore52_0_pvrdma_alloc_buf\n+00000000 T rdmacore52_0_pvrdma_alloc_qp_buf\n+000012b0 T rdmacore52_0_pvrdma_alloc_srq_buf\n+         U rdmacore52_0_pvrdma_cq_clean\n+         U rdmacore52_0_pvrdma_cq_clean_int\n+000002c0 T rdmacore52_0_pvrdma_create_qp\n+00001350 T rdmacore52_0_pvrdma_create_srq\n+00000870 T rdmacore52_0_pvrdma_destroy_qp\n+00000260 T rdmacore52_0_pvrdma_destroy_srq\n+         U rdmacore52_0_pvrdma_free_buf\n+000001a0 T rdmacore52_0_pvrdma_init_srq_queue\n+00000780 T rdmacore52_0_pvrdma_modify_qp\n+000001c0 T rdmacore52_0_pvrdma_modify_srq\n+00000e10 T rdmacore52_0_pvrdma_post_recv\n+00000a50 T rdmacore52_0_pvrdma_post_send\n+00001080 T rdmacore52_0_pvrdma_post_srq_recv\n+000006e0 T rdmacore52_0_pvrdma_query_qp\n+00000210 T rdmacore52_0_pvrdma_query_srq\n+         U stderr\n+\n cq.c.o:\n          U _GLOBAL_OFFSET_TABLE_\n          U __stack_chk_fail_local\n          U free\n          U malloc\n          U memset\n          U pthread_spin_init\n@@ -175,7 +149,33 @@\n 00000390 T rdmacore52_0_pvrdma_cq_clean\n 00000210 T rdmacore52_0_pvrdma_cq_clean_int\n 00000550 T rdmacore52_0_pvrdma_create_cq\n 000006e0 T rdmacore52_0_pvrdma_destroy_cq\n          U rdmacore52_0_pvrdma_free_buf\n 00000070 T rdmacore52_0_pvrdma_poll_cq\n 00000730 T rdmacore52_0_pvrdma_req_notify_cq\n+\n+verbs.c.o:\n+00000000 r .LC0\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __snprintf_chk\n+         U __stack_chk_fail_local\n+         U calloc\n+         U free\n+         U ibv_query_port\n+         U ibv_resolve_eth_l2_from_gid\n+         U malloc\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+         U rdmacore52_0_ibv_cmd_alloc_pd\n+         U rdmacore52_0_ibv_cmd_dealloc_pd\n+         U rdmacore52_0_ibv_cmd_dereg_mr\n+         U rdmacore52_0_ibv_cmd_query_device_any\n+         U rdmacore52_0_ibv_cmd_query_port\n+         U rdmacore52_0_ibv_cmd_reg_mr\n+00000110 T rdmacore52_0_pvrdma_alloc_pd\n+000002e0 T rdmacore52_0_pvrdma_create_ah\n+000002a0 T rdmacore52_0_pvrdma_dereg_mr\n+00000500 T rdmacore52_0_pvrdma_destroy_ah\n+000001a0 T rdmacore52_0_pvrdma_free_pd\n+00000000 T rdmacore52_0_pvrdma_query_device\n+000000c0 T rdmacore52_0_pvrdma_query_port\n+000001e0 T rdmacore52_0_pvrdma_reg_mr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ----------   0        0        0     1270 1970-01-01 00:00:00.000000 /\n-?rw-r--r--   0        0        0    10544 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r--   0        0        0     4256 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r--   0        0        0     5916 1970-01-01 00:00:00.000000 pvrdma_main.c.o\n+?rw-r--r--   0        0        0    10544 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r--   0        0        0     4380 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r--   0        0        0     4256 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}]}]}]}, {"source1": "librdmacm-dev_52.0-2_i386.deb", "source2": "librdmacm-dev_52.0-2_i386.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r--   0        0        0        4 2024-06-27 11:49:34.000000 debian-binary\n -rw-r--r--   0        0        0     2652 2024-06-27 11:49:34.000000 control.tar.xz\n--rw-r--r--   0        0        0   129588 2024-06-27 11:49:34.000000 data.tar.xz\n+-rw-r--r--   0        0        0   129472 2024-06-27 11:49:34.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/i386-linux-gnu/librdmacm.a", "source2": "./usr/lib/i386-linux-gnu/librdmacm.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,45 +1,13 @@\n \n Archive index:\n rdmacore52_0___x86.get_pc_thunk.bx in addrinfo.c.o\n rdmacore52_0_ucma_set_sid in addrinfo.c.o\n rdma_freeaddrinfo in addrinfo.c.o\n rdma_getaddrinfo in addrinfo.c.o\n-rdmacore52_0___x86.get_pc_thunk.bx in rsocket.c.o\n-rdmacore52_0___x86.get_pc_thunk.di in rsocket.c.o\n-rdmacore52_0___x86.get_pc_thunk.bp in rsocket.c.o\n-rbind in rsocket.c.o\n-rlisten in rsocket.c.o\n-rconnect in rsocket.c.o\n-rrecv in rsocket.c.o\n-rrecvmsg in rsocket.c.o\n-rread in rsocket.c.o\n-rreadv in rsocket.c.o\n-rsend in rsocket.c.o\n-rdmacore52_0___x86.get_pc_thunk.cx in rsocket.c.o\n-rsendto in rsocket.c.o\n-rsendmsg in rsocket.c.o\n-rwrite in rsocket.c.o\n-rwritev in rsocket.c.o\n-rpoll in rsocket.c.o\n-rselect in rsocket.c.o\n-rshutdown in rsocket.c.o\n-rdmacore52_0___x86.get_pc_thunk.si in rsocket.c.o\n-rgetpeername in rsocket.c.o\n-raccept in rsocket.c.o\n-rrecvfrom in rsocket.c.o\n-rgetsockname in rsocket.c.o\n-rsetsockopt in rsocket.c.o\n-rgetsockopt in rsocket.c.o\n-rfcntl in rsocket.c.o\n-riomap in rsocket.c.o\n-riounmap in rsocket.c.o\n-rsocket in rsocket.c.o\n-rclose in rsocket.c.o\n-riowrite in rsocket.c.o\n rdmacore52_0_idx_insert in indexer.c.o\n rdmacore52_0___x86.get_pc_thunk.bp in indexer.c.o\n rdmacore52_0_idx_remove in indexer.c.o\n rdmacore52_0_idx_replace in indexer.c.o\n rdmacore52_0_idm_set in indexer.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in indexer.c.o\n rdmacore52_0_idm_clear in indexer.c.o\n@@ -91,14 +59,46 @@\n rdma_create_ep in cma.c.o\n rdmacore52_0_ucma_max_qpsize in cma.c.o\n rdmacore52_0_ucma_get_port in cma.c.o\n rdma_get_src_port in cma.c.o\n rdma_get_dst_port in cma.c.o\n rdma_set_local_ece in cma.c.o\n rdma_get_remote_ece in cma.c.o\n+rdmacore52_0___x86.get_pc_thunk.bx in rsocket.c.o\n+rdmacore52_0___x86.get_pc_thunk.di in rsocket.c.o\n+rdmacore52_0___x86.get_pc_thunk.bp in rsocket.c.o\n+rbind in rsocket.c.o\n+rlisten in rsocket.c.o\n+rconnect in rsocket.c.o\n+rrecv in rsocket.c.o\n+rrecvmsg in rsocket.c.o\n+rread in rsocket.c.o\n+rreadv in rsocket.c.o\n+rsend in rsocket.c.o\n+rdmacore52_0___x86.get_pc_thunk.cx in rsocket.c.o\n+rsendto in rsocket.c.o\n+rsendmsg in rsocket.c.o\n+rwrite in rsocket.c.o\n+rwritev in rsocket.c.o\n+rpoll in rsocket.c.o\n+rselect in rsocket.c.o\n+rshutdown in rsocket.c.o\n+rdmacore52_0___x86.get_pc_thunk.si in rsocket.c.o\n+rgetpeername in rsocket.c.o\n+raccept in rsocket.c.o\n+rrecvfrom in rsocket.c.o\n+rgetsockname in rsocket.c.o\n+rsetsockopt in rsocket.c.o\n+rgetsockopt in rsocket.c.o\n+rfcntl in rsocket.c.o\n+riomap in rsocket.c.o\n+riounmap in rsocket.c.o\n+rsocket in rsocket.c.o\n+rclose in rsocket.c.o\n+riowrite in rsocket.c.o\n rdmacore52_0___x86.get_pc_thunk.si in acm.c.o\n rdmacore52_0_ucma_ib_init in acm.c.o\n rdmacore52_0___x86.get_pc_thunk.ax in acm.c.o\n rdmacore52_0_ucma_ib_cleanup in acm.c.o\n rdmacore52_0___x86.get_pc_thunk.bx in acm.c.o\n rdmacore52_0_ucma_ib_resolve in acm.c.o\n \n@@ -119,14 +119,228 @@\n          U rdmacore52_0_ucma_get_port\n          U rdmacore52_0_ucma_ib_resolve\n          U rdmacore52_0_ucma_init\n 000000f0 T rdmacore52_0_ucma_set_sid\n          U strdup\n 00000000 t ucma_convert_in6.isra.0\n \n+indexer.c.o:\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U calloc\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000200 T rdmacore52_0_idm_clear\n+00000170 T rdmacore52_0_idm_set\n+00000000 T rdmacore52_0_idx_insert\n+00000110 T rdmacore52_0_idx_remove\n+00000150 T rdmacore52_0_idx_replace\n+\n+cma.c.o:\n+00004270 t .L1097\n+00004290 t .L1099\n+00004280 t .L1100\n+000042d0 t .L1101\n+000042c0 t .L1102\n+000042b0 t .L1103\n+000042a0 t .L1104\n+00004340 t .L1105\n+00004330 t .L1106\n+00004320 t .L1107\n+00004310 t .L1108\n+00004300 t .L1109\n+000042f0 t .L1110\n+000042e0 t .L1111\n+00004260 t .L1113\n+00004258 t .L1114\n+00004a40 t .L1163\n+00004f68 t .L1164\n+00004b20 t .L1166\n+000049d0 t .L1167\n+00004ed8 t .L1169\n+00004e08 t .L1170\n+00004be0 t .L1171\n+00004ae0 t .L1172\n+00004a98 t .L1173\n+00000000 r .LC0\n+0000005d r .LC10\n+00000077 r .LC11\n+00000044 r .LC12\n+00000095 r .LC13\n+000000b1 r .LC14\n+000000cb r .LC15\n+000000e2 r .LC16\n+000000fc r .LC17\n+00000117 r .LC18\n+00000134 r .LC19\n+00000151 r .LC20\n+0000016f r .LC21\n+00000189 r .LC22\n+000001a5 r .LC23\n+00000064 r .LC24\n+00000003 r .LC4\n+00000000 r .LC5\n+00000020 r .LC6\n+0000000b r .LC7\n+00000027 r .LC8\n+00000040 r .LC9\n+         U _GLOBAL_OFFSET_TABLE_\n+         U __errno_location\n+         U __memcpy_chk\n+         U __stack_chk_fail_local\n+         U __syslog_chk\n+         U calloc\n+00000590 t check_abi_version_nl_cb\n+         U close\n+00000000 d cma_dev_list\n+00000120 b dev_cdev\n+00000000 t dev_cmp\n+00000140 b dev_list\n+00000000 d dev_name\n+         U free\n+         U ibv_alloc_pd\n+         U ibv_attach_mcast\n+         U ibv_close_device\n+         U ibv_copy_ah_attr_from_kern\n+         U ibv_copy_path_rec_from_kern\n+         U ibv_copy_qp_attr_from_kern\n+         U ibv_create_comp_channel\n+         U ibv_create_cq\n+         U ibv_create_qp\n+         U ibv_create_srq\n+         U ibv_dealloc_pd\n+         U ibv_destroy_comp_channel\n+         U ibv_destroy_cq\n+         U ibv_destroy_qp\n+         U ibv_destroy_srq\n+         U ibv_detach_mcast\n+         U ibv_free_device_list\n+         U ibv_get_device_guid\n+         U ibv_get_device_index\n+         U ibv_get_device_list\n+         U ibv_get_pkey_index\n+         U ibv_get_sysfs_path\n+         U ibv_modify_qp\n+         U ibv_open_device\n+         U ibv_query_device\n+         U ibv_query_ece\n+         U ibv_query_port\n+         U ibv_read_sysfs_file\n+         U ibv_set_ece\n+00000004 b idm_lock\n+00000910 t insert_cma_dev.isra.0\n+         U malloc\n+         U memcmp\n+         U memcpy\n+00000128 b mut\n+         U nl_socket_free\n+         U nla_get_string\n+         U nla_get_u64\n+         U nlmsg_hdr\n+         U nlmsg_parse\n+         U pthread_cond_destroy\n+         U pthread_cond_init\n+         U pthread_cond_signal\n+         U pthread_cond_wait\n+         U pthread_mutex_destroy\n+         U pthread_mutex_init\n+         U pthread_mutex_lock\n+         U pthread_mutex_unlock\n+         U qsort\n+00006020 T rdma_accept\n+00004110 T rdma_ack_cm_event\n+00001b50 T rdma_bind_addr\n+00001210 t rdma_bind_addr2\n+00005ca0 T rdma_connect\n+000071a0 T rdma_create_ep\n+000023e0 T rdma_create_event_channel\n+00002390 T rdma_create_id\n+000020d0 t rdma_create_id2\n+000039d0 T rdma_create_qp\n+000033d0 T rdma_create_qp_ex\n+00002fa0 T rdma_create_srq\n+00002c20 T rdma_create_srq_ex\n+00006ea0 T rdma_destroy_ep\n+00001960 T rdma_destroy_event_channel\n+00001990 T rdma_destroy_id\n+00003ad0 T rdma_destroy_qp\n+00003300 T rdma_destroy_srq\n+000065a0 T rdma_disconnect\n+000041f0 T rdma_establish\n+00004230 T rdma_event_str\n+000017a0 T rdma_free_devices\n+0000000e t rdma_free_devices.cold\n+         U rdma_freeaddrinfo\n+00004780 T rdma_get_cm_event\n+00001f20 T rdma_get_devices\n+000076d0 T rdma_get_dst_port\n+00007780 T rdma_get_remote_ece\n+00006bb0 T rdma_get_request\n+00007690 T rdma_get_src_port\n+         U rdma_getaddrinfo\n+000026a0 T rdma_init_qp_attr\n+00006b10 T rdma_join_multicast\n+000066e0 t rdma_join_multicast2\n+00006a60 T rdma_join_multicast_ex\n+00003e60 T rdma_leave_multicast\n+00003bc0 T rdma_listen\n+00004410 T rdma_migrate_id\n+00003cc0 T rdma_notify\n+00003c80 T rdma_reject\n+00003ca0 T rdma_reject_ece\n+00005730 T rdma_resolve_addr\n+00005600 t rdma_resolve_addr2\n+00005a40 T rdma_resolve_route\n+00007710 T rdma_set_local_ece\n+00004350 T rdma_set_option\n+00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n+00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.di\n+00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n+00000000 T rdmacore52_0___x86.get_pc_thunk.si\n+00000040 d rdmacore52_0_abi_ver\n+00000000 B rdmacore52_0_af_ib_support\n+         U rdmacore52_0_idm_clear\n+         U rdmacore52_0_idm_set\n+         U rdmacore52_0_open_cdev\n+         U rdmacore52_0_rdmanl_get_chardev\n+         U rdmacore52_0_rdmanl_policy\n+         U rdmacore52_0_rdmanl_socket_alloc\n+00001b00 T rdmacore52_0_ucma_addrlen\n+000054c0 T rdmacore52_0_ucma_complete\n+00007650 T rdmacore52_0_ucma_get_port\n+00001cb0 T rdmacore52_0_ucma_init\n+00007550 T rdmacore52_0_ucma_max_qpsize\n+00003d60 T rdmacore52_0_ucma_shutdown\n+000007d0 t reject_with_reason\n+         U sem_destroy\n+         U sem_init\n+         U sem_post\n+         U sem_wait\n+         U snprintf\n+         U strtol\n+00000bc0 t sync_devices_list\n+00000007 t sync_devices_list.cold\n+000006e0 t ucma_destroy_kern_id\n+00000a10 t ucma_free_id\n+00000000 t ucma_free_id.cold\n+00000e60 t ucma_get_device\n+00000020 b ucma_idm\n+000015c0 t ucma_init_conn_qp\n+00000020 t ucma_init_device\n+000027d0 t ucma_init_ud_qp\n+00002950 t ucma_modify_qp_rtr\n+00002a90 t ucma_process_conn_resp\n+00001080 t ucma_query_addr\n+00000220 t ucma_query_gid\n+00000380 t ucma_query_path\n+00001300 t ucma_query_route\n+         U write\n+\n rsocket.c.o:\n 0000a3fb t .L2139\n 0000a410 t .L2142\n 0000a45a t .L2143\n 0000a48c t .L2144\n 0000a4ba t .L2145\n 0000a180 t .L2166\n@@ -335,228 +549,14 @@\n          U tsearch\n 000000c0 d udp_svc\n 00000810 b udp_svc_fds\n 00005ac0 t udp_svc_run\n 00000000 d wake_up_interval\n          U write\n \n-indexer.c.o:\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U calloc\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bp\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000200 T rdmacore52_0_idm_clear\n-00000170 T rdmacore52_0_idm_set\n-00000000 T rdmacore52_0_idx_insert\n-00000110 T rdmacore52_0_idx_remove\n-00000150 T rdmacore52_0_idx_replace\n-\n-cma.c.o:\n-00004270 t .L1097\n-00004290 t .L1099\n-00004280 t .L1100\n-000042d0 t .L1101\n-000042c0 t .L1102\n-000042b0 t .L1103\n-000042a0 t .L1104\n-00004340 t .L1105\n-00004330 t .L1106\n-00004320 t .L1107\n-00004310 t .L1108\n-00004300 t .L1109\n-000042f0 t .L1110\n-000042e0 t .L1111\n-00004260 t .L1113\n-00004258 t .L1114\n-00004a40 t .L1163\n-00004f68 t .L1164\n-00004b20 t .L1166\n-000049d0 t .L1167\n-00004ed8 t .L1169\n-00004e08 t .L1170\n-00004be0 t .L1171\n-00004ae0 t .L1172\n-00004a98 t .L1173\n-00000000 r .LC0\n-0000005d r .LC10\n-00000077 r .LC11\n-00000044 r .LC12\n-00000095 r .LC13\n-000000b1 r .LC14\n-000000cb r .LC15\n-000000e2 r .LC16\n-000000fc r .LC17\n-00000117 r .LC18\n-00000134 r .LC19\n-00000151 r .LC20\n-0000016f r .LC21\n-00000189 r .LC22\n-000001a5 r .LC23\n-00000064 r .LC24\n-00000003 r .LC4\n-00000000 r .LC5\n-00000020 r .LC6\n-0000000b r .LC7\n-00000027 r .LC8\n-00000040 r .LC9\n-         U _GLOBAL_OFFSET_TABLE_\n-         U __errno_location\n-         U __memcpy_chk\n-         U __stack_chk_fail_local\n-         U __syslog_chk\n-         U calloc\n-00000590 t check_abi_version_nl_cb\n-         U close\n-00000000 d cma_dev_list\n-00000120 b dev_cdev\n-00000000 t dev_cmp\n-00000140 b dev_list\n-00000000 d dev_name\n-         U free\n-         U ibv_alloc_pd\n-         U ibv_attach_mcast\n-         U ibv_close_device\n-         U ibv_copy_ah_attr_from_kern\n-         U ibv_copy_path_rec_from_kern\n-         U ibv_copy_qp_attr_from_kern\n-         U ibv_create_comp_channel\n-         U ibv_create_cq\n-         U ibv_create_qp\n-         U ibv_create_srq\n-         U ibv_dealloc_pd\n-         U ibv_destroy_comp_channel\n-         U ibv_destroy_cq\n-         U ibv_destroy_qp\n-         U ibv_destroy_srq\n-         U ibv_detach_mcast\n-         U ibv_free_device_list\n-         U ibv_get_device_guid\n-         U ibv_get_device_index\n-         U ibv_get_device_list\n-         U ibv_get_pkey_index\n-         U ibv_get_sysfs_path\n-         U ibv_modify_qp\n-         U ibv_open_device\n-         U ibv_query_device\n-         U ibv_query_ece\n-         U ibv_query_port\n-         U ibv_read_sysfs_file\n-         U ibv_set_ece\n-00000004 b idm_lock\n-00000910 t insert_cma_dev.isra.0\n-         U malloc\n-         U memcmp\n-         U memcpy\n-00000128 b mut\n-         U nl_socket_free\n-         U nla_get_string\n-         U nla_get_u64\n-         U nlmsg_hdr\n-         U nlmsg_parse\n-         U pthread_cond_destroy\n-         U pthread_cond_init\n-         U pthread_cond_signal\n-         U pthread_cond_wait\n-         U pthread_mutex_destroy\n-         U pthread_mutex_init\n-         U pthread_mutex_lock\n-         U pthread_mutex_unlock\n-         U qsort\n-00006020 T rdma_accept\n-00004110 T rdma_ack_cm_event\n-00001b50 T rdma_bind_addr\n-00001210 t rdma_bind_addr2\n-00005ca0 T rdma_connect\n-000071a0 T rdma_create_ep\n-000023e0 T rdma_create_event_channel\n-00002390 T rdma_create_id\n-000020d0 t rdma_create_id2\n-000039d0 T rdma_create_qp\n-000033d0 T rdma_create_qp_ex\n-00002fa0 T rdma_create_srq\n-00002c20 T rdma_create_srq_ex\n-00006ea0 T rdma_destroy_ep\n-00001960 T rdma_destroy_event_channel\n-00001990 T rdma_destroy_id\n-00003ad0 T rdma_destroy_qp\n-00003300 T rdma_destroy_srq\n-000065a0 T rdma_disconnect\n-000041f0 T rdma_establish\n-00004230 T rdma_event_str\n-000017a0 T rdma_free_devices\n-0000000e t rdma_free_devices.cold\n-         U rdma_freeaddrinfo\n-00004780 T rdma_get_cm_event\n-00001f20 T rdma_get_devices\n-000076d0 T rdma_get_dst_port\n-00007780 T rdma_get_remote_ece\n-00006bb0 T rdma_get_request\n-00007690 T rdma_get_src_port\n-         U rdma_getaddrinfo\n-000026a0 T rdma_init_qp_attr\n-00006b10 T rdma_join_multicast\n-000066e0 t rdma_join_multicast2\n-00006a60 T rdma_join_multicast_ex\n-00003e60 T rdma_leave_multicast\n-00003bc0 T rdma_listen\n-00004410 T rdma_migrate_id\n-00003cc0 T rdma_notify\n-00003c80 T rdma_reject\n-00003ca0 T rdma_reject_ece\n-00005730 T rdma_resolve_addr\n-00005600 t rdma_resolve_addr2\n-00005a40 T rdma_resolve_route\n-00007710 T rdma_set_local_ece\n-00004350 T rdma_set_option\n-00000000 T rdmacore52_0___x86.get_pc_thunk.ax\n-00000000 T rdmacore52_0___x86.get_pc_thunk.bx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.cx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.di\n-00000000 T rdmacore52_0___x86.get_pc_thunk.dx\n-00000000 T rdmacore52_0___x86.get_pc_thunk.si\n-00000040 d rdmacore52_0_abi_ver\n-00000000 B rdmacore52_0_af_ib_support\n-         U rdmacore52_0_idm_clear\n-         U rdmacore52_0_idm_set\n-         U rdmacore52_0_open_cdev\n-         U rdmacore52_0_rdmanl_get_chardev\n-         U rdmacore52_0_rdmanl_policy\n-         U rdmacore52_0_rdmanl_socket_alloc\n-00001b00 T rdmacore52_0_ucma_addrlen\n-000054c0 T rdmacore52_0_ucma_complete\n-00007650 T rdmacore52_0_ucma_get_port\n-00001cb0 T rdmacore52_0_ucma_init\n-00007550 T rdmacore52_0_ucma_max_qpsize\n-00003d60 T rdmacore52_0_ucma_shutdown\n-000007d0 t reject_with_reason\n-         U sem_destroy\n-         U sem_init\n-         U sem_post\n-         U sem_wait\n-         U snprintf\n-         U strtol\n-00000bc0 t sync_devices_list\n-00000007 t sync_devices_list.cold\n-000006e0 t ucma_destroy_kern_id\n-00000a10 t ucma_free_id\n-00000000 t ucma_free_id.cold\n-00000e60 t ucma_get_device\n-00000020 b ucma_idm\n-000015c0 t ucma_init_conn_qp\n-00000020 t ucma_init_device\n-000027d0 t ucma_init_ud_qp\n-00002950 t ucma_modify_qp_rtr\n-00002a90 t ucma_process_conn_resp\n-00001080 t ucma_query_addr\n-00000220 t ucma_query_gid\n-00000380 t ucma_query_path\n-00001300 t ucma_query_route\n-         U write\n-\n acm.c.o:\n 00000000 r .LC0\n 00000003 r .LC1\n 00000013 r .LC2\n          U _GLOBAL_OFFSET_TABLE_\n          U __errno_location\n          U __isoc99_fscanf\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,6 +1,6 @@\n ----------   0        0        0     2348 1970-01-01 00:00:00.000000 /\n ?rw-r--r--   0        0        0     4600 1970-01-01 00:00:00.000000 addrinfo.c.o\n-?rw-r--r--   0        0        0    79004 1970-01-01 00:00:00.000000 rsocket.c.o\n ?rw-r--r--   0        0        0     2268 1970-01-01 00:00:00.000000 indexer.c.o\n ?rw-r--r--   0        0        0    54676 1970-01-01 00:00:00.000000 cma.c.o\n+?rw-r--r--   0        0        0    79004 1970-01-01 00:00:00.000000 rsocket.c.o\n ?rw-r--r--   0        0        0     6468 1970-01-01 00:00:00.000000 acm.c.o\n"}]}]}]}]}]}