{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/r-b-build.iFMY9jnC/b1/rdma-core_50.0-2_amd64.changes", "source2": "/srv/reproducible-results/rbuild-debian/r-b-build.iFMY9jnC/b2/rdma-core_50.0-2_amd64.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -3,27 +3,27 @@\n 65cd60dcabba666f1e3e3048128f2096 85404 net optional ibacm_50.0-2_amd64.deb\n d271e435d62be52753160b00c2acc0c0 2273352 debug optional ibverbs-providers-dbgsym_50.0-2_amd64.deb\n 1cfc56026fc275624ff55d550ed888a9 341880 net optional ibverbs-providers_50.0-2_amd64.deb\n bfcc4a102aa50e47375decdfaa298ce8 199680 debug optional ibverbs-utils-dbgsym_50.0-2_amd64.deb\n 2ee70f78828624a47017e141f91b8501 55872 net optional ibverbs-utils_50.0-2_amd64.deb\n 28089f8f93e3d42227f83ed98d31312e 841576 debug optional infiniband-diags-dbgsym_50.0-2_amd64.deb\n 9ea79b33df870eddc209d78e11163383 229044 net optional infiniband-diags_50.0-2_amd64.deb\n- c09592196b5e1ec83f5a86606ff83345 53240 libdevel optional libibmad-dev_50.0-2_amd64.deb\n+ cb3187d907b9364fc7973f715e0b0034 53240 libdevel optional libibmad-dev_50.0-2_amd64.deb\n 0ae7f2690c024d32bbe633799400b6a7 106524 debug optional libibmad5-dbgsym_50.0-2_amd64.deb\n 41d153bb460eb58df0f8e95041baee36 43220 libs optional libibmad5_50.0-2_amd64.deb\n- 36ebd0ef0f18719e77dee84daa79b2f8 45892 libdevel optional libibnetdisc-dev_50.0-2_amd64.deb\n+ 0463faadfa378808f78f99140bde0d09 45888 libdevel optional libibnetdisc-dev_50.0-2_amd64.deb\n 180bd254579c17dd31ddfa1f2a105434 85980 debug optional libibnetdisc5t64-dbgsym_50.0-2_amd64.deb\n 5236e6f52244bd2025021304f5508a20 34288 libs optional libibnetdisc5t64_50.0-2_amd64.deb\n- b2c1885fda577c10d76bbcb6623ef049 55836 libdevel optional libibumad-dev_50.0-2_amd64.deb\n+ e7c7484c0c324de454d60f2252047385 55872 libdevel optional libibumad-dev_50.0-2_amd64.deb\n 66ed748bb953b5f94e96f6c04f66bef3 38504 debug optional libibumad3-dbgsym_50.0-2_amd64.deb\n 29bedb40b471baf688e83912cc3b91da 27704 libs optional libibumad3_50.0-2_amd64.deb\n- fa3b1552ca18463960e6914de2fa0501 642448 libdevel optional libibverbs-dev_50.0-2_amd64.deb\n+ 4a249f09788711a75b91902c1945260f 642372 libdevel optional libibverbs-dev_50.0-2_amd64.deb\n 2be13991964b17109a5f148586d0438c 242708 debug optional libibverbs1-dbgsym_50.0-2_amd64.deb\n 9c1f9e421a67cf9c2d02a503421108e6 61464 libs optional libibverbs1_50.0-2_amd64.deb\n- 768f97362562265a65d44400fcf79032 126640 libdevel optional librdmacm-dev_50.0-2_amd64.deb\n+ 35b6a4a72f65fc28e06fdcd3fa7d39cc 126628 libdevel optional librdmacm-dev_50.0-2_amd64.deb\n 6a63395a59fd5ce1e661304118c502f1 230756 debug optional librdmacm1t64-dbgsym_50.0-2_amd64.deb\n cc338131eeba96852224c53e27cbcce4 70000 libs optional librdmacm1t64_50.0-2_amd64.deb\n 22c60cdd4cb381f1e4fb23a0f56b3c2c 6286740 debug optional python3-pyverbs-dbgsym_50.0-2_amd64.deb\n 8d0dcc4c5d32672fc854aa4656a8c4fa 1525784 python optional python3-pyverbs_50.0-2_amd64.deb\n eb5aa8c611f3a8c1e1d4fb48a61319c7 76212 debug optional rdma-core-dbgsym_50.0-2_amd64.deb\n bf110ef6e9b40d440bae4f1b5d6df014 59972 net optional rdma-core_50.0-2_amd64.deb\n 07dae63d061db0cb5d3923f60187c169 245792 debug optional rdmacm-utils-dbgsym_50.0-2_amd64.deb\n"}, {"source1": "libibmad-dev_50.0-2_amd64.deb", "source2": "libibmad-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n--rw-r--r-- 0 0 0 924 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 52124 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 920 2024-02-29 02:11:46.000000 control.tar.xz\n+-rw-r--r-- 0 0 0 52128 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibmad.a", "source2": "./usr/lib/x86_64-linux-gnu/libibmad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,30 +1,14 @@\n \n Archive index:\n-mad_get_field in fields.c.o\n-mad_set_field in fields.c.o\n-mad_get_field64 in fields.c.o\n-mad_set_field64 in fields.c.o\n-mad_set_array in fields.c.o\n-mad_get_array in fields.c.o\n-mad_decode_field in fields.c.o\n-mad_encode_field in fields.c.o\n-mad_print_field in fields.c.o\n-mad_dump_field in fields.c.o\n-mad_dump_val in fields.c.o\n-mad_field_name in fields.c.o\n-smp_mkey_set in smp.c.o\n-smp_mkey_get in smp.c.o\n-smp_set_status_via in smp.c.o\n-smp_set_via in smp.c.o\n-smp_set in smp.c.o\n-smp_query_status_via in smp.c.o\n-smp_query_via in smp.c.o\n-smp_query in smp.c.o\n-bm_call_via in bm.c.o\n+sa_rpc_call in sa.c.o\n+sa_call in sa.c.o\n+ib_path_query_via in sa.c.o\n+ib_path_query in sa.c.o\n+ib_node_query_via in sa.c.o\n ibdebug in rpc.c.o\n madrpc_show_errors in rpc.c.o\n madrpc_save_mad in rpc.c.o\n madrpc_set_retries in rpc.c.o\n rdmacore50_0_madrpc_retries in rpc.c.o\n madrpc_set_timeout in rpc.c.o\n rdmacore50_0_madrpc_timeout in rpc.c.o\n@@ -37,37 +21,42 @@\n mad_rpc in rpc.c.o\n mad_rpc_rmpp in rpc.c.o\n madrpc in rpc.c.o\n madrpc_rmpp in rpc.c.o\n madrpc_init in rpc.c.o\n mad_rpc_open_port in rpc.c.o\n mad_rpc_close_port in rpc.c.o\n-portid2portnum in portid.c.o\n-portid2str in portid.c.o\n-str2drpath in portid.c.o\n-drpath2str in portid.c.o\n-pma_query_via in gs.c.o\n-performance_reset_via in gs.c.o\n-cc_query_status_via in cc.c.o\n-cc_config_status_via in cc.c.o\n-mad_trid in mad.c.o\n-mad_get_timeout in mad.c.o\n-mad_get_retries in mad.c.o\n-mad_encode in mad.c.o\n-mad_build_pkt in mad.c.o\n ib_resolve_smlid_via in resolve.c.o\n ib_resolve_smlid in resolve.c.o\n ib_resolve_gid_via in resolve.c.o\n ib_resolve_guid_via in resolve.c.o\n ib_resolve_self_via in resolve.c.o\n ib_resolve_portid_str_via in resolve.c.o\n ib_resolve_portid_str in resolve.c.o\n ib_resolve_self in resolve.c.o\n-ib_vendor_call in vendor.c.o\n-ib_vendor_call_via in vendor.c.o\n+smp_mkey_set in smp.c.o\n+smp_mkey_get in smp.c.o\n+smp_set_status_via in smp.c.o\n+smp_set_via in smp.c.o\n+smp_set in smp.c.o\n+smp_query_status_via in smp.c.o\n+smp_query_via in smp.c.o\n+smp_query in smp.c.o\n+mad_class_agent in register.c.o\n+rdmacore50_0_mad_register_port_client in register.c.o\n+mad_register_client in register.c.o\n+mad_register_client_via in register.c.o\n+mad_register_server in register.c.o\n+mad_register_server_via in register.c.o\n+mad_trid in mad.c.o\n+mad_get_timeout in mad.c.o\n+mad_get_retries in mad.c.o\n+mad_encode in mad.c.o\n+mad_build_pkt in mad.c.o\n+bm_call_via in bm.c.o\n mad_dump_int in dump.c.o\n mad_dump_uint in dump.c.o\n mad_dump_hex in dump.c.o\n mad_dump_rhex in dump.c.o\n mad_dump_linkwidth in dump.c.o\n mad_dump_linkwidthsup in dump.c.o\n mad_dump_linkwidthen in dump.c.o\n@@ -136,120 +125,70 @@\n mad_dump_cc_cacongestionentry in dump.c.o\n mad_dump_cc_congestioncontroltable in dump.c.o\n mad_dump_cc_congestioncontroltableentry in dump.c.o\n mad_dump_cc_timestamp in dump.c.o\n mad_dump_classportinfo in dump.c.o\n mad_dump_portinfo_ext in dump.c.o\n xdump in dump.c.o\n+ib_vendor_call in vendor.c.o\n+ib_vendor_call_via in vendor.c.o\n mad_send_via in serv.c.o\n mad_send in serv.c.o\n mad_respond_via in serv.c.o\n mad_respond in serv.c.o\n mad_receive in serv.c.o\n mad_receive_via in serv.c.o\n mad_alloc in serv.c.o\n mad_free in serv.c.o\n-mad_class_agent in register.c.o\n-rdmacore50_0_mad_register_port_client in register.c.o\n-mad_register_client in register.c.o\n-mad_register_client_via in register.c.o\n-mad_register_server in register.c.o\n-mad_register_server_via in register.c.o\n-sa_rpc_call in sa.c.o\n-sa_call in sa.c.o\n-ib_path_query_via in sa.c.o\n-ib_path_query in sa.c.o\n-ib_node_query_via in sa.c.o\n-\n-fields.c.o:\n-0000000000000000 r .LC0\n-0000000000000006 r .LC1\n- U __memset_chk\n- U __printf_chk\n- U __snprintf_chk\n- U __stack_chk_fail\n-0000000000000000 t _mad_dump\n-0000000000000000 d ib_mad_f\n-00000000000004f0 T mad_decode_field\n- U mad_dump_array\n-00000000000008b0 T mad_dump_field\n- U mad_dump_hex\n- U mad_dump_linkdowndefstate\n- U mad_dump_linkspeed\n- U mad_dump_linkspeeden\n- U mad_dump_linkspeedext\n- U mad_dump_linkspeedexten\n- U mad_dump_linkspeedextsup\n- U mad_dump_linkspeedsup\n- U mad_dump_linkwidth\n- U mad_dump_linkwidthen\n- U mad_dump_linkwidthsup\n- U mad_dump_mtu\n- U mad_dump_node_type\n- U mad_dump_opervls\n- U mad_dump_physportstate\n- U mad_dump_portcapmask\n- U mad_dump_portcapmask2\n- U mad_dump_portstate\n- U mad_dump_rhex\n- U mad_dump_string\n- U mad_dump_uint\n-00000000000009e0 T mad_dump_val\n- U mad_dump_vlcap\n-0000000000000670 T mad_encode_field\n-0000000000000a50 T mad_field_name\n-0000000000000480 T mad_get_array\n-0000000000000120 T mad_get_field\n-0000000000000390 T mad_get_field64\n-0000000000000850 T mad_print_field\n-0000000000000410 T mad_set_array\n-0000000000000230 T mad_set_field\n-00000000000003d0 T mad_set_field64\n- U memcpy\n- U rdmacore50_0_mad_dump_linkspeedext2\n- U rdmacore50_0_mad_dump_linkspeedexten2\n- U rdmacore50_0_mad_dump_linkspeedextsup2\n- U strlen\n+pma_query_via in gs.c.o\n+performance_reset_via in gs.c.o\n+portid2portnum in portid.c.o\n+portid2str in portid.c.o\n+str2drpath in portid.c.o\n+drpath2str in portid.c.o\n+mad_get_field in fields.c.o\n+mad_set_field in fields.c.o\n+mad_get_field64 in fields.c.o\n+mad_set_field64 in fields.c.o\n+mad_set_array in fields.c.o\n+mad_get_array in fields.c.o\n+mad_decode_field in fields.c.o\n+mad_encode_field in fields.c.o\n+mad_print_field in fields.c.o\n+mad_dump_field in fields.c.o\n+mad_dump_val in fields.c.o\n+mad_field_name in fields.c.o\n+cc_query_status_via in cc.c.o\n+cc_config_status_via in cc.c.o\n \n-smp.c.o:\n+sa.c.o:\n 0000000000000000 r .LC0\n-0000000000000000 r .LC1\n+0000000000000030 r .LC1\n+0000000000000000 r .LC2\n+0000000000000060 r .LC4\n+0000000000000008 r .LC5\n+0000000000000090 r .LC7\n U __fprintf_chk\n 0000000000000000 r __func__.0\n 0000000000000020 r __func__.1\n+0000000000000038 r __func__.2\n U __stack_chk_fail\n U getpid\n+0000000000000480 T ib_node_query_via\n+0000000000000460 T ib_path_query\n+0000000000000330 T ib_path_query_via\n U ibdebug\n- U mad_rpc\n+ U mad_decode_field\n+ U mad_encode_field\n+ U mad_rpc_rmpp\n+ U mad_trid\n U portid2str\n U rdmacore50_0_ibmp\n-0000000000000010 T smp_mkey_get\n-0000000000000000 T smp_mkey_set\n-00000000000006f0 T smp_query\n-0000000000000430 T smp_query_status_via\n-00000000000005a0 T smp_query_via\n-00000000000002e0 T smp_set\n-0000000000000020 T smp_set_status_via\n-0000000000000190 T smp_set_via\n- U stderr\n-\n-bm.c.o:\n-0000000000000000 r .LC0\n-0000000000000028 r .LC1\n-0000000000000000 r .LC2\n-0000000000000058 r .LC3\n- U __fprintf_chk\n-0000000000000000 r __func__.0\n- U __stack_chk_fail\n-0000000000000000 T bm_call_via\n- U getpid\n- U ibdebug\n- U mad_rpc\n- U mad_send_via\n- U portid2str\n+0000000000000190 T sa_call\n+0000000000000000 T sa_rpc_call\n U stderr\n \n rpc.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000140 r .LC10\n 0000000000000180 r .LC11\n@@ -334,72 +273,85 @@\n U umad_open_port\n U umad_recv\n U umad_send\n U umad_size\n U umad_status\n U xdump\n \n-portid.c.o:\n+resolve.c.o:\n 0000000000000000 r .LC0\n-0000000000000007 r .LC1\n-000000000000000f r .LC2\n-0000000000000024 r .LC3\n-0000000000000028 r .LC4\n+ U __errno_location\n U __fprintf_chk\n-0000000000000000 r __func__.0\n- U __snprintf_chk\n- U __sprintf_chk\n+0000000000000020 r __func__.0\n U __stack_chk_fail\n-0000000000000000 d buf.1\n-0000000000000370 T drpath2str\n- U free\n U getpid\n- U ibdebug\n- U inet_ntop\n-0000000000000000 T portid2portnum\n-0000000000000030 T portid2str\n+ U ib_path_query_via\n+0000000000000200 T ib_resolve_gid_via\n+0000000000000320 T ib_resolve_guid_via\n+00000000000009c0 T ib_resolve_portid_str\n+00000000000006c0 T ib_resolve_portid_str_via\n+00000000000009d0 T ib_resolve_self\n+0000000000000560 T ib_resolve_self_via\n+0000000000000100 T ib_resolve_smlid\n+0000000000000000 T ib_resolve_smlid_via\n+ U inet_pton\n+ U mad_decode_field\n+ U mad_encode_field\n+ U mad_set_field64\n+ U rdmacore50_0_ibmp\n+ U smp_query_via\n U stderr\n-0000000000000230 T str2drpath\n- U strchr\n- U strdup\n+ U str2drpath\n U strtol\n+ U strtoull\n \n-gs.c.o:\n+smp.c.o:\n 0000000000000000 r .LC0\n-0000000000000028 r .LC1\n-0000000000000000 r .LC2\n-0000000000000008 r .LC3\n-0000000000000058 r .LC5\n-0000000000000010 r .LC6\n- U __errno_location\n+0000000000000000 r .LC1\n U __fprintf_chk\n 0000000000000000 r __func__.0\n-0000000000000018 r __func__.1\n+0000000000000020 r __func__.1\n U __stack_chk_fail\n U getpid\n U ibdebug\n U mad_rpc\n- U mad_set_field\n-00000000000001a0 T performance_reset_via\n-0000000000000000 T pma_query_via\n+ U portid2str\n+ U rdmacore50_0_ibmp\n+0000000000000010 T smp_mkey_get\n+0000000000000000 T smp_mkey_set\n+00000000000006f0 T smp_query\n+0000000000000430 T smp_query_status_via\n+00000000000005a0 T smp_query_via\n+00000000000002e0 T smp_set\n+0000000000000020 T smp_set_status_via\n+0000000000000190 T smp_set_via\n U stderr\n \n-cc.c.o:\n+register.c.o:\n 0000000000000000 r .LC0\n+0000000000000030 r .LC1\n+0000000000000068 r .LC2\n+00000000000000a0 r .LC3\n U __fprintf_chk\n 0000000000000000 r __func__.0\n 0000000000000020 r __func__.1\n U __stack_chk_fail\n-0000000000000170 T cc_config_status_via\n-0000000000000000 T cc_query_status_via\n U getpid\n U ibdebug\n- U mad_rpc\n- U portid2str\n+0000000000000000 T mad_class_agent\n+0000000000000130 T mad_register_client\n+0000000000000250 T mad_register_client_via\n+0000000000000370 T mad_register_server\n+0000000000000590 T mad_register_server_via\n+ U mad_rpc_portid\n+ U rdmacore50_0_ibmp\n+0000000000000030 T rdmacore50_0_mad_register_port_client\n U stderr\n+ U umad_register\n+ U umad_register_oui\n \n mad.c.o:\n 0000000000000000 r .LC0\n 0000000000000038 r .LC1\n U __errno_location\n U __fprintf_chk\n 0000000000000000 r __func__.0\n@@ -422,56 +374,28 @@\n U time\n 0000000000000000 b trid.1\n U umad_get_mad\n U umad_set_addr\n U umad_set_grh\n U umad_set_pkey\n \n-resolve.c.o:\n-0000000000000000 r .LC0\n- U __errno_location\n- U __fprintf_chk\n-0000000000000020 r __func__.0\n- U __stack_chk_fail\n- U getpid\n- U ib_path_query_via\n-0000000000000200 T ib_resolve_gid_via\n-0000000000000320 T ib_resolve_guid_via\n-00000000000009c0 T ib_resolve_portid_str\n-00000000000006c0 T ib_resolve_portid_str_via\n-00000000000009d0 T ib_resolve_self\n-0000000000000560 T ib_resolve_self_via\n-0000000000000100 T ib_resolve_smlid\n-0000000000000000 T ib_resolve_smlid_via\n- U inet_pton\n- U mad_decode_field\n- U mad_encode_field\n- U mad_set_field64\n- U rdmacore50_0_ibmp\n- U smp_query_via\n- U stderr\n- U str2drpath\n- U strtol\n- U strtoull\n-\n-vendor.c.o:\n+bm.c.o:\n 0000000000000000 r .LC0\n 0000000000000028 r .LC1\n- U __errno_location\n+0000000000000000 r .LC2\n+0000000000000058 r .LC3\n U __fprintf_chk\n 0000000000000000 r __func__.0\n U __stack_chk_fail\n+0000000000000000 T bm_call_via\n U getpid\n-0000000000000000 T ib_vendor_call\n-0000000000000270 T ib_vendor_call_via\n U ibdebug\n- U mad_rpc_rmpp\n+ U mad_rpc\n U mad_send_via\n U portid2str\n- U rdmacore50_0_ibmp\n U stderr\n \n dump.c.o:\n 0000000000000000 r .LC0\n 0000000000000003 r .LC1\n 000000000000002f r .LC10\n 0000000000000160 r .LC100\n@@ -730,14 +654,31 @@\n 00000000000010d0 T rdmacore50_0_mad_dump_linkspeedextsup2\n U snprintf\n U stderr\n U strlen\n U strncpy\n 0000000000004fd0 T xdump\n \n+vendor.c.o:\n+0000000000000000 r .LC0\n+0000000000000028 r .LC1\n+ U __errno_location\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+ U __stack_chk_fail\n+ U getpid\n+0000000000000000 T ib_vendor_call\n+0000000000000270 T ib_vendor_call_via\n+ U ibdebug\n+ U mad_rpc_rmpp\n+ U mad_send_via\n+ U portid2str\n+ U rdmacore50_0_ibmp\n+ U stderr\n+\n serv.c.o:\n 0000000000000000 r .LC0\n 0000000000000028 r .LC1\n 0000000000000000 r .LC2\n 0000000000000050 r .LC3\n 000000000000000f r .LC4\n 0000000000000078 r .LC5\n@@ -773,56 +714,115 @@\n U umad_get_mad\n U umad_get_mad_addr\n U umad_recv\n U umad_send\n U umad_size\n U xdump\n \n-register.c.o:\n+gs.c.o:\n 0000000000000000 r .LC0\n-0000000000000030 r .LC1\n-0000000000000068 r .LC2\n-00000000000000a0 r .LC3\n+0000000000000028 r .LC1\n+0000000000000000 r .LC2\n+0000000000000008 r .LC3\n+0000000000000058 r .LC5\n+0000000000000010 r .LC6\n+ U __errno_location\n U __fprintf_chk\n 0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n+0000000000000018 r __func__.1\n U __stack_chk_fail\n U getpid\n U ibdebug\n-0000000000000000 T mad_class_agent\n-0000000000000130 T mad_register_client\n-0000000000000250 T mad_register_client_via\n-0000000000000370 T mad_register_server\n-0000000000000590 T mad_register_server_via\n- U mad_rpc_portid\n- U rdmacore50_0_ibmp\n-0000000000000030 T rdmacore50_0_mad_register_port_client\n+ U mad_rpc\n+ U mad_set_field\n+00000000000001a0 T performance_reset_via\n+0000000000000000 T pma_query_via\n U stderr\n- U umad_register\n- U umad_register_oui\n \n-sa.c.o:\n+portid.c.o:\n+0000000000000000 r .LC0\n+0000000000000007 r .LC1\n+000000000000000f r .LC2\n+0000000000000024 r .LC3\n+0000000000000028 r .LC4\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+ U __snprintf_chk\n+ U __sprintf_chk\n+ U __stack_chk_fail\n+0000000000000000 d buf.1\n+0000000000000370 T drpath2str\n+ U free\n+ U getpid\n+ U ibdebug\n+ U inet_ntop\n+0000000000000000 T portid2portnum\n+0000000000000030 T portid2str\n+ U stderr\n+0000000000000230 T str2drpath\n+ U strchr\n+ U strdup\n+ U strtol\n+\n+fields.c.o:\n+0000000000000000 r .LC0\n+0000000000000006 r .LC1\n+ U __memset_chk\n+ U __printf_chk\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+0000000000000000 t _mad_dump\n+0000000000000000 d ib_mad_f\n+00000000000004f0 T mad_decode_field\n+ U mad_dump_array\n+00000000000008b0 T mad_dump_field\n+ U mad_dump_hex\n+ U mad_dump_linkdowndefstate\n+ U mad_dump_linkspeed\n+ U mad_dump_linkspeeden\n+ U mad_dump_linkspeedext\n+ U mad_dump_linkspeedexten\n+ U mad_dump_linkspeedextsup\n+ U mad_dump_linkspeedsup\n+ U mad_dump_linkwidth\n+ U mad_dump_linkwidthen\n+ U mad_dump_linkwidthsup\n+ U mad_dump_mtu\n+ U mad_dump_node_type\n+ U mad_dump_opervls\n+ U mad_dump_physportstate\n+ U mad_dump_portcapmask\n+ U mad_dump_portcapmask2\n+ U mad_dump_portstate\n+ U mad_dump_rhex\n+ U mad_dump_string\n+ U mad_dump_uint\n+00000000000009e0 T mad_dump_val\n+ U mad_dump_vlcap\n+0000000000000670 T mad_encode_field\n+0000000000000a50 T mad_field_name\n+0000000000000480 T mad_get_array\n+0000000000000120 T mad_get_field\n+0000000000000390 T mad_get_field64\n+0000000000000850 T mad_print_field\n+0000000000000410 T mad_set_array\n+0000000000000230 T mad_set_field\n+00000000000003d0 T mad_set_field64\n+ U memcpy\n+ U rdmacore50_0_mad_dump_linkspeedext2\n+ U rdmacore50_0_mad_dump_linkspeedexten2\n+ U rdmacore50_0_mad_dump_linkspeedextsup2\n+ U strlen\n+\n+cc.c.o:\n 0000000000000000 r .LC0\n-0000000000000030 r .LC1\n-0000000000000000 r .LC2\n-0000000000000060 r .LC4\n-0000000000000008 r .LC5\n-0000000000000090 r .LC7\n U __fprintf_chk\n 0000000000000000 r __func__.0\n 0000000000000020 r __func__.1\n-0000000000000038 r __func__.2\n U __stack_chk_fail\n+0000000000000170 T cc_config_status_via\n+0000000000000000 T cc_query_status_via\n U getpid\n-0000000000000480 T ib_node_query_via\n-0000000000000460 T ib_path_query\n-0000000000000330 T ib_path_query_via\n U ibdebug\n- U mad_decode_field\n- U mad_encode_field\n- U mad_rpc_rmpp\n- U mad_trid\n+ U mad_rpc\n U portid2str\n- U rdmacore50_0_ibmp\n-0000000000000190 T sa_call\n-0000000000000000 T sa_rpc_call\n U stderr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,15 +1,15 @@\n ---------- 0 0 0 4042 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 54624 1970-01-01 00:00:00.000000 fields.c.o\n-?rw-r--r-- 0 0 0 6504 1970-01-01 00:00:00.000000 smp.c.o\n-?rw-r--r-- 0 0 0 3624 1970-01-01 00:00:00.000000 bm.c.o\n+?rw-r--r-- 0 0 0 6264 1970-01-01 00:00:00.000000 sa.c.o\n ?rw-r--r-- 0 0 0 16904 1970-01-01 00:00:00.000000 rpc.c.o\n-?rw-r--r-- 0 0 0 5232 1970-01-01 00:00:00.000000 portid.c.o\n-?rw-r--r-- 0 0 0 4232 1970-01-01 00:00:00.000000 gs.c.o\n-?rw-r--r-- 0 0 0 3168 1970-01-01 00:00:00.000000 cc.c.o\n-?rw-r--r-- 0 0 0 6128 1970-01-01 00:00:00.000000 mad.c.o\n ?rw-r--r-- 0 0 0 6936 1970-01-01 00:00:00.000000 resolve.c.o\n-?rw-r--r-- 0 0 0 4296 1970-01-01 00:00:00.000000 vendor.c.o\n+?rw-r--r-- 0 0 0 6504 1970-01-01 00:00:00.000000 smp.c.o\n+?rw-r--r-- 0 0 0 6848 1970-01-01 00:00:00.000000 register.c.o\n+?rw-r--r-- 0 0 0 6128 1970-01-01 00:00:00.000000 mad.c.o\n+?rw-r--r-- 0 0 0 3624 1970-01-01 00:00:00.000000 bm.c.o\n ?rw-r--r-- 0 0 0 59120 1970-01-01 00:00:00.000000 dump.c.o\n+?rw-r--r-- 0 0 0 4296 1970-01-01 00:00:00.000000 vendor.c.o\n ?rw-r--r-- 0 0 0 8552 1970-01-01 00:00:00.000000 serv.c.o\n-?rw-r--r-- 0 0 0 6848 1970-01-01 00:00:00.000000 register.c.o\n-?rw-r--r-- 0 0 0 6264 1970-01-01 00:00:00.000000 sa.c.o\n+?rw-r--r-- 0 0 0 4232 1970-01-01 00:00:00.000000 gs.c.o\n+?rw-r--r-- 0 0 0 5232 1970-01-01 00:00:00.000000 portid.c.o\n+?rw-r--r-- 0 0 0 54624 1970-01-01 00:00:00.000000 fields.c.o\n+?rw-r--r-- 0 0 0 3168 1970-01-01 00:00:00.000000 cc.c.o\n"}]}]}]}]}, {"source1": "libibnetdisc-dev_50.0-2_amd64.deb", "source2": "libibnetdisc-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 1072 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 44628 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 44624 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibnetdisc.a", "source2": "./usr/lib/x86_64-linux-gnu/libibnetdisc.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "comments": ["error from `nm -s {}`:", "nm: mmio.c.o: no symbols"], "unified_diff": "@@ -1,9 +1,16 @@\n \n Archive index:\n+ibnd_get_chassis_type in chassis.c.o\n+ibnd_get_chassis_slot_str in chassis.c.o\n+ibnd_is_xsigo_guid in chassis.c.o\n+ibnd_is_xsigo_hca in chassis.c.o\n+ibnd_is_xsigo_tca in chassis.c.o\n+ibnd_get_chassis_guid in chassis.c.o\n+rdmacore50_0_group_nodes in chassis.c.o\n ibnd_find_node_guid in ibnetdisc.c.o\n rdmacore50_0_add_to_nodeguid_hash in ibnetdisc.c.o\n rdmacore50_0_add_to_portguid_hash in ibnetdisc.c.o\n rdmacore50_0_create_lid2guid in ibnetdisc.c.o\n rdmacore50_0_destroy_lid2guid in ibnetdisc.c.o\n rdmacore50_0_add_to_portlid_hash in ibnetdisc.c.o\n rdmacore50_0_add_to_type_list in ibnetdisc.c.o\n@@ -23,58 +30,125 @@\n ibnd_get_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_get_agg_linkspeedextsup in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext in ibnetdisc.c.o\n rdmacore50_0_mlnx_ext_port_info_err in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext_bits in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedextsup in ibnetdisc.c.o\n-ibnd_get_chassis_type in chassis.c.o\n-ibnd_get_chassis_slot_str in chassis.c.o\n-ibnd_is_xsigo_guid in chassis.c.o\n-ibnd_is_xsigo_hca in chassis.c.o\n-ibnd_is_xsigo_tca in chassis.c.o\n-ibnd_get_chassis_guid in chassis.c.o\n-rdmacore50_0_group_nodes in chassis.c.o\n rdmacore50_0_issue_smp in query_smp.c.o\n rdmacore50_0_smp_engine_init in query_smp.c.o\n rdmacore50_0_smp_engine_destroy in query_smp.c.o\n rdmacore50_0_process_mads in query_smp.c.o\n ibnd_load_fabric in ibnetdisc_cache.c.o\n ibnd_cache_fabric in ibnetdisc_cache.c.o\n+rdmacore50_0_iset_create in interval_set.c.o\n+rdmacore50_0_iset_destroy in interval_set.c.o\n+rdmacore50_0_iset_insert_range in interval_set.c.o\n+rdmacore50_0_iset_alloc_range in interval_set.c.o\n+rdmacore50_0_close_node_name_map in node_name_map.c.o\n+rdmacore50_0_remap_node_name in node_name_map.c.o\n+rdmacore50_0_clean_nodedesc in node_name_map.c.o\n+rdmacore50_0_open_node_name_map in node_name_map.c.o\n+rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n+rdmacore50_0_bitmap_zero_region in bitmap.c.o\n+rdmacore50_0_bitmap_fill_region in bitmap.c.o\n+rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n rdmacore50_0_cl_qmap_init in cl_map.c.o\n rdmacore50_0_cl_qmap_get in cl_map.c.o\n rdmacore50_0_cl_qmap_get_next in cl_map.c.o\n rdmacore50_0_cl_qmap_apply_func in cl_map.c.o\n rdmacore50_0_cl_qmap_insert in cl_map.c.o\n rdmacore50_0_cl_qmap_remove_item in cl_map.c.o\n rdmacore50_0_cl_qmap_remove in cl_map.c.o\n rdmacore50_0_cl_qmap_merge in cl_map.c.o\n rdmacore50_0_cl_qmap_delta in cl_map.c.o\n-rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n-rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_open_cdev in open_cdev.c.o\n-rdmacore50_0_close_node_name_map in node_name_map.c.o\n-rdmacore50_0_remap_node_name in node_name_map.c.o\n-rdmacore50_0_clean_nodedesc in node_name_map.c.o\n-rdmacore50_0_open_node_name_map in node_name_map.c.o\n-rdmacore50_0_iset_create in interval_set.c.o\n-rdmacore50_0_iset_destroy in interval_set.c.o\n-rdmacore50_0_iset_insert_range in interval_set.c.o\n-rdmacore50_0_iset_alloc_range in interval_set.c.o\n-rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n-rdmacore50_0_bitmap_zero_region in bitmap.c.o\n-rdmacore50_0_bitmap_fill_region in bitmap.c.o\n-rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n rdmacore50_0_set_fd_nonblock in util.c.o\n rdmacore50_0_get_random in util.c.o\n rdmacore50_0_check_env in util.c.o\n rdmacore50_0_xorshift32 in util.c.o\n+rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n+rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n+\n+chassis.c.o:\n+0000000000000000 r .LC0\n+0000000000000019 r .LC1\n+00000000000000b8 r .LC10\n+0000000000000128 r .LC11\n+0000000000000198 r .LC12\n+0000000000000208 r .LC13\n+0000000000000270 r .LC14\n+00000000000002d8 r .LC15\n+0000000000000300 r .LC16\n+0000000000000348 r .LC17\n+0000000000000388 r .LC18\n+0000000000000000 r .LC3\n+0000000000000030 r .LC4\n+0000000000000041 r .LC5\n+000000000000005d r .LC6\n+000000000000006b r .LC7\n+0000000000000030 r .LC8\n+0000000000000068 r .LC9\n+0000000000000000 d ChassisSlotTypeStr\n+0000000000000020 d ChassisTypeStr\n+0000000000000000 r __FUNCTION__.0\n+ U __fprintf_chk\n+ U __printf_chk\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+00000000000007a0 r anafa_line_slot_2_sfb12\n+0000000000000720 r anafa_line_slot_2_sfb18\n+00000000000006a0 r anafa_line_slot_2_sfb18x2\n+0000000000000820 r anafa_line_slot_2_sfb4\n+0000000000000720 r anafa_line_slot_2_sfb4200\n+00000000000006a0 r anafa_sfb4200_slot_2_slb\n+00000000000005a0 r anafa_spine12_slot_2_slb\n+00000000000006a0 r anafa_spine18_slot_2_slb\n+00000000000004e0 r anafa_spine18x2_slot_2_slb\n+0000000000000560 r anafa_spine4_slot_2_slb\n+ U calloc\n+ U free\n+00000000000000d0 t get_chassisguid\n+0000000000000330 t get_router_slot.isra.0\n+0000000000000240 t get_spine_index\n+ U ibdebug\n+0000000000000b90 T ibnd_get_chassis_guid\n+0000000000000a20 T ibnd_get_chassis_slot_str\n+0000000000000970 T ibnd_get_chassis_type\n+0000000000000b00 T ibnd_is_xsigo_guid\n+0000000000000b30 T ibnd_is_xsigo_hca\n+0000000000000b60 T ibnd_is_xsigo_tca\n+0000000000000020 r int2ext_map_sfb4700x2\n+0000000000000200 r int2ext_map_slb2024\n+00000000000003c0 r int2ext_map_slb24\n+0000000000000160 r int2ext_map_slb4018\n+00000000000002e0 r int2ext_map_slb8\n+0000000000000620 r ipr_slot_2_sfb4_port\n+00000000000004b0 t is_line\n+0000000000000000 t is_spine\n+00000000000007e0 r line_slot_2_sfb12\n+0000000000000760 r line_slot_2_sfb18\n+00000000000006e0 r line_slot_2_sfb18x2\n+0000000000000860 r line_slot_2_sfb4\n+0000000000000660 r line_slot_2_sfb4200\n+ U mad_get_field\n+ U mad_get_field64\n+0000000000000540 t pass_on_lines_catch_spines\n+0000000000000700 t pass_on_spines_catch_lines\n+0000000000000c00 T rdmacore50_0_group_nodes\n+00000000000004a0 r sfb4200_slot_2_slb\n+00000000000005e0 r spine12_slot_2_slb\n+0000000000000520 r spine18_slot_2_slb\n+00000000000005e0 r spine4_slot_2_slb\n+ U stderr\n+ U strncpy\n+ U strtol\n \n ibnetdisc.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000128 r .LC10\n 0000000000000150 r .LC11\n 0000000000000180 r .LC12\n@@ -182,88 +256,14 @@\n 0000000000002040 t recv_port_info\n 0000000000000050 t recv_switch_info\n U smp_mkey_set\n U snprintf\n U stderr\n U str2drpath\n \n-chassis.c.o:\n-0000000000000000 r .LC0\n-0000000000000019 r .LC1\n-00000000000000b8 r .LC10\n-0000000000000128 r .LC11\n-0000000000000198 r .LC12\n-0000000000000208 r .LC13\n-0000000000000270 r .LC14\n-00000000000002d8 r .LC15\n-0000000000000300 r .LC16\n-0000000000000348 r .LC17\n-0000000000000388 r .LC18\n-0000000000000000 r .LC3\n-0000000000000030 r .LC4\n-0000000000000041 r .LC5\n-000000000000005d r .LC6\n-000000000000006b r .LC7\n-0000000000000030 r .LC8\n-0000000000000068 r .LC9\n-0000000000000000 d ChassisSlotTypeStr\n-0000000000000020 d ChassisTypeStr\n-0000000000000000 r __FUNCTION__.0\n- U __fprintf_chk\n- U __printf_chk\n- U __snprintf_chk\n- U __stack_chk_fail\n-00000000000007a0 r anafa_line_slot_2_sfb12\n-0000000000000720 r anafa_line_slot_2_sfb18\n-00000000000006a0 r anafa_line_slot_2_sfb18x2\n-0000000000000820 r anafa_line_slot_2_sfb4\n-0000000000000720 r anafa_line_slot_2_sfb4200\n-00000000000006a0 r anafa_sfb4200_slot_2_slb\n-00000000000005a0 r anafa_spine12_slot_2_slb\n-00000000000006a0 r anafa_spine18_slot_2_slb\n-00000000000004e0 r anafa_spine18x2_slot_2_slb\n-0000000000000560 r anafa_spine4_slot_2_slb\n- U calloc\n- U free\n-00000000000000d0 t get_chassisguid\n-0000000000000330 t get_router_slot.isra.0\n-0000000000000240 t get_spine_index\n- U ibdebug\n-0000000000000b90 T ibnd_get_chassis_guid\n-0000000000000a20 T ibnd_get_chassis_slot_str\n-0000000000000970 T ibnd_get_chassis_type\n-0000000000000b00 T ibnd_is_xsigo_guid\n-0000000000000b30 T ibnd_is_xsigo_hca\n-0000000000000b60 T ibnd_is_xsigo_tca\n-0000000000000020 r int2ext_map_sfb4700x2\n-0000000000000200 r int2ext_map_slb2024\n-00000000000003c0 r int2ext_map_slb24\n-0000000000000160 r int2ext_map_slb4018\n-00000000000002e0 r int2ext_map_slb8\n-0000000000000620 r ipr_slot_2_sfb4_port\n-00000000000004b0 t is_line\n-0000000000000000 t is_spine\n-00000000000007e0 r line_slot_2_sfb12\n-0000000000000760 r line_slot_2_sfb18\n-00000000000006e0 r line_slot_2_sfb18x2\n-0000000000000860 r line_slot_2_sfb4\n-0000000000000660 r line_slot_2_sfb4200\n- U mad_get_field\n- U mad_get_field64\n-0000000000000540 t pass_on_lines_catch_spines\n-0000000000000700 t pass_on_spines_catch_lines\n-0000000000000c00 T rdmacore50_0_group_nodes\n-00000000000004a0 r sfb4200_slot_2_slb\n-00000000000005e0 r spine12_slot_2_slb\n-0000000000000520 r spine18_slot_2_slb\n-00000000000005e0 r spine4_slot_2_slb\n- U stderr\n- U strncpy\n- U strtol\n-\n query_smp.c.o:\n 0000000000000000 r .LC0\n 000000000000001b r .LC1\n 000000000000007a r .LC10\n 00000000000000c8 r .LC11\n 00000000000000f0 r .LC12\n 0000000000000120 r .LC13\n@@ -371,68 +371,25 @@\n U rdmacore50_0_group_nodes\n U read\n U stat\n U strerror\n U unlink\n U write\n \n-mmio.c.o:\n-\n-cl_map.c.o:\n-00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n-0000000000000db0 T rdmacore50_0_cl_qmap_delta\n-0000000000000060 T rdmacore50_0_cl_qmap_get\n-00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n-0000000000000000 T rdmacore50_0_cl_qmap_init\n-0000000000000140 T rdmacore50_0_cl_qmap_insert\n-00000000000008f0 T rdmacore50_0_cl_qmap_merge\n-00000000000008b0 T rdmacore50_0_cl_qmap_remove\n-0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n-\n-rdma_nl.c.o:\n- U __stack_chk_fail\n- U nl_connect\n- U nl_recvmsgs_default\n- U nl_send_auto\n- U nl_send_simple\n- U nl_socket_alloc\n- U nl_socket_disable_auto_ack\n- U nl_socket_disable_msg_peek\n- U nl_socket_free\n- U nl_socket_modify_cb\n- U nl_socket_modify_err_cb\n- U nla_put\n- U nlmsg_alloc_simple\n- U nlmsg_free\n-0000000000000200 T rdmacore50_0_rdmanl_get_chardev\n-0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n-0000000000000130 T rdmacore50_0_rdmanl_get_devices\n-0000000000000000 D rdmacore50_0_rdmanl_policy\n-0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n-0000000000000000 t rdmanl_saw_err_cb\n- U strlen\n-\n-open_cdev.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-000000000000001b r .LC2\n- U __asprintf_chk\n- U __stack_chk_fail\n- U close\n+interval_set.c.o:\n+ U __errno_location\n+ U calloc\n U free\n- U fstat\n- U inotify_add_watch\n- U inotify_init1\n- U open\n-0000000000000000 t open_cdev_robust.isra.0\n- U poll\n-0000000000000380 T rdmacore50_0_open_cdev\n- U read\n- U timerfd_create\n- U timerfd_settime\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+0000000000000290 T rdmacore50_0_iset_alloc_range\n+0000000000000000 T rdmacore50_0_iset_create\n+0000000000000050 T rdmacore50_0_iset_destroy\n+0000000000000090 T rdmacore50_0_iset_insert_range\n \n node_name_map.c.o:\n 0000000000000000 r .LC0\n 000000000000001b r .LC1\n 000000000000001d r .LC2\n 0000000000000000 r .LC3\n 0000000000000020 r .LC4\n@@ -459,37 +416,80 @@\n U strchr\n U strdup\n U strerror\n U strncpy\n U strtok\n U strtoull\n \n-interval_set.c.o:\n- U __errno_location\n- U calloc\n- U free\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n-0000000000000290 T rdmacore50_0_iset_alloc_range\n-0000000000000000 T rdmacore50_0_iset_create\n-0000000000000050 T rdmacore50_0_iset_destroy\n-0000000000000090 T rdmacore50_0_iset_insert_range\n-\n bitmap.c.o:\n U memset\n 0000000000000160 T rdmacore50_0_bitmap_fill_region\n 0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n 0000000000000220 T rdmacore50_0_bitmap_find_free_region\n 0000000000000090 T rdmacore50_0_bitmap_zero_region\n \n+mmio.c.o:\n+\n+cl_map.c.o:\n+00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n+0000000000000db0 T rdmacore50_0_cl_qmap_delta\n+0000000000000060 T rdmacore50_0_cl_qmap_get\n+00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n+0000000000000000 T rdmacore50_0_cl_qmap_init\n+0000000000000140 T rdmacore50_0_cl_qmap_insert\n+00000000000008f0 T rdmacore50_0_cl_qmap_merge\n+00000000000008b0 T rdmacore50_0_cl_qmap_remove\n+0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+\n+open_cdev.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+000000000000001b r .LC2\n+ U __asprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U free\n+ U fstat\n+ U inotify_add_watch\n+ U inotify_init1\n+ U open\n+0000000000000000 t open_cdev_robust.isra.0\n+ U poll\n+0000000000000380 T rdmacore50_0_open_cdev\n+ U read\n+ U timerfd_create\n+ U timerfd_settime\n+\n util.c.o:\n U fcntl\n U getenv\n U getrandom\n U rand_r\n 00000000000000d0 T rdmacore50_0_check_env\n 0000000000000050 T rdmacore50_0_get_random\n 0000000000000000 T rdmacore50_0_set_fd_nonblock\n 0000000000000110 T rdmacore50_0_xorshift32\n 0000000000000000 b seed.0\n U time\n+\n+rdma_nl.c.o:\n+ U __stack_chk_fail\n+ U nl_connect\n+ U nl_recvmsgs_default\n+ U nl_send_auto\n+ U nl_send_simple\n+ U nl_socket_alloc\n+ U nl_socket_disable_auto_ack\n+ U nl_socket_disable_msg_peek\n+ U nl_socket_free\n+ U nl_socket_modify_cb\n+ U nl_socket_modify_err_cb\n+ U nla_put\n+ U nlmsg_alloc_simple\n+ U nlmsg_free\n+0000000000000200 T rdmacore50_0_rdmanl_get_chardev\n+0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n+0000000000000130 T rdmacore50_0_rdmanl_get_devices\n+0000000000000000 D rdmacore50_0_rdmanl_policy\n+0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n+0000000000000000 t rdmanl_saw_err_cb\n+ U strlen\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,14 +1,14 @@\n ---------- 0 0 0 2206 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 32880 1970-01-01 00:00:00.000000 ibnetdisc.c.o\n ?rw-r--r-- 0 0 0 22736 1970-01-01 00:00:00.000000 chassis.c.o\n+?rw-r--r-- 0 0 0 32880 1970-01-01 00:00:00.000000 ibnetdisc.c.o\n ?rw-r--r-- 0 0 0 8680 1970-01-01 00:00:00.000000 query_smp.c.o\n ?rw-r--r-- 0 0 0 16424 1970-01-01 00:00:00.000000 ibnetdisc_cache.c.o\n+?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n+?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n+?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n ?rw-r--r-- 0 0 0 6176 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n-?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n-?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n-?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n+?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n"}]}]}]}]}, {"source1": "libibumad-dev_50.0-2_amd64.deb", "source2": "libibumad-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 1852 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 53792 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 53828 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibumad.a", "source2": "./usr/lib/x86_64-linux-gnu/libibumad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,14 +1,9 @@\n \n Archive index:\n-rdmacore50_0_sys_read_string in sysfs.c.o\n-rdmacore50_0_sys_read_guid in sysfs.c.o\n-rdmacore50_0_sys_read_gid in sysfs.c.o\n-rdmacore50_0_sys_read_uint64 in sysfs.c.o\n-rdmacore50_0_sys_read_uint in sysfs.c.o\n umad_init in umad.c.o\n umad_done in umad.c.o\n umad_get_cas_names in umad.c.o\n umad_release_ca in umad.c.o\n umad_release_port in umad.c.o\n umad_close_port in umad.c.o\n umad_get_mad in umad.c.o\n@@ -40,33 +35,19 @@\n umad_get_port in umad.c.o\n umad_free_ca_device_list in umad.c.o\n umad_class_str in umad_str.c.o\n umad_method_str in umad_str.c.o\n umad_common_mad_status_str in umad_str.c.o\n umad_sa_mad_status_str in umad_str.c.o\n umad_attribute_str in umad_str.c.o\n-\n-sysfs.c.o:\n-0000000000000000 r .LC0\n-0000000000000006 r .LC1\n- U __errno_location\n- U __snprintf_chk\n- U __stack_chk_fail\n- U close\n- U open\n-00000000000001d0 T rdmacore50_0_sys_read_gid\n-0000000000000110 T rdmacore50_0_sys_read_guid\n-0000000000000000 T rdmacore50_0_sys_read_string\n-00000000000003a0 T rdmacore50_0_sys_read_uint\n-0000000000000280 T rdmacore50_0_sys_read_uint64\n- U read\n- U strrchr\n- U strsep\n- U strtoul\n- U strtoull\n+rdmacore50_0_sys_read_string in sysfs.c.o\n+rdmacore50_0_sys_read_guid in sysfs.c.o\n+rdmacore50_0_sys_read_gid in sysfs.c.o\n+rdmacore50_0_sys_read_uint64 in sysfs.c.o\n+rdmacore50_0_sys_read_uint in sysfs.c.o\n \n umad.c.o:\n 0000000000000000 r .LC0\n 0000000000000016 r .LC1\n 000000000000004d r .LC10\n 0000000000000053 r .LC11\n 0000000000000057 r .LC12\n@@ -373,7 +354,26 @@\n 00000000000004eb r .LC98\n 0000000000000501 r .LC99\n 00000000000003f0 T umad_attribute_str\n 0000000000000000 T umad_class_str\n 00000000000002c0 T umad_common_mad_status_str\n 0000000000000140 T umad_method_str\n 0000000000000340 T umad_sa_mad_status_str\n+\n+sysfs.c.o:\n+0000000000000000 r .LC0\n+0000000000000006 r .LC1\n+ U __errno_location\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U open\n+00000000000001d0 T rdmacore50_0_sys_read_gid\n+0000000000000110 T rdmacore50_0_sys_read_guid\n+0000000000000000 T rdmacore50_0_sys_read_string\n+00000000000003a0 T rdmacore50_0_sys_read_uint\n+0000000000000280 T rdmacore50_0_sys_read_uint64\n+ U read\n+ U strrchr\n+ U strsep\n+ U strtoul\n+ U strtoull\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 930 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 4480 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r-- 0 0 0 45672 1970-01-01 00:00:00.000000 umad.c.o\n ?rw-r--r-- 0 0 0 15400 1970-01-01 00:00:00.000000 umad_str.c.o\n+?rw-r--r-- 0 0 0 4480 1970-01-01 00:00:00.000000 sysfs.c.o\n"}]}]}]}]}, {"source1": "libibverbs-dev_50.0-2_amd64.deb", "source2": "libibverbs-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 5540 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 636716 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 636640 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libbnxt_re-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libbnxt_re-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,23 +1,9 @@\n \n Archive index:\n-rdmacore50_0_bnxt_re_ring_rq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_sq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_srq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_srq_arm in db.c.o\n-rdmacore50_0_bnxt_re_ring_cq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_cq_arm_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_pstart_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_pend_db in db.c.o\n-rdmacore50_0_bnxt_re_fill_push_wcb in db.c.o\n-rdmacore50_0_bnxt_re_init_pbuf_list in db.c.o\n-rdmacore50_0_bnxt_re_get_pbuf in db.c.o\n-rdmacore50_0_bnxt_re_put_pbuf in db.c.o\n-rdmacore50_0_bnxt_re_destroy_pbuf_list in db.c.o\n-verbs_provider_bnxt_re in main.c.o\n rdmacore50_0_bnxt_re_query_device in verbs.c.o\n rdmacore50_0_bnxt_re_query_port in verbs.c.o\n rdmacore50_0_bnxt_re_get_toggle_mem in verbs.c.o\n rdmacore50_0_bnxt_re_notify_drv in verbs.c.o\n rdmacore50_0_bnxt_re_alloc_page in verbs.c.o\n rdmacore50_0_bnxt_re_alloc_pd in verbs.c.o\n rdmacore50_0_bnxt_re_free_pd in verbs.c.o\n@@ -39,89 +25,31 @@\n rdmacore50_0_bnxt_re_create_srq in verbs.c.o\n rdmacore50_0_bnxt_re_modify_srq in verbs.c.o\n rdmacore50_0_bnxt_re_destroy_srq in verbs.c.o\n rdmacore50_0_bnxt_re_query_srq in verbs.c.o\n rdmacore50_0_bnxt_re_post_srq_recv in verbs.c.o\n rdmacore50_0_bnxt_re_create_ah in verbs.c.o\n rdmacore50_0_bnxt_re_destroy_ah in verbs.c.o\n+verbs_provider_bnxt_re in main.c.o\n+rdmacore50_0_bnxt_re_ring_rq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_sq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_srq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_srq_arm in db.c.o\n+rdmacore50_0_bnxt_re_ring_cq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_cq_arm_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_pstart_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_pend_db in db.c.o\n+rdmacore50_0_bnxt_re_fill_push_wcb in db.c.o\n+rdmacore50_0_bnxt_re_init_pbuf_list in db.c.o\n+rdmacore50_0_bnxt_re_get_pbuf in db.c.o\n+rdmacore50_0_bnxt_re_put_pbuf in db.c.o\n+rdmacore50_0_bnxt_re_destroy_pbuf_list in db.c.o\n rdmacore50_0_bnxt_re_alloc_aligned in memory.c.o\n rdmacore50_0_bnxt_re_free_aligned in memory.c.o\n \n-db.c.o:\n- U __stack_chk_fail\n-0000000000000000 t bnxt_re_do_pacing\n- U calloc\n- U clock_gettime\n- U free\n-00000000000009c0 T rdmacore50_0_bnxt_re_destroy_pbuf_list\n-0000000000000500 T rdmacore50_0_bnxt_re_fill_push_wcb\n-0000000000000920 T rdmacore50_0_bnxt_re_get_pbuf\n-0000000000000600 T rdmacore50_0_bnxt_re_init_pbuf_list\n- U rdmacore50_0_bnxt_re_notify_drv\n-0000000000000980 T rdmacore50_0_bnxt_re_put_pbuf\n-00000000000003b0 T rdmacore50_0_bnxt_re_ring_cq_arm_db\n-0000000000000350 T rdmacore50_0_bnxt_re_ring_cq_db\n-00000000000004a0 T rdmacore50_0_bnxt_re_ring_pend_db\n-0000000000000440 T rdmacore50_0_bnxt_re_ring_pstart_db\n-00000000000001b0 T rdmacore50_0_bnxt_re_ring_rq_db\n-0000000000000220 T rdmacore50_0_bnxt_re_ring_sq_db\n-00000000000002f0 T rdmacore50_0_bnxt_re_ring_srq_arm\n-0000000000000290 T rdmacore50_0_bnxt_re_ring_srq_db\n- U rdmacore50_0_xorshift32\n-\n-main.c.o:\n- U __stack_chk_fail\n-0000000000000120 t bnxt_re_alloc_context\n-0000000000000000 d bnxt_re_cntx_ops\n-0000000000000000 d bnxt_re_dev_ops\n-0000000000000000 t bnxt_re_device_alloc\n-0000000000000020 t bnxt_re_free_context\n- U calloc\n-0000000000000000 r cna_table\n-0000000000000000 t drv__register_driver\n- U free\n- U ibv_query_device\n- U mmap\n- U munmap\n- U pthread_mutex_destroy\n- U pthread_mutex_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_bnxt_re_alloc_page\n- U rdmacore50_0_bnxt_re_alloc_pd\n- U rdmacore50_0_bnxt_re_arm_cq\n- U rdmacore50_0_bnxt_re_async_event\n- U rdmacore50_0_bnxt_re_create_ah\n- U rdmacore50_0_bnxt_re_create_cq\n- U rdmacore50_0_bnxt_re_create_qp\n- U rdmacore50_0_bnxt_re_create_srq\n- U rdmacore50_0_bnxt_re_dereg_mr\n- U rdmacore50_0_bnxt_re_destroy_ah\n- U rdmacore50_0_bnxt_re_destroy_cq\n- U rdmacore50_0_bnxt_re_destroy_qp\n- U rdmacore50_0_bnxt_re_destroy_srq\n- U rdmacore50_0_bnxt_re_free_pd\n- U rdmacore50_0_bnxt_re_modify_qp\n- U rdmacore50_0_bnxt_re_modify_srq\n- U rdmacore50_0_bnxt_re_poll_cq\n- U rdmacore50_0_bnxt_re_post_recv\n- U rdmacore50_0_bnxt_re_post_send\n- U rdmacore50_0_bnxt_re_post_srq_recv\n- U rdmacore50_0_bnxt_re_query_device\n- U rdmacore50_0_bnxt_re_query_port\n- U rdmacore50_0_bnxt_re_query_qp\n- U rdmacore50_0_bnxt_re_query_srq\n- U rdmacore50_0_bnxt_re_reg_dmabuf_mr\n- U rdmacore50_0_bnxt_re_reg_mr\n- U rdmacore50_0_bnxt_re_resize_cq\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_bnxt_re\n-\n verbs.c.o:\n 0000000000000000 r .LC0\n 000000000000007f r CSWTCH.132\n 0000000000000078 r CSWTCH.134\n U __errno_location\n U __snprintf_chk\n U __stack_chk_fail\n@@ -199,14 +127,86 @@\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_query_srq\n U rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_ibv_cmd_resize_cq\n \n+main.c.o:\n+ U __stack_chk_fail\n+0000000000000120 t bnxt_re_alloc_context\n+0000000000000000 d bnxt_re_cntx_ops\n+0000000000000000 d bnxt_re_dev_ops\n+0000000000000000 t bnxt_re_device_alloc\n+0000000000000020 t bnxt_re_free_context\n+ U calloc\n+0000000000000000 r cna_table\n+0000000000000000 t drv__register_driver\n+ U free\n+ U ibv_query_device\n+ U mmap\n+ U munmap\n+ U pthread_mutex_destroy\n+ U pthread_mutex_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_bnxt_re_alloc_page\n+ U rdmacore50_0_bnxt_re_alloc_pd\n+ U rdmacore50_0_bnxt_re_arm_cq\n+ U rdmacore50_0_bnxt_re_async_event\n+ U rdmacore50_0_bnxt_re_create_ah\n+ U rdmacore50_0_bnxt_re_create_cq\n+ U rdmacore50_0_bnxt_re_create_qp\n+ U rdmacore50_0_bnxt_re_create_srq\n+ U rdmacore50_0_bnxt_re_dereg_mr\n+ U rdmacore50_0_bnxt_re_destroy_ah\n+ U rdmacore50_0_bnxt_re_destroy_cq\n+ U rdmacore50_0_bnxt_re_destroy_qp\n+ U rdmacore50_0_bnxt_re_destroy_srq\n+ U rdmacore50_0_bnxt_re_free_pd\n+ U rdmacore50_0_bnxt_re_modify_qp\n+ U rdmacore50_0_bnxt_re_modify_srq\n+ U rdmacore50_0_bnxt_re_poll_cq\n+ U rdmacore50_0_bnxt_re_post_recv\n+ U rdmacore50_0_bnxt_re_post_send\n+ U rdmacore50_0_bnxt_re_post_srq_recv\n+ U rdmacore50_0_bnxt_re_query_device\n+ U rdmacore50_0_bnxt_re_query_port\n+ U rdmacore50_0_bnxt_re_query_qp\n+ U rdmacore50_0_bnxt_re_query_srq\n+ U rdmacore50_0_bnxt_re_reg_dmabuf_mr\n+ U rdmacore50_0_bnxt_re_reg_mr\n+ U rdmacore50_0_bnxt_re_resize_cq\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_bnxt_re\n+\n+db.c.o:\n+ U __stack_chk_fail\n+0000000000000000 t bnxt_re_do_pacing\n+ U calloc\n+ U clock_gettime\n+ U free\n+00000000000009c0 T rdmacore50_0_bnxt_re_destroy_pbuf_list\n+0000000000000500 T rdmacore50_0_bnxt_re_fill_push_wcb\n+0000000000000920 T rdmacore50_0_bnxt_re_get_pbuf\n+0000000000000600 T rdmacore50_0_bnxt_re_init_pbuf_list\n+ U rdmacore50_0_bnxt_re_notify_drv\n+0000000000000980 T rdmacore50_0_bnxt_re_put_pbuf\n+00000000000003b0 T rdmacore50_0_bnxt_re_ring_cq_arm_db\n+0000000000000350 T rdmacore50_0_bnxt_re_ring_cq_db\n+00000000000004a0 T rdmacore50_0_bnxt_re_ring_pend_db\n+0000000000000440 T rdmacore50_0_bnxt_re_ring_pstart_db\n+00000000000001b0 T rdmacore50_0_bnxt_re_ring_rq_db\n+0000000000000220 T rdmacore50_0_bnxt_re_ring_sq_db\n+00000000000002f0 T rdmacore50_0_bnxt_re_ring_srq_arm\n+0000000000000290 T rdmacore50_0_bnxt_re_ring_srq_db\n+ U rdmacore50_0_xorshift32\n+\n memory.c.o:\n U __errno_location\n U ibv_dofork_range\n U ibv_dontfork_range\n U memset\n U mmap\n U munmap\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1630 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 5592 1970-01-01 00:00:00.000000 db.c.o\n-?rw-r--r-- 0 0 0 8632 1970-01-01 00:00:00.000000 main.c.o\n ?rw-r--r-- 0 0 0 29144 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 8632 1970-01-01 00:00:00.000000 main.c.o\n+?rw-r--r-- 0 0 0 5592 1970-01-01 00:00:00.000000 db.c.o\n ?rw-r--r-- 0 0 0 1912 1970-01-01 00:00:00.000000 memory.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libcxgb4-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libcxgb4-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,29 +1,9 @@\n \n Archive index:\n-rdmacore50_0_c4iw_flush_rq in cq.c.o\n-rdmacore50_0_c4iw_flush_sq in cq.c.o\n-rdmacore50_0_c4iw_flush_hw_cq in cq.c.o\n-rdmacore50_0_c4iw_count_rcqes in cq.c.o\n-rdmacore50_0_c4iw_poll_cq in cq.c.o\n-rdmacore50_0_c4iw_arm_cq in cq.c.o\n-rdmacore50_0_c4iw_flush_srqidx in cq.c.o\n-rdmacore50_0_c4iw_page_size in dev.c.o\n-rdmacore50_0_c4iw_page_shift in dev.c.o\n-rdmacore50_0_c4iw_page_mask in dev.c.o\n-rdmacore50_0_c4iw_abi_version in dev.c.o\n-rdmacore50_0_ma_wr in dev.c.o\n-rdmacore50_0_t5_en_wc in dev.c.o\n-verbs_provider_cxgb4 in dev.c.o\n-rdmacore50_0_c4iw_copy_wr_to_srq in qp.c.o\n-rdmacore50_0_c4iw_post_send in qp.c.o\n-rdmacore50_0_c4iw_post_srq_recv in qp.c.o\n-rdmacore50_0_c4iw_post_receive in qp.c.o\n-rdmacore50_0_c4iw_flush_qp in qp.c.o\n-rdmacore50_0_c4iw_flush_qps in qp.c.o\n rdmacore50_0_c4iw_query_device in verbs.c.o\n rdmacore50_0_c4iw_query_port in verbs.c.o\n rdmacore50_0_c4iw_alloc_pd in verbs.c.o\n rdmacore50_0_c4iw_free_pd in verbs.c.o\n rdmacore50_0_c4iw_reg_mr in verbs.c.o\n rdmacore50_0_c4iw_dereg_mr in verbs.c.o\n rdmacore50_0_c4iw_create_cq in verbs.c.o\n@@ -36,46 +16,118 @@\n rdmacore50_0_c4iw_create_qp in verbs.c.o\n rdmacore50_0_c4iw_modify_qp in verbs.c.o\n rdmacore50_0_c4iw_destroy_qp in verbs.c.o\n rdmacore50_0_c4iw_query_qp in verbs.c.o\n rdmacore50_0_c4iw_attach_mcast in verbs.c.o\n rdmacore50_0_c4iw_detach_mcast in verbs.c.o\n rdmacore50_0_c4iw_async_event in verbs.c.o\n+rdmacore50_0_c4iw_copy_wr_to_srq in qp.c.o\n+rdmacore50_0_c4iw_post_send in qp.c.o\n+rdmacore50_0_c4iw_post_srq_recv in qp.c.o\n+rdmacore50_0_c4iw_post_receive in qp.c.o\n+rdmacore50_0_c4iw_flush_qp in qp.c.o\n+rdmacore50_0_c4iw_flush_qps in qp.c.o\n+rdmacore50_0_c4iw_page_size in dev.c.o\n+rdmacore50_0_c4iw_page_shift in dev.c.o\n+rdmacore50_0_c4iw_page_mask in dev.c.o\n+rdmacore50_0_c4iw_abi_version in dev.c.o\n+rdmacore50_0_ma_wr in dev.c.o\n+rdmacore50_0_t5_en_wc in dev.c.o\n+verbs_provider_cxgb4 in dev.c.o\n+rdmacore50_0_c4iw_flush_rq in cq.c.o\n+rdmacore50_0_c4iw_flush_sq in cq.c.o\n+rdmacore50_0_c4iw_flush_hw_cq in cq.c.o\n+rdmacore50_0_c4iw_count_rcqes in cq.c.o\n+rdmacore50_0_c4iw_poll_cq in cq.c.o\n+rdmacore50_0_c4iw_arm_cq in cq.c.o\n+rdmacore50_0_c4iw_flush_srqidx in cq.c.o\n \n-cq.c.o:\n+verbs.c.o:\n 0000000000000000 r .LC0\n-000000000000001e r .LC1\n-0000000000000000 r .LC2\n-0000000000000038 r .LC3\n-0000000000000070 r .LC4\n-00000000000000a0 r .LC5\n-00000000000000d8 r .LC6\n+0000000000000000 r .LC1\n U __errno_location\n- U __fprintf_chk\n-0000000000000060 r __func__.0\n-0000000000000070 r __func__.1\n+ U __snprintf_chk\n U __stack_chk_fail\n- U __syslog_chk\n-0000000000000000 t flush_completed_wrs\n+ U calloc\n+ U free\n+ U fwrite\n+ U malloc\n+ U memset\n+ U mmap\n+ U munmap\n+ U pthread_spin_init\n U pthread_spin_lock\n U pthread_spin_unlock\n-0000000000002320 T rdmacore50_0_c4iw_arm_cq\n- U rdmacore50_0_c4iw_copy_wr_to_srq\n-0000000000000e20 T rdmacore50_0_c4iw_count_rcqes\n-0000000000000620 T rdmacore50_0_c4iw_flush_hw_cq\n- U rdmacore50_0_c4iw_flush_qps\n-0000000000000160 T rdmacore50_0_c4iw_flush_rq\n-00000000000002f0 T rdmacore50_0_c4iw_flush_sq\n-00000000000023d0 T rdmacore50_0_c4iw_flush_srqidx\n-0000000000000f20 T rdmacore50_0_c4iw_poll_cq\n+0000000000000100 T rdmacore50_0_c4iw_alloc_pd\n+0000000000001740 T rdmacore50_0_c4iw_async_event\n+0000000000001660 T rdmacore50_0_c4iw_attach_mcast\n+0000000000000330 T rdmacore50_0_c4iw_create_cq\n+0000000000000ab0 T rdmacore50_0_c4iw_create_qp\n+0000000000000690 T rdmacore50_0_c4iw_create_srq\n+00000000000002c0 T rdmacore50_0_c4iw_dereg_mr\n+00000000000005e0 T rdmacore50_0_c4iw_destroy_cq\n+0000000000001460 T rdmacore50_0_c4iw_destroy_qp\n+00000000000009b0 T rdmacore50_0_c4iw_destroy_srq\n+00000000000016d0 T rdmacore50_0_c4iw_detach_mcast\n+ U rdmacore50_0_c4iw_flush_qp\n+0000000000000190 T rdmacore50_0_c4iw_free_pd\n+0000000000001310 T rdmacore50_0_c4iw_modify_qp\n+0000000000000920 T rdmacore50_0_c4iw_modify_srq\n+ U rdmacore50_0_c4iw_page_mask\n+ U rdmacore50_0_c4iw_page_size\n+0000000000000000 T rdmacore50_0_c4iw_query_device\n+00000000000000b0 T rdmacore50_0_c4iw_query_port\n+00000000000015b0 T rdmacore50_0_c4iw_query_qp\n+0000000000000a70 T rdmacore50_0_c4iw_query_srq\n+00000000000001c0 T rdmacore50_0_c4iw_reg_mr\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_create_cq\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_srq\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_modify_qp\n U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_is_64b_cqe\n- U rdmacore50_0_t5_en_wc\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_query_qp\n+ U rdmacore50_0_ibv_cmd_query_srq\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+0000000000000000 B rdmacore50_0_is_64b_cqe\n+ U rdmacore50_0_ma_wr\n U stderr\n \n+qp.c.o:\n+0000000000000000 r .LC1\n+0000000000000000 r .LC2\n+ U __stack_chk_fail\n+ U memset\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_c4iw_abi_version\n+0000000000000000 T rdmacore50_0_c4iw_copy_wr_to_srq\n+ U rdmacore50_0_c4iw_count_rcqes\n+ U rdmacore50_0_c4iw_flush_hw_cq\n+0000000000002070 T rdmacore50_0_c4iw_flush_qp\n+00000000000022d0 T rdmacore50_0_c4iw_flush_qps\n+ U rdmacore50_0_c4iw_flush_rq\n+ U rdmacore50_0_c4iw_flush_sq\n+ U rdmacore50_0_c4iw_flush_srqidx\n+0000000000001aa0 T rdmacore50_0_c4iw_post_receive\n+0000000000000080 T rdmacore50_0_c4iw_post_send\n+0000000000001570 T rdmacore50_0_c4iw_post_srq_recv\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ma_wr\n+ U rdmacore50_0_t5_en_wc\n+\n dev.c.o:\n 0000000000000000 r .LC0\n 000000000000000c r .LC1\n 0000000000000000 r .LC2\n U __fprintf_chk\n U __stack_chk_fail\n 0000000000000170 t c4iw_alloc_context\n@@ -130,89 +182,37 @@\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U stderr\n U strtol\n U sysconf\n 0000000000000000 D verbs_provider_cxgb4\n \n-qp.c.o:\n-0000000000000000 r .LC1\n-0000000000000000 r .LC2\n- U __stack_chk_fail\n- U memset\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_c4iw_abi_version\n-0000000000000000 T rdmacore50_0_c4iw_copy_wr_to_srq\n- U rdmacore50_0_c4iw_count_rcqes\n- U rdmacore50_0_c4iw_flush_hw_cq\n-0000000000002070 T rdmacore50_0_c4iw_flush_qp\n-00000000000022d0 T rdmacore50_0_c4iw_flush_qps\n- U rdmacore50_0_c4iw_flush_rq\n- U rdmacore50_0_c4iw_flush_sq\n- U rdmacore50_0_c4iw_flush_srqidx\n-0000000000001aa0 T rdmacore50_0_c4iw_post_receive\n-0000000000000080 T rdmacore50_0_c4iw_post_send\n-0000000000001570 T rdmacore50_0_c4iw_post_srq_recv\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ma_wr\n- U rdmacore50_0_t5_en_wc\n-\n-verbs.c.o:\n+cq.c.o:\n 0000000000000000 r .LC0\n-0000000000000000 r .LC1\n+000000000000001e r .LC1\n+0000000000000000 r .LC2\n+0000000000000038 r .LC3\n+0000000000000070 r .LC4\n+00000000000000a0 r .LC5\n+00000000000000d8 r .LC6\n U __errno_location\n- U __snprintf_chk\n+ U __fprintf_chk\n+0000000000000060 r __func__.0\n+0000000000000070 r __func__.1\n U __stack_chk_fail\n- U calloc\n- U free\n- U fwrite\n- U malloc\n- U memset\n- U mmap\n- U munmap\n- U pthread_spin_init\n+ U __syslog_chk\n+0000000000000000 t flush_completed_wrs\n U pthread_spin_lock\n U pthread_spin_unlock\n-0000000000000100 T rdmacore50_0_c4iw_alloc_pd\n-0000000000001740 T rdmacore50_0_c4iw_async_event\n-0000000000001660 T rdmacore50_0_c4iw_attach_mcast\n-0000000000000330 T rdmacore50_0_c4iw_create_cq\n-0000000000000ab0 T rdmacore50_0_c4iw_create_qp\n-0000000000000690 T rdmacore50_0_c4iw_create_srq\n-00000000000002c0 T rdmacore50_0_c4iw_dereg_mr\n-00000000000005e0 T rdmacore50_0_c4iw_destroy_cq\n-0000000000001460 T rdmacore50_0_c4iw_destroy_qp\n-00000000000009b0 T rdmacore50_0_c4iw_destroy_srq\n-00000000000016d0 T rdmacore50_0_c4iw_detach_mcast\n- U rdmacore50_0_c4iw_flush_qp\n-0000000000000190 T rdmacore50_0_c4iw_free_pd\n-0000000000001310 T rdmacore50_0_c4iw_modify_qp\n-0000000000000920 T rdmacore50_0_c4iw_modify_srq\n- U rdmacore50_0_c4iw_page_mask\n- U rdmacore50_0_c4iw_page_size\n-0000000000000000 T rdmacore50_0_c4iw_query_device\n-00000000000000b0 T rdmacore50_0_c4iw_query_port\n-00000000000015b0 T rdmacore50_0_c4iw_query_qp\n-0000000000000a70 T rdmacore50_0_c4iw_query_srq\n-00000000000001c0 T rdmacore50_0_c4iw_reg_mr\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_create_cq\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_modify_qp\n+0000000000002320 T rdmacore50_0_c4iw_arm_cq\n+ U rdmacore50_0_c4iw_copy_wr_to_srq\n+0000000000000e20 T rdmacore50_0_c4iw_count_rcqes\n+0000000000000620 T rdmacore50_0_c4iw_flush_hw_cq\n+ U rdmacore50_0_c4iw_flush_qps\n+0000000000000160 T rdmacore50_0_c4iw_flush_rq\n+00000000000002f0 T rdmacore50_0_c4iw_flush_sq\n+00000000000023d0 T rdmacore50_0_c4iw_flush_srqidx\n+0000000000000f20 T rdmacore50_0_c4iw_poll_cq\n U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_ibv_cmd_reg_mr\n-0000000000000000 B rdmacore50_0_is_64b_cqe\n- U rdmacore50_0_ma_wr\n+ U rdmacore50_0_is_64b_cqe\n+ U rdmacore50_0_t5_en_wc\n U stderr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1282 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 16040 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 12328 1970-01-01 00:00:00.000000 dev.c.o\n-?rw-r--r-- 0 0 0 13640 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 15872 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 13640 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 12328 1970-01-01 00:00:00.000000 dev.c.o\n+?rw-r--r-- 0 0 0 16040 1970-01-01 00:00:00.000000 cq.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/liberdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/liberdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,11 @@\n \n Archive index:\n+rdmacore50_0_erdma_alloc_dbrecords in erdma_db.c.o\n+rdmacore50_0_erdma_dealloc_dbrecords in erdma_db.c.o\n verbs_provider_erdma in erdma.c.o\n rdmacore50_0_erdma_query_device in erdma_verbs.c.o\n rdmacore50_0_erdma_query_port in erdma_verbs.c.o\n rdmacore50_0_erdma_query_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_alloc_pd in erdma_verbs.c.o\n rdmacore50_0_erdma_free_pd in erdma_verbs.c.o\n rdmacore50_0_erdma_reg_mr in erdma_verbs.c.o\n@@ -15,16 +17,25 @@\n rdmacore50_0_erdma_modify_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_destroy_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_post_send in erdma_verbs.c.o\n rdmacore50_0_erdma_post_recv in erdma_verbs.c.o\n rdmacore50_0_erdma_cq_event in erdma_verbs.c.o\n rdmacore50_0_erdma_poll_cq in erdma_verbs.c.o\n rdmacore50_0_erdma_free_context in erdma_verbs.c.o\n-rdmacore50_0_erdma_alloc_dbrecords in erdma_db.c.o\n-rdmacore50_0_erdma_dealloc_dbrecords in erdma_db.c.o\n+\n+erdma_db.c.o:\n+ U calloc\n+ U free\n+ U memset\n+ U posix_memalign\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_bitmap_find_first_bit\n+0000000000000000 T rdmacore50_0_erdma_alloc_dbrecords\n+0000000000000180 T rdmacore50_0_erdma_dealloc_dbrecords\n \n erdma.c.o:\n U __stack_chk_fail\n U calloc\n 0000000000000000 t drv__register_driver\n 0000000000000030 t erdma_alloc_context\n 0000000000000000 d erdma_context_ops\n@@ -111,18 +122,7 @@\n U rdmacore50_0_ibv_cmd_modify_qp\n U rdmacore50_0_ibv_cmd_query_device_any\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_verbs_uninit_context\n 00000000000000e0 r wc_mapping_table\n-\n-erdma_db.c.o:\n- U calloc\n- U free\n- U memset\n- U posix_memalign\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_bitmap_find_first_bit\n-0000000000000000 T rdmacore50_0_erdma_alloc_dbrecords\n-0000000000000180 T rdmacore50_0_erdma_dealloc_dbrecords\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 702 1970-01-01 00:00:00.000000 /\n+?rw-r--r-- 0 0 0 2592 1970-01-01 00:00:00.000000 erdma_db.c.o\n ?rw-r--r-- 0 0 0 6272 1970-01-01 00:00:00.000000 erdma.c.o\n ?rw-r--r-- 0 0 0 14512 1970-01-01 00:00:00.000000 erdma_verbs.c.o\n-?rw-r--r-- 0 0 0 2592 1970-01-01 00:00:00.000000 erdma_db.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libhns-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libhns-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,16 +1,9 @@\n \n Archive index:\n-rdmacore50_0_hns_roce_u_v2_post_send in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_v2_clear_qp in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_attach_cq_ex_ops in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_attach_qp_ex_ops in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_u_hw_v2 in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n-rdmacore50_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n rdmacore50_0_hns_roce_init_qp_indices in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_device in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_port in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_alloc_pd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_free_pd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_open_xrcd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_close_xrcd in hns_roce_u_verbs.c.o\n@@ -35,103 +28,24 @@\n rdmacore50_0_hns_roce_free_qp_buf in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_qp_ex in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_open_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_ah in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_destroy_ah in hns_roce_u_verbs.c.o\n-verbs_provider_hns in hns_roce_u.c.o\n+rdmacore50_0_hns_roce_u_v2_post_send in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_v2_clear_qp in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_attach_cq_ex_ops in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_attach_qp_ex_ops in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_u_hw_v2 in hns_roce_u_hw_v2.c.o\n rdmacore50_0_hns_roce_alloc_db in hns_roce_u_db.c.o\n rdmacore50_0_hns_roce_free_db in hns_roce_u_db.c.o\n-\n-hns_roce_u_hw_v2.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-00000000000013e0 t __hns_roce_v2_cq_clean\n- U __stack_chk_fail\n-00000000000002c0 t fill_ext_sge_inl_data\n-0000000000000610 t fill_recv_sge_to_wqe.isra.0\n- U free\n-0000000000000120 r hns_roce_mtu\n-0000000000000140 r hns_roce_opcode\n-0000000000003ed0 t hns_roce_poll_one\n-00000000000004a0 t hns_roce_u_v2_arm_cq\n-0000000000001c20 t hns_roce_u_v2_destroy_qp\n-00000000000015f0 t hns_roce_u_v2_modify_qp\n-0000000000004bd0 t hns_roce_u_v2_poll_cq\n-0000000000001980 t hns_roce_u_v2_post_recv\n-00000000000006c0 t hns_roce_u_v2_post_srq_recv\n-0000000000000560 t hns_roce_write_dwqe\n-0000000000000040 r map.0\n- U memcpy\n- U memset\n- U munmap\n-00000000000000c0 r pktype_for_ud\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000004dc0 T rdmacore50_0_hns_roce_attach_cq_ex_ops\n-0000000000004ed0 T rdmacore50_0_hns_roce_attach_qp_ex_ops\n- U rdmacore50_0_hns_roce_find_srq\n- U rdmacore50_0_hns_roce_free_qp_buf\n- U rdmacore50_0_hns_roce_init_qp_indices\n-0000000000000000 D rdmacore50_0_hns_roce_u_hw_v2\n-00000000000024b0 T rdmacore50_0_hns_roce_u_v2_post_send\n-0000000000004d20 T rdmacore50_0_hns_roce_v2_clear_qp\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_modify_qp\n-0000000000000fb0 t wc_end_poll_cq\n-0000000000004a90 t wc_next_poll_cq\n-00000000000000d0 r wc_rcv_op_map\n-0000000000000050 t wc_read_byte_len\n-0000000000000150 t wc_read_cvlan\n-0000000000000140 t wc_read_dlid_path_bits\n-00000000000002a0 t wc_read_imm_data\n-0000000000000000 t wc_read_opcode\n-0000000000000060 t wc_read_qp_num\n-0000000000000120 t wc_read_sl\n-0000000000000110 t wc_read_slid\n-0000000000000080 t wc_read_src_qp\n-0000000000000040 t wc_read_vendor_err\n-00000000000000a0 t wc_read_wc_flags\n-00000000000000e0 r wc_send_op_map\n-0000000000004b40 t wc_start_poll_cq\n-0000000000000280 t wr_abort\n-0000000000003d10 t wr_atomic_cmp_swp\n-0000000000000a80 t wr_atomic_fetch_add\n-0000000000001830 t wr_complete\n-0000000000003560 t wr_rdma_read\n-00000000000036f0 t wr_rdma_write\n-0000000000003b60 t wr_rdma_write_imm\n-0000000000003880 t wr_send_imm_rc\n-0000000000001eb0 t wr_send_imm_ud\n-00000000000033f0 t wr_send_inv_rc\n-0000000000003a10 t wr_send_rc\n-0000000000000940 t wr_send_ud\n-0000000000000c30 t wr_set_inline_data_list_rc\n-0000000000002020 t wr_set_inline_data_list_ud\n-0000000000000e70 t wr_set_inline_data_rc\n-0000000000002300 t wr_set_inline_data_ud\n-0000000000001240 t wr_set_sge_list_rc\n-0000000000001020 t wr_set_sge_list_ud\n-0000000000000180 t wr_set_sge_rc\n-0000000000000200 t wr_set_sge_ud\n-0000000000001140 t wr_set_ud_addr\n-00000000000001d0 t wr_set_xrc_srqn\n-0000000000000510 t wr_start\n-\n-hns_roce_u_buf.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_hns_roce_alloc_buf\n-0000000000000090 T rdmacore50_0_hns_roce_free_buf\n+rdmacore50_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n+rdmacore50_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n+verbs_provider_hns in hns_roce_u.c.o\n \n hns_roce_u_verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000028 r .LC2\n U __errno_location\n 0000000000000000 r __func__.0\n@@ -213,14 +127,113 @@\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_query_srq\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_ibv_cmd_rereg_mr\n U rdmacore50_0_ibv_query_gid_type\n \n+hns_roce_u_hw_v2.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+00000000000013e0 t __hns_roce_v2_cq_clean\n+ U __stack_chk_fail\n+00000000000002c0 t fill_ext_sge_inl_data\n+0000000000000610 t fill_recv_sge_to_wqe.isra.0\n+ U free\n+0000000000000120 r hns_roce_mtu\n+0000000000000140 r hns_roce_opcode\n+0000000000003ed0 t hns_roce_poll_one\n+00000000000004a0 t hns_roce_u_v2_arm_cq\n+0000000000001c20 t hns_roce_u_v2_destroy_qp\n+00000000000015f0 t hns_roce_u_v2_modify_qp\n+0000000000004bd0 t hns_roce_u_v2_poll_cq\n+0000000000001980 t hns_roce_u_v2_post_recv\n+00000000000006c0 t hns_roce_u_v2_post_srq_recv\n+0000000000000560 t hns_roce_write_dwqe\n+0000000000000040 r map.0\n+ U memcpy\n+ U memset\n+ U munmap\n+00000000000000c0 r pktype_for_ud\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+0000000000004dc0 T rdmacore50_0_hns_roce_attach_cq_ex_ops\n+0000000000004ed0 T rdmacore50_0_hns_roce_attach_qp_ex_ops\n+ U rdmacore50_0_hns_roce_find_srq\n+ U rdmacore50_0_hns_roce_free_qp_buf\n+ U rdmacore50_0_hns_roce_init_qp_indices\n+0000000000000000 D rdmacore50_0_hns_roce_u_hw_v2\n+00000000000024b0 T rdmacore50_0_hns_roce_u_v2_post_send\n+0000000000004d20 T rdmacore50_0_hns_roce_v2_clear_qp\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+0000000000000fb0 t wc_end_poll_cq\n+0000000000004a90 t wc_next_poll_cq\n+00000000000000d0 r wc_rcv_op_map\n+0000000000000050 t wc_read_byte_len\n+0000000000000150 t wc_read_cvlan\n+0000000000000140 t wc_read_dlid_path_bits\n+00000000000002a0 t wc_read_imm_data\n+0000000000000000 t wc_read_opcode\n+0000000000000060 t wc_read_qp_num\n+0000000000000120 t wc_read_sl\n+0000000000000110 t wc_read_slid\n+0000000000000080 t wc_read_src_qp\n+0000000000000040 t wc_read_vendor_err\n+00000000000000a0 t wc_read_wc_flags\n+00000000000000e0 r wc_send_op_map\n+0000000000004b40 t wc_start_poll_cq\n+0000000000000280 t wr_abort\n+0000000000003d10 t wr_atomic_cmp_swp\n+0000000000000a80 t wr_atomic_fetch_add\n+0000000000001830 t wr_complete\n+0000000000003560 t wr_rdma_read\n+00000000000036f0 t wr_rdma_write\n+0000000000003b60 t wr_rdma_write_imm\n+0000000000003880 t wr_send_imm_rc\n+0000000000001eb0 t wr_send_imm_ud\n+00000000000033f0 t wr_send_inv_rc\n+0000000000003a10 t wr_send_rc\n+0000000000000940 t wr_send_ud\n+0000000000000c30 t wr_set_inline_data_list_rc\n+0000000000002020 t wr_set_inline_data_list_ud\n+0000000000000e70 t wr_set_inline_data_rc\n+0000000000002300 t wr_set_inline_data_ud\n+0000000000001240 t wr_set_sge_list_rc\n+0000000000001020 t wr_set_sge_list_ud\n+0000000000000180 t wr_set_sge_rc\n+0000000000000200 t wr_set_sge_ud\n+0000000000001140 t wr_set_ud_addr\n+00000000000001d0 t wr_set_xrc_srqn\n+0000000000000510 t wr_start\n+\n+hns_roce_u_db.c.o:\n+ U calloc\n+0000000000000000 r db_size\n+ U free\n+ U memset\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_bitmap_find_first_bit\n+ U rdmacore50_0_hns_roce_alloc_buf\n+0000000000000000 T rdmacore50_0_hns_roce_alloc_db\n+ U rdmacore50_0_hns_roce_free_buf\n+00000000000001a0 T rdmacore50_0_hns_roce_free_db\n+\n+hns_roce_u_buf.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U mmap\n+ U munmap\n+0000000000000000 T rdmacore50_0_hns_roce_alloc_buf\n+0000000000000090 T rdmacore50_0_hns_roce_free_buf\n+\n hns_roce_u.c.o:\n U __stack_chk_fail\n U calloc\n 0000000000000000 t drv__register_driver\n U free\n 0000000000000260 d hca_table\n 0000000000000000 d hns_common_ops\n@@ -266,20 +279,7 @@\n U rdmacore50_0_hns_roce_u_rereg_mr\n U rdmacore50_0_ibv_cmd_get_context\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U sysconf\n 0000000000000000 D verbs_provider_hns\n-\n-hns_roce_u_db.c.o:\n- U calloc\n-0000000000000000 r db_size\n- U free\n- U memset\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_bitmap_find_first_bit\n- U rdmacore50_0_hns_roce_alloc_buf\n-0000000000000000 T rdmacore50_0_hns_roce_alloc_db\n- U rdmacore50_0_hns_roce_free_buf\n-00000000000001a0 T rdmacore50_0_hns_roce_free_db\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,7 +1,7 @@\n ---------- 0 0 0 1592 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n+?rw-r--r-- 0 0 0 23368 1970-01-01 00:00:00.000000 hns_roce_u_verbs.c.o\n ?rw-r--r-- 0 0 0 33832 1970-01-01 00:00:00.000000 hns_roce_u_hw_v2.c.o\n+?rw-r--r-- 0 0 0 2896 1970-01-01 00:00:00.000000 hns_roce_u_db.c.o\n ?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 hns_roce_u_buf.c.o\n-?rw-r--r-- 0 0 0 23368 1970-01-01 00:00:00.000000 hns_roce_u_verbs.c.o\n ?rw-r--r-- 0 0 0 8176 1970-01-01 00:00:00.000000 hns_roce_u.c.o\n-?rw-r--r-- 0 0 0 2896 1970-01-01 00:00:00.000000 hns_roce_u_db.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libibverbs.a", "source2": "./usr/lib/x86_64-linux-gnu/libibverbs.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "comments": ["error from `nm -s {}`:", "nm: compat-1_0.c.o: no symbols", "nm: dynamic_driver.c.o: no symbols", "nm: mmio.c.o: no symbols"], "unified_diff": "@@ -1,91 +1,31 @@\n \n Archive index:\n-rdmacore50_0__check_legacy in cmd_fallback.c.o\n-rdmacore50_0__execute_ioctl_fallback in cmd_fallback.c.o\n-rdmacore50_0__write_get_req in cmd_fallback.c.o\n-rdmacore50_0__write_get_req_ex in cmd_fallback.c.o\n-rdmacore50_0__write_get_resp in cmd_fallback.c.o\n-rdmacore50_0__write_get_resp_ex in cmd_fallback.c.o\n-rdmacore50_0__execute_cmd_write in cmd_fallback.c.o\n-rdmacore50_0__execute_cmd_write_ex in cmd_fallback.c.o\n-ibv_get_sysfs_path in sysfs.c.o\n-rdmacore50_0_ibv_read_sysfs_file_at in sysfs.c.o\n-ibv_read_sysfs_file in sysfs.c.o\n-rdmacore50_0_ibv_read_ibdev_sysfs_file in sysfs.c.o\n-rdmacore50_0_ibv_cmd_destroy_ah in cmd_ah.c.o\n-ibv_node_type_str in enum_strs.c.o\n-ibv_port_state_str in enum_strs.c.o\n-ibv_event_type_str in enum_strs.c.o\n-ibv_wc_status_str in enum_strs.c.o\n-rdmacore50_0_ibv_wr_opcode_str in enum_strs.c.o\n-rdmacore50_0_ibv_cmd_create_srq in cmd_srq.c.o\n-rdmacore50_0_ibv_cmd_create_srq_ex in cmd_srq.c.o\n-rdmacore50_0_ibv_cmd_destroy_srq in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n+rdmacore50_0_neigh_get_oif_from_src in neigh.c.o\n+rdmacore50_0_neigh_init_resources in neigh.c.o\n+rdmacore50_0_neigh_get_vlan_id_from_dev in neigh.c.o\n+rdmacore50_0_neigh_set_vlan_id in neigh.c.o\n+rdmacore50_0_neigh_set_dst in neigh.c.o\n+rdmacore50_0_neigh_set_src in neigh.c.o\n+rdmacore50_0_neigh_set_oif in neigh.c.o\n+rdmacore50_0_neigh_get_ll in neigh.c.o\n+rdmacore50_0_neigh_free_resources in neigh.c.o\n+rdmacore50_0_process_get_neigh in neigh.c.o\n rdmacore50_0___verbs_log in init.c.o\n rdmacore50_0_try_access_device in init.c.o\n rdmacore50_0_decode_knode_type in init.c.o\n rdmacore50_0_setup_sysfs_uverbs in init.c.o\n rdmacore50_0_verbs_register_driver_34 in init.c.o\n rdmacore50_0_ibverbs_get_device_list in init.c.o\n rdmacore50_0_abi_ver in init.c.o\n rdmacore50_0_ibverbs_init in init.c.o\n rdmacore50_0_ibverbs_device_hold in init.c.o\n rdmacore50_0_ibverbs_device_put in init.c.o\n-rdmacore50_0_ibv_cmd_alloc_pd in cmd.c.o\n-rdmacore50_0_ibv_cmd_open_xrcd in cmd.c.o\n-rdmacore50_0_ibv_cmd_reg_mr in cmd.c.o\n-rdmacore50_0_ibv_cmd_rereg_mr in cmd.c.o\n-rdmacore50_0_ibv_cmd_alloc_mw in cmd.c.o\n-rdmacore50_0_ibv_cmd_poll_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_req_notify_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_resize_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_srq in cmd.c.o\n-rdmacore50_0_ibv_cmd_query_srq in cmd.c.o\n-rdmacore50_0_ibv_cmd_open_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_query_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_qp_ex in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_send in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_recv in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_srq_recv in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_ah in cmd.c.o\n-rdmacore50_0_ibv_cmd_attach_mcast in cmd.c.o\n-rdmacore50_0_ibv_cmd_detach_mcast in cmd.c.o\n-rdmacore50_0_verbs_allow_disassociate_destroy in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_flow in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_wq in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_rwq_ind_table in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n-rdmacore50_0_ibv_cmd_create_counters in cmd_counters.c.o\n-rdmacore50_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n-rdmacore50_0_ibv_cmd_read_counters in cmd_counters.c.o\n rdmacore50_0_ibv_cmd_close_xrcd in cmd_xrcd.c.o\n-rdmacore50_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n-rdmacore50_0_execute_ioctl in cmd_ioctl.c.o\n-rdmacore50_0__write_set_uhw in cmd_ioctl.c.o\n-rdmacore50_0_ibv_cmd_create_cq in cmd_cq.c.o\n-rdmacore50_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n-rdmacore50_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n-rdmacore50_0_ibv_cmd_create_wq in cmd_wq.c.o\n-rdmacore50_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n-rdmacore50_0_ibv_cmd_create_flow_action_esp in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_modify_flow_action_esp in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_destroy_flow_action in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_query_port in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_get_context in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_query_context in cmd_device.c.o\n-rdmacore50_0___ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_table in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_query_device_any in cmd_device.c.o\n-rdmacore50_0_find_sysfs_devs_nl in ibdev_nl.c.o\n-rdmacore50_0_get_copy_on_fork in ibdev_nl.c.o\n ibv_rate_to_mult in verbs.c.o\n mult_to_ibv_rate in verbs.c.o\n ibv_rate_to_mbps in verbs.c.o\n mbps_to_ibv_rate in verbs.c.o\n ibv_query_device in verbs.c.o\n rdmacore50_0___lib_query_port in verbs.c.o\n ibv_query_port in verbs.c.o\n@@ -130,25 +70,98 @@\n ibv_destroy_ah in verbs.c.o\n ibv_attach_mcast in verbs.c.o\n ibv_detach_mcast in verbs.c.o\n ibv_resolve_eth_l2_from_gid in verbs.c.o\n ibv_set_ece in verbs.c.o\n ibv_query_ece in verbs.c.o\n rdmacore50_0_ibv_cmd_dealloc_mw in cmd_mw.c.o\n-ibv_fork_init in memory.c.o\n-ibv_is_fork_initialized in memory.c.o\n-ibv_dontfork_range in memory.c.o\n-ibv_dofork_range in memory.c.o\n+rdmacore50_0_ibv_cmd_advise_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_query_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_query_port in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_get_context in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_query_context in cmd_device.c.o\n+rdmacore50_0___ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_table in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_query_device_any in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_destroy_ah in cmd_ah.c.o\n+rdmacore50_0_ibv_cmd_alloc_pd in cmd.c.o\n+rdmacore50_0_ibv_cmd_open_xrcd in cmd.c.o\n+rdmacore50_0_ibv_cmd_reg_mr in cmd.c.o\n+rdmacore50_0_ibv_cmd_rereg_mr in cmd.c.o\n+rdmacore50_0_ibv_cmd_alloc_mw in cmd.c.o\n+rdmacore50_0_ibv_cmd_poll_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_req_notify_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_resize_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_srq in cmd.c.o\n+rdmacore50_0_ibv_cmd_query_srq in cmd.c.o\n+rdmacore50_0_ibv_cmd_open_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_query_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_qp_ex in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_send in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_recv in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_srq_recv in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_ah in cmd.c.o\n+rdmacore50_0_ibv_cmd_attach_mcast in cmd.c.o\n+rdmacore50_0_ibv_cmd_detach_mcast in cmd.c.o\n+rdmacore50_0_verbs_allow_disassociate_destroy in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_flow in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_wq in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_rwq_ind_table in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n+rdmacore50_0_ibv_cmd_free_dm in cmd_dm.c.o\n+rdmacore50_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n+rdmacore50_0_verbs_set_ops in dummy_ops.c.o\n+rdmacore50_0_verbs_dummy_ops in dummy_ops.c.o\n+rdmacore50_0_find_sysfs_devs_nl in ibdev_nl.c.o\n+rdmacore50_0_get_copy_on_fork in ibdev_nl.c.o\n+rdmacore50_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n+rdmacore50_0_execute_ioctl in cmd_ioctl.c.o\n+rdmacore50_0__write_set_uhw in cmd_ioctl.c.o\n+ibv_node_type_str in enum_strs.c.o\n+ibv_port_state_str in enum_strs.c.o\n+ibv_event_type_str in enum_strs.c.o\n+ibv_wc_status_str in enum_strs.c.o\n+rdmacore50_0_ibv_wr_opcode_str in enum_strs.c.o\n ibv_copy_ah_attr_from_kern in marshall.c.o\n ibv_copy_qp_attr_from_kern in marshall.c.o\n ibv_copy_path_rec_from_kern in marshall.c.o\n ibv_copy_path_rec_to_kern in marshall.c.o\n+rdmacore50_0_ibv_cmd_create_srq in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_create_srq_ex in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_destroy_srq in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_create_counters in cmd_counters.c.o\n+rdmacore50_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n+rdmacore50_0_ibv_cmd_read_counters in cmd_counters.c.o\n rdmacore50_0_ibv_cmd_dealloc_pd in cmd_pd.c.o\n-rdmacore50_0_verbs_set_ops in dummy_ops.c.o\n-rdmacore50_0_verbs_dummy_ops in dummy_ops.c.o\n+rdmacore50_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n+rdmacore50_0_ibv_cmd_create_wq in cmd_wq.c.o\n+rdmacore50_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n+rdmacore50_0_ibv_cmd_create_cq in cmd_cq.c.o\n+rdmacore50_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n+rdmacore50_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n+verbs_provider_all in all_providers.c.o\n+rdmacore50_0__check_legacy in cmd_fallback.c.o\n+rdmacore50_0__execute_ioctl_fallback in cmd_fallback.c.o\n+rdmacore50_0__write_get_req in cmd_fallback.c.o\n+rdmacore50_0__write_get_req_ex in cmd_fallback.c.o\n+rdmacore50_0__write_get_resp in cmd_fallback.c.o\n+rdmacore50_0__write_get_resp_ex in cmd_fallback.c.o\n+rdmacore50_0__execute_cmd_write in cmd_fallback.c.o\n+rdmacore50_0__execute_cmd_write_ex in cmd_fallback.c.o\n+ibv_static_providers in static_driver.c.o\n+verbs_provider_none in static_driver.c.o\n+rdmacore50_0_ibv_cmd_create_flow_action_esp in cmd_flow_action.c.o\n+rdmacore50_0_ibv_cmd_modify_flow_action_esp in cmd_flow_action.c.o\n+rdmacore50_0_ibv_cmd_destroy_flow_action in cmd_flow_action.c.o\n ibv_get_device_list in device.c.o\n ibv_free_device_list in device.c.o\n ibv_get_device_name in device.c.o\n ibv_get_device_guid in device.c.o\n ibv_get_device_index in device.c.o\n rdmacore50_0_verbs_init_cq in device.c.o\n rdmacore50_0_verbs_init_context in device.c.o\n@@ -156,153 +169,149 @@\n rdmacore50_0_verbs_open_device in device.c.o\n ibv_open_device in device.c.o\n ibv_import_device in device.c.o\n rdmacore50_0_verbs_uninit_context in device.c.o\n ibv_close_device in device.c.o\n ibv_get_async_event in device.c.o\n ibv_ack_async_event in device.c.o\n+ibv_get_sysfs_path in sysfs.c.o\n+rdmacore50_0_ibv_read_sysfs_file_at in sysfs.c.o\n+ibv_read_sysfs_file in sysfs.c.o\n+rdmacore50_0_ibv_read_ibdev_sysfs_file in sysfs.c.o\n+ibv_fork_init in memory.c.o\n+ibv_is_fork_initialized in memory.c.o\n+ibv_dontfork_range in memory.c.o\n+ibv_dofork_range in memory.c.o\n rdmacore50_0_ibv_cmd_create_qp in cmd_qp.c.o\n rdmacore50_0_ibv_cmd_create_qp_ex in cmd_qp.c.o\n rdmacore50_0_ibv_cmd_create_qp_ex2 in cmd_qp.c.o\n rdmacore50_0_ibv_cmd_destroy_qp in cmd_qp.c.o\n-rdmacore50_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n-verbs_provider_all in all_providers.c.o\n-rdmacore50_0_ibv_cmd_advise_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_query_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n-rdmacore50_0_ibv_cmd_free_dm in cmd_dm.c.o\n-rdmacore50_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n-rdmacore50_0_neigh_get_oif_from_src in neigh.c.o\n-rdmacore50_0_neigh_init_resources in neigh.c.o\n-rdmacore50_0_neigh_get_vlan_id_from_dev in neigh.c.o\n-rdmacore50_0_neigh_set_vlan_id in neigh.c.o\n-rdmacore50_0_neigh_set_dst in neigh.c.o\n-rdmacore50_0_neigh_set_src in neigh.c.o\n-rdmacore50_0_neigh_set_oif in neigh.c.o\n-rdmacore50_0_neigh_get_ll in neigh.c.o\n-rdmacore50_0_neigh_free_resources in neigh.c.o\n-rdmacore50_0_process_get_neigh in neigh.c.o\n-ibv_static_providers in static_driver.c.o\n-verbs_provider_none in static_driver.c.o\n+rdmacore50_0_iset_create in interval_set.c.o\n+rdmacore50_0_iset_destroy in interval_set.c.o\n+rdmacore50_0_iset_insert_range in interval_set.c.o\n+rdmacore50_0_iset_alloc_range in interval_set.c.o\n+rdmacore50_0_close_node_name_map in node_name_map.c.o\n+rdmacore50_0_remap_node_name in node_name_map.c.o\n+rdmacore50_0_clean_nodedesc in node_name_map.c.o\n+rdmacore50_0_open_node_name_map in node_name_map.c.o\n+rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n+rdmacore50_0_bitmap_zero_region in bitmap.c.o\n+rdmacore50_0_bitmap_fill_region in bitmap.c.o\n+rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n rdmacore50_0_cl_qmap_init in cl_map.c.o\n rdmacore50_0_cl_qmap_get in cl_map.c.o\n rdmacore50_0_cl_qmap_get_next in cl_map.c.o\n rdmacore50_0_cl_qmap_apply_func in cl_map.c.o\n rdmacore50_0_cl_qmap_insert in cl_map.c.o\n rdmacore50_0_cl_qmap_remove_item in cl_map.c.o\n rdmacore50_0_cl_qmap_remove in cl_map.c.o\n rdmacore50_0_cl_qmap_merge in cl_map.c.o\n rdmacore50_0_cl_qmap_delta in cl_map.c.o\n-rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n-rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_open_cdev in open_cdev.c.o\n-rdmacore50_0_close_node_name_map in node_name_map.c.o\n-rdmacore50_0_remap_node_name in node_name_map.c.o\n-rdmacore50_0_clean_nodedesc in node_name_map.c.o\n-rdmacore50_0_open_node_name_map in node_name_map.c.o\n-rdmacore50_0_iset_create in interval_set.c.o\n-rdmacore50_0_iset_destroy in interval_set.c.o\n-rdmacore50_0_iset_insert_range in interval_set.c.o\n-rdmacore50_0_iset_alloc_range in interval_set.c.o\n-rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n-rdmacore50_0_bitmap_zero_region in bitmap.c.o\n-rdmacore50_0_bitmap_fill_region in bitmap.c.o\n-rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n rdmacore50_0_set_fd_nonblock in util.c.o\n rdmacore50_0_get_random in util.c.o\n rdmacore50_0_check_env in util.c.o\n rdmacore50_0_xorshift32 in util.c.o\n+rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n+rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n \n-cmd_fallback.c.o:\n- U __errno_location\n- U __stack_chk_fail\n-0000000000000000 t ioctl_write\n- U memcpy\n- U memset\n-00000000000002b0 T rdmacore50_0__check_legacy\n-0000000000000680 T rdmacore50_0__execute_cmd_write\n-00000000000007b0 T rdmacore50_0__execute_cmd_write_ex\n-0000000000000350 T rdmacore50_0__execute_ioctl_fallback\n-0000000000000570 T rdmacore50_0__write_get_req\n-00000000000005c0 T rdmacore50_0__write_get_req_ex\n-0000000000000600 T rdmacore50_0__write_get_resp\n-0000000000000640 T rdmacore50_0__write_get_resp_ex\n- U rdmacore50_0_execute_ioctl\n- U write\n-\n-sysfs.c.o:\n-0000000000000000 r .LC0\n-0000000000000005 r .LC1\n-0000000000000010 r .LC2\n- U __asprintf_chk\n- U __errno_location\n- U __stack_chk_fail\n- U __vasprintf_chk\n- U close\n- U free\n- U getenv\n- U geteuid\n- U getuid\n-0000000000000000 T ibv_get_sysfs_path\n-0000000000000150 T ibv_read_sysfs_file\n- U openat\n-0000000000000240 T rdmacore50_0_ibv_read_ibdev_sysfs_file\n-00000000000000c0 T rdmacore50_0_ibv_read_sysfs_file_at\n- U read\n- U strlen\n- U strndup\n-0000000000000000 b sysfs_path\n-\n-cmd_ah.c.o:\n+cmd_rwq_ind.c.o:\n U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_cmd_write_ex\n U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_ah\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-enum_strs.c.o:\n-0000000000000000 r .LC0\n-0000000000000140 d event_type_str.2\n-0000000000000050 T ibv_event_type_str\n-0000000000000000 T ibv_node_type_str\n-0000000000000030 T ibv_port_state_str\n-0000000000000070 T ibv_wc_status_str\n-0000000000000220 d node_type_str.4\n-00000000000001e0 d port_state_str.3\n-0000000000000090 T rdmacore50_0_ibv_wr_opcode_str\n-0000000000000080 d wc_status_str.1\n-0000000000000000 d wr_opcode_str.0\n-\n-cmd_srq.c.o:\n+neigh.c.o:\n U __errno_location\n+ U __fdelt_chk\n U __stack_chk_fail\n-0000000000000000 t ibv_icmd_create_srq\n- U pthread_cond_init\n- U pthread_cond_wait\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_set_uhw\n- U rdmacore50_0_abi_ver\n-00000000000007d0 T rdmacore50_0_ibv_cmd_create_srq\n-00000000000008f0 T rdmacore50_0_ibv_cmd_create_srq_ex\n-0000000000000a00 T rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-compat-1_0.c.o:\n+ U bind\n+ U close\n+0000000000000000 d encoded_prefixes\n+ U freeaddrinfo\n+ U freeifaddrs\n+0000000000000110 t get_link_local_mac_ipv6\n+0000000000000080 t get_mcast_mac_ipv4\n+0000000000000000 t get_mcast_mac_ipv6\n+00000000000001b0 t get_neigh_cb\n+00000000000001e0 t get_neigh_cb_event\n+0000000000000680 t get_route_cb\n+0000000000000240 t get_route_cb_parser\n+ U getifaddrs\n+ U if_nametoindex\n+ U memcmp\n+ U memcpy\n+ U nl_addr_build\n+ U nl_addr_clone\n+ U nl_addr_fill_sockaddr\n+ U nl_addr_get_binary_addr\n+ U nl_addr_get_family\n+ U nl_addr_get_len\n+ U nl_addr_get_prefixlen\n+ U nl_addr_info\n+ U nl_addr_put\n+ U nl_addr_set_prefixlen\n+ U nl_cache_free\n+ U nl_cache_mngt_provide\n+ U nl_cache_mngt_unprovide\n+ U nl_cache_refill\n+ U nl_connect\n+ U nl_msg_parse\n+ U nl_object_match_filter\n+ U nl_recvmsgs_default\n+ U nl_send_auto\n+ U nl_socket_add_membership\n+ U nl_socket_alloc\n+ U nl_socket_disable_seq_check\n+ U nl_socket_free\n+ U nl_socket_get_fd\n+ U nl_socket_modify_cb\n+ U nla_put\n+ U nlmsg_alloc_simple\n+ U nlmsg_append\n+ U nlmsg_free\n+00000000000010c0 T rdmacore50_0_neigh_free_resources\n+0000000000001060 T rdmacore50_0_neigh_get_ll\n+0000000000000cf0 T rdmacore50_0_neigh_get_oif_from_src\n+0000000000000f60 T rdmacore50_0_neigh_get_vlan_id_from_dev\n+0000000000000e10 T rdmacore50_0_neigh_init_resources\n+0000000000000ff0 T rdmacore50_0_neigh_set_dst\n+0000000000001050 T rdmacore50_0_neigh_set_oif\n+0000000000001020 T rdmacore50_0_neigh_set_src\n+0000000000000fd0 T rdmacore50_0_neigh_set_vlan_id\n+00000000000011a0 T rdmacore50_0_process_get_neigh\n+ U read\n+ U rtnl_link_alloc_cache\n+ U rtnl_link_get\n+ U rtnl_link_get_addr\n+ U rtnl_link_is_vlan\n+ U rtnl_link_put\n+ U rtnl_link_vlan_get_id\n+ U rtnl_neigh_alloc\n+ U rtnl_neigh_alloc_cache\n+ U rtnl_neigh_get\n+ U rtnl_neigh_get_lladdr\n+ U rtnl_neigh_put\n+ U rtnl_neigh_set_dst\n+ U rtnl_neigh_set_ifindex\n+ U rtnl_route_alloc_cache\n+ U rtnl_route_get_pref_src\n+ U rtnl_route_get_type\n+ U rtnl_route_nexthop_n\n+ U rtnl_route_nh_get_gateway\n+ U rtnl_route_nh_get_ifindex\n+ U select\n+ U sendto\n+ U socket\n+ U timerfd_create\n+ U timerfd_settime\n \n init.c.o:\n 0000000000000000 r .LC0\n 0000000000000010 r .LC1\n 000000000000006f r .LC10\n 000000000000007b r .LC11\n 0000000000000095 r .LC12\n@@ -383,216 +392,21 @@\n U strtol\n U strtoul\n 0000000000000450 t try_all_drivers\n 0000000000000000 t try_driver\n 0000000000000008 b verbs_log_fp\n 0000000000000010 b verbs_log_level\n \n-cmd.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U free\n-0000000000000000 t ibv_cmd_modify_srq_v3\n- U malloc\n- U memcmp\n- U memcpy\n- U memset\n- U pthread_cond_init\n- U pthread_mutex_init\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0_abi_ver\n-00000000000003c0 T rdmacore50_0_ibv_cmd_alloc_mw\n-0000000000000120 T rdmacore50_0_ibv_cmd_alloc_pd\n-0000000000001870 T rdmacore50_0_ibv_cmd_attach_mcast\n-0000000000001790 T rdmacore50_0_ibv_cmd_create_ah\n-0000000000001970 T rdmacore50_0_ibv_cmd_create_flow\n-00000000000020a0 T rdmacore50_0_ibv_cmd_create_rwq_ind_table\n-00000000000018e0 T rdmacore50_0_ibv_cmd_detach_mcast\n-0000000000002210 T rdmacore50_0_ibv_cmd_modify_cq\n-0000000000000a90 T rdmacore50_0_ibv_cmd_modify_qp\n-0000000000000d10 T rdmacore50_0_ibv_cmd_modify_qp_ex\n-0000000000000650 T rdmacore50_0_ibv_cmd_modify_srq\n-0000000000001ff0 T rdmacore50_0_ibv_cmd_modify_wq\n-0000000000000740 T rdmacore50_0_ibv_cmd_open_qp\n-0000000000000170 T rdmacore50_0_ibv_cmd_open_xrcd\n-0000000000000450 T rdmacore50_0_ibv_cmd_poll_cq\n-0000000000001310 T rdmacore50_0_ibv_cmd_post_recv\n-0000000000000fa0 T rdmacore50_0_ibv_cmd_post_send\n-0000000000001550 T rdmacore50_0_ibv_cmd_post_srq_recv\n-0000000000000880 T rdmacore50_0_ibv_cmd_query_qp\n-00000000000006c0 T rdmacore50_0_ibv_cmd_query_srq\n-0000000000000210 T rdmacore50_0_ibv_cmd_reg_mr\n-0000000000000580 T rdmacore50_0_ibv_cmd_req_notify_cq\n-00000000000002e0 T rdmacore50_0_ibv_cmd_rereg_mr\n-00000000000005f0 T rdmacore50_0_ibv_cmd_resize_cq\n-0000000000000000 B rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd_flow.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_flow\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd_counters.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_counters\n-0000000000000190 T rdmacore50_0_ibv_cmd_destroy_counters\n-0000000000000240 T rdmacore50_0_ibv_cmd_read_counters\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n cmd_xrcd.c.o:\n U __stack_chk_fail\n U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_ioctl_fallback\n 0000000000000000 T rdmacore50_0_ibv_cmd_close_xrcd\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-cmd_ioctl.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U ioctl\n-0000000000000000 T rdmacore50_0___ioctl_final_num_attrs\n-0000000000000350 T rdmacore50_0__write_set_uhw\n-0000000000000030 T rdmacore50_0_execute_ioctl\n-\n-cmd_cq.c.o:\n- U __stack_chk_fail\n-0000000000000000 t ibv_icmd_create_cq\n- U pthread_cond_wait\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_req_ex\n- U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_get_resp_ex\n- U rdmacore50_0__write_set_uhw\n-0000000000000510 T rdmacore50_0_ibv_cmd_create_cq\n-0000000000000610 T rdmacore50_0_ibv_cmd_create_cq_ex\n-0000000000000730 T rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd_wq.c.o:\n-0000000000000000 r .LC0\n- U __errno_location\n- U __stack_chk_fail\n- U pthread_cond_wait\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req_ex\n- U rdmacore50_0__write_get_resp_ex\n- U rdmacore50_0__write_set_uhw\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_wq\n-0000000000000540 T rdmacore50_0_ibv_cmd_destroy_wq\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-dynamic_driver.c.o:\n-\n-cmd_flow_action.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U memcpy\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_flow_action_esp\n-0000000000000620 T rdmacore50_0_ibv_cmd_destroy_flow_action\n-0000000000000330 T rdmacore50_0_ibv_cmd_modify_flow_action_esp\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd_device.c.o:\n-0000000000000000 r .LC0\n-000000000000001c r .LC1\n-0000000000000022 r .LC2\n-000000000000002f r .LC3\n-0000000000000039 r .LC4\n-000000000000004c r .LC6\n-000000000000005d r .LC7\n-0000000000000061 r .LC8\n-0000000000000000 r .LC9\n- U __asprintf_chk\n- U __errno_location\n- U __isoc99_sscanf\n- U __stack_chk_fail\n-00000000000010e0 T _ibv_query_gid_ex\n-0000000000001550 T _ibv_query_gid_table\n- U closedir\n- U free\n- U ibv_query_device\n- U ibv_query_port\n- U if_nametoindex\n- U memset\n- U opendir\n-0000000000000180 t query_gid_table_fb\n-0000000000000000 t query_sysfs_gid_type.isra.0\n-0000000000000c50 T rdmacore50_0___ibv_query_gid_ex\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_set_uhw\n- U rdmacore50_0_execute_ioctl\n-0000000000000720 T rdmacore50_0_ibv_cmd_alloc_async_fd\n-00000000000007d0 T rdmacore50_0_ibv_cmd_get_context\n-0000000000000ac0 T rdmacore50_0_ibv_cmd_query_context\n-0000000000001740 T rdmacore50_0_ibv_cmd_query_device_any\n-00000000000004d0 T rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_read_ibdev_sysfs_file\n- U strcmp\n-\n-ibdev_nl.c.o:\n-0000000000000000 r .LC0\n-0000000000000003 r .LC1\n-000000000000001a r .LC2\n-0000000000000021 r .LC3\n- U __snprintf_chk\n- U __stack_chk_fail\n- U calloc\n- U close\n- U closedir\n- U dirfd\n-00000000000001a0 t find_sysfs_devs_nl_cb\n-0000000000000090 t find_uverbs_nl_cb\n- U free\n-0000000000000000 t get_copy_on_fork_cb\n- U ibv_get_sysfs_path\n- U nl_socket_free\n- U nla_get_string\n- U nla_get_u32\n- U nla_get_u64\n- U nla_get_u8\n- U nlmsg_hdr\n- U nlmsg_parse\n- U openat\n- U opendir\n- U rdmacore50_0_abi_ver\n- U rdmacore50_0_decode_knode_type\n-0000000000000370 T rdmacore50_0_find_sysfs_devs_nl\n-00000000000005b0 T rdmacore50_0_get_copy_on_fork\n- U rdmacore50_0_rdmanl_get_chardev\n- U rdmacore50_0_rdmanl_get_copy_on_fork\n- U rdmacore50_0_rdmanl_get_devices\n- U rdmacore50_0_rdmanl_policy\n- U rdmacore50_0_rdmanl_socket_alloc\n- U rdmacore50_0_setup_sysfs_uverbs\n- U rdmacore50_0_try_access_device\n- U readdir\n- U snprintf\n-\n verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000012 r .LC1\n 0000000000000140 r CSWTCH.38\n 00000000000000e0 r CSWTCH.41\n U __errno_location\n U __isoc99_sscanf\n@@ -680,67 +494,126 @@\n cmd_mw.c.o:\n U __stack_chk_fail\n U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_ioctl_fallback\n 0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_mw\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-memory.c.o:\n+cmd_mr.c.o:\n+0000000000000000 r .LC5\n+ U __errno_location\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0_execute_ioctl\n+0000000000000000 T rdmacore50_0_ibv_cmd_advise_mr\n+0000000000000130 T rdmacore50_0_ibv_cmd_dereg_mr\n+0000000000000230 T rdmacore50_0_ibv_cmd_query_mr\n+0000000000000360 T rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_device.c.o:\n 0000000000000000 r .LC0\n-000000000000000f r .LC1\n-0000000000000012 r .LC2\n-000000000000001a r .LC3\n-000000000000002a r .LC4\n-0000000000000032 r .LC7\n-0000000000000000 r .LC8\n+000000000000001c r .LC1\n+0000000000000022 r .LC2\n+000000000000002f r .LC3\n+0000000000000039 r .LC4\n+000000000000004c r .LC6\n+000000000000005d r .LC7\n+0000000000000061 r .LC8\n+0000000000000000 r .LC9\n+ U __asprintf_chk\n U __errno_location\n U __isoc99_sscanf\n-0000000000000000 t __mm_remove\n- U __snprintf_chk\n U __stack_chk_fail\n- U fclose\n- U fgets\n- U fopen\n+00000000000010e0 T _ibv_query_gid_ex\n+0000000000001550 T _ibv_query_gid_table\n+ U closedir\n U free\n-00000000000005a0 t get_page_size\n- U getenv\n- U getpid\n-0000000000000004 b huge_page_enabled\n-00000000000011a0 T ibv_dofork_range\n-0000000000001160 T ibv_dontfork_range\n-0000000000000fa0 T ibv_fork_init\n-0000000000001130 T ibv_is_fork_initialized\n-0000000000000a40 t ibv_madvise_range.part.0\n-000000000000000a t ibv_madvise_range.part.0.cold\n- U madvise\n- U malloc\n-0000000000000020 b mm_mutex\n-0000000000000048 b mm_root\n-0000000000000008 b page_size\n- U posix_memalign\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_get_copy_on_fork\n-0000000000000710 t split_range\n-0000000000000000 t split_range.cold\n- U strstr\n- U sysconf\n-0000000000000000 b too_late\n+ U ibv_query_device\n+ U ibv_query_port\n+ U if_nametoindex\n+ U memset\n+ U opendir\n+0000000000000180 t query_gid_table_fb\n+0000000000000000 t query_sysfs_gid_type.isra.0\n+0000000000000c50 T rdmacore50_0___ibv_query_gid_ex\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req\n+ U rdmacore50_0__write_get_resp\n+ U rdmacore50_0__write_set_uhw\n+ U rdmacore50_0_execute_ioctl\n+0000000000000720 T rdmacore50_0_ibv_cmd_alloc_async_fd\n+00000000000007d0 T rdmacore50_0_ibv_cmd_get_context\n+0000000000000ac0 T rdmacore50_0_ibv_cmd_query_context\n+0000000000001740 T rdmacore50_0_ibv_cmd_query_device_any\n+00000000000004d0 T rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_read_ibdev_sysfs_file\n+ U strcmp\n \n-marshall.c.o:\n-0000000000000000 T ibv_copy_ah_attr_from_kern\n-0000000000000100 T ibv_copy_path_rec_from_kern\n-00000000000001a0 T ibv_copy_path_rec_to_kern\n-0000000000000040 T ibv_copy_qp_attr_from_kern\n+dynamic_driver.c.o:\n \n-cmd_pd.c.o:\n+cmd_ah.c.o:\n U __stack_chk_fail\n U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_pd\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_ah\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+ U free\n+0000000000000000 t ibv_cmd_modify_srq_v3\n+ U malloc\n+ U memcmp\n+ U memcpy\n+ U memset\n+ U pthread_cond_init\n+ U pthread_mutex_init\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0_abi_ver\n+00000000000003c0 T rdmacore50_0_ibv_cmd_alloc_mw\n+0000000000000120 T rdmacore50_0_ibv_cmd_alloc_pd\n+0000000000001870 T rdmacore50_0_ibv_cmd_attach_mcast\n+0000000000001790 T rdmacore50_0_ibv_cmd_create_ah\n+0000000000001970 T rdmacore50_0_ibv_cmd_create_flow\n+00000000000020a0 T rdmacore50_0_ibv_cmd_create_rwq_ind_table\n+00000000000018e0 T rdmacore50_0_ibv_cmd_detach_mcast\n+0000000000002210 T rdmacore50_0_ibv_cmd_modify_cq\n+0000000000000a90 T rdmacore50_0_ibv_cmd_modify_qp\n+0000000000000d10 T rdmacore50_0_ibv_cmd_modify_qp_ex\n+0000000000000650 T rdmacore50_0_ibv_cmd_modify_srq\n+0000000000001ff0 T rdmacore50_0_ibv_cmd_modify_wq\n+0000000000000740 T rdmacore50_0_ibv_cmd_open_qp\n+0000000000000170 T rdmacore50_0_ibv_cmd_open_xrcd\n+0000000000000450 T rdmacore50_0_ibv_cmd_poll_cq\n+0000000000001310 T rdmacore50_0_ibv_cmd_post_recv\n+0000000000000fa0 T rdmacore50_0_ibv_cmd_post_send\n+0000000000001550 T rdmacore50_0_ibv_cmd_post_srq_recv\n+0000000000000880 T rdmacore50_0_ibv_cmd_query_qp\n+00000000000006c0 T rdmacore50_0_ibv_cmd_query_srq\n+0000000000000210 T rdmacore50_0_ibv_cmd_reg_mr\n+0000000000000580 T rdmacore50_0_ibv_cmd_req_notify_cq\n+00000000000002e0 T rdmacore50_0_ibv_cmd_rereg_mr\n+00000000000005f0 T rdmacore50_0_ibv_cmd_resize_cq\n+0000000000000000 B rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_dm.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0_execute_ioctl\n+0000000000000000 T rdmacore50_0_ibv_cmd_alloc_dm\n+00000000000001e0 T rdmacore50_0_ibv_cmd_free_dm\n+0000000000000290 T rdmacore50_0_ibv_cmd_reg_dm_mr\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n dummy_ops.c.o:\n U __errno_location\n 0000000000000000 t advise_mr\n 00000000000001d0 t alloc_dm\n 00000000000001b0 t alloc_mw\n@@ -816,14 +689,216 @@\n 00000000000000f0 t rereg_mr\n 00000000000001f0 t resize_cq\n 0000000000000210 t set_ece\n 0000000000000440 t unimport_dm\n 0000000000000420 t unimport_mr\n 0000000000000430 t unimport_pd\n \n+ibdev_nl.c.o:\n+0000000000000000 r .LC0\n+0000000000000003 r .LC1\n+000000000000001a r .LC2\n+0000000000000021 r .LC3\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U calloc\n+ U close\n+ U closedir\n+ U dirfd\n+00000000000001a0 t find_sysfs_devs_nl_cb\n+0000000000000090 t find_uverbs_nl_cb\n+ U free\n+0000000000000000 t get_copy_on_fork_cb\n+ U ibv_get_sysfs_path\n+ U nl_socket_free\n+ U nla_get_string\n+ U nla_get_u32\n+ U nla_get_u64\n+ U nla_get_u8\n+ U nlmsg_hdr\n+ U nlmsg_parse\n+ U openat\n+ U opendir\n+ U rdmacore50_0_abi_ver\n+ U rdmacore50_0_decode_knode_type\n+0000000000000370 T rdmacore50_0_find_sysfs_devs_nl\n+00000000000005b0 T rdmacore50_0_get_copy_on_fork\n+ U rdmacore50_0_rdmanl_get_chardev\n+ U rdmacore50_0_rdmanl_get_copy_on_fork\n+ U rdmacore50_0_rdmanl_get_devices\n+ U rdmacore50_0_rdmanl_policy\n+ U rdmacore50_0_rdmanl_socket_alloc\n+ U rdmacore50_0_setup_sysfs_uverbs\n+ U rdmacore50_0_try_access_device\n+ U readdir\n+ U snprintf\n+\n+cmd_ioctl.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+ U ioctl\n+0000000000000000 T rdmacore50_0___ioctl_final_num_attrs\n+0000000000000350 T rdmacore50_0__write_set_uhw\n+0000000000000030 T rdmacore50_0_execute_ioctl\n+\n+enum_strs.c.o:\n+0000000000000000 r .LC0\n+0000000000000140 d event_type_str.2\n+0000000000000050 T ibv_event_type_str\n+0000000000000000 T ibv_node_type_str\n+0000000000000030 T ibv_port_state_str\n+0000000000000070 T ibv_wc_status_str\n+0000000000000220 d node_type_str.4\n+00000000000001e0 d port_state_str.3\n+0000000000000090 T rdmacore50_0_ibv_wr_opcode_str\n+0000000000000080 d wc_status_str.1\n+0000000000000000 d wr_opcode_str.0\n+\n+marshall.c.o:\n+0000000000000000 T ibv_copy_ah_attr_from_kern\n+0000000000000100 T ibv_copy_path_rec_from_kern\n+00000000000001a0 T ibv_copy_path_rec_to_kern\n+0000000000000040 T ibv_copy_qp_attr_from_kern\n+\n+cmd_srq.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+0000000000000000 t ibv_icmd_create_srq\n+ U pthread_cond_init\n+ U pthread_cond_wait\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req\n+ U rdmacore50_0__write_get_resp\n+ U rdmacore50_0__write_set_uhw\n+ U rdmacore50_0_abi_ver\n+00000000000007d0 T rdmacore50_0_ibv_cmd_create_srq\n+00000000000008f0 T rdmacore50_0_ibv_cmd_create_srq_ex\n+0000000000000a00 T rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_counters.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0_execute_ioctl\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_counters\n+0000000000000190 T rdmacore50_0_ibv_cmd_destroy_counters\n+0000000000000240 T rdmacore50_0_ibv_cmd_read_counters\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_pd.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_flow.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_flow\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_wq.c.o:\n+0000000000000000 r .LC0\n+ U __errno_location\n+ U __stack_chk_fail\n+ U pthread_cond_wait\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req_ex\n+ U rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0__write_set_uhw\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_wq\n+0000000000000540 T rdmacore50_0_ibv_cmd_destroy_wq\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_cq.c.o:\n+ U __stack_chk_fail\n+0000000000000000 t ibv_icmd_create_cq\n+ U pthread_cond_wait\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req\n+ U rdmacore50_0__write_get_req_ex\n+ U rdmacore50_0__write_get_resp\n+ U rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0__write_set_uhw\n+0000000000000510 T rdmacore50_0_ibv_cmd_create_cq\n+0000000000000610 T rdmacore50_0_ibv_cmd_create_cq_ex\n+0000000000000730 T rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+all_providers.c.o:\n+0000000000000000 d all_providers\n+0000000000000000 D verbs_provider_all\n+ U verbs_provider_bnxt_re\n+ U verbs_provider_cxgb4\n+ U verbs_provider_efa\n+ U verbs_provider_erdma\n+ U verbs_provider_hfi1verbs\n+ U verbs_provider_hns\n+ U verbs_provider_ipathverbs\n+ U verbs_provider_irdma\n+ U verbs_provider_mana\n+ U verbs_provider_mlx4\n+ U verbs_provider_mlx5\n+ U verbs_provider_mthca\n+ U verbs_provider_ocrdma\n+ U verbs_provider_qedr\n+ U verbs_provider_rxe\n+ U verbs_provider_siw\n+ U verbs_provider_vmw_pvrdma\n+\n+cmd_fallback.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+0000000000000000 t ioctl_write\n+ U memcpy\n+ U memset\n+00000000000002b0 T rdmacore50_0__check_legacy\n+0000000000000680 T rdmacore50_0__execute_cmd_write\n+00000000000007b0 T rdmacore50_0__execute_cmd_write_ex\n+0000000000000350 T rdmacore50_0__execute_ioctl_fallback\n+0000000000000570 T rdmacore50_0__write_get_req\n+00000000000005c0 T rdmacore50_0__write_get_req_ex\n+0000000000000600 T rdmacore50_0__write_get_resp\n+0000000000000640 T rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0_execute_ioctl\n+ U write\n+\n+compat-1_0.c.o:\n+\n+static_driver.c.o:\n+0000000000000000 T ibv_static_providers\n+0000000000000000 R verbs_provider_none\n+\n+cmd_flow_action.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+ U memcpy\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0_execute_ioctl\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_flow_action_esp\n+0000000000000620 T rdmacore50_0_ibv_cmd_destroy_flow_action\n+0000000000000330 T rdmacore50_0_ibv_cmd_modify_flow_action_esp\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n device.c.o:\n 0000000000000000 r .LC0\n 000000000000000a r .LC1\n U _GLOBAL_OFFSET_TABLE_\n U __errno_location\n U __isoc99_sscanf\n 0000000000000000 t __lib_ibv_create_cq_ex\n@@ -866,14 +941,79 @@\n 00000000000003e0 T rdmacore50_0_verbs_init_context\n 0000000000000380 T rdmacore50_0_verbs_init_cq\n 00000000000007a0 T rdmacore50_0_verbs_open_device\n U rdmacore50_0_verbs_set_ops\n 0000000000000be0 T rdmacore50_0_verbs_uninit_context\n U read\n \n+sysfs.c.o:\n+0000000000000000 r .LC0\n+0000000000000005 r .LC1\n+0000000000000010 r .LC2\n+ U __asprintf_chk\n+ U __errno_location\n+ U __stack_chk_fail\n+ U __vasprintf_chk\n+ U close\n+ U free\n+ U getenv\n+ U geteuid\n+ U getuid\n+0000000000000000 T ibv_get_sysfs_path\n+0000000000000150 T ibv_read_sysfs_file\n+ U openat\n+0000000000000240 T rdmacore50_0_ibv_read_ibdev_sysfs_file\n+00000000000000c0 T rdmacore50_0_ibv_read_sysfs_file_at\n+ U read\n+ U strlen\n+ U strndup\n+0000000000000000 b sysfs_path\n+\n+memory.c.o:\n+0000000000000000 r .LC0\n+000000000000000f r .LC1\n+0000000000000012 r .LC2\n+000000000000001a r .LC3\n+000000000000002a r .LC4\n+0000000000000032 r .LC7\n+0000000000000000 r .LC8\n+ U __errno_location\n+ U __isoc99_sscanf\n+0000000000000000 t __mm_remove\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U fclose\n+ U fgets\n+ U fopen\n+ U free\n+00000000000005a0 t get_page_size\n+ U getenv\n+ U getpid\n+0000000000000004 b huge_page_enabled\n+00000000000011a0 T ibv_dofork_range\n+0000000000001160 T ibv_dontfork_range\n+0000000000000fa0 T ibv_fork_init\n+0000000000001130 T ibv_is_fork_initialized\n+0000000000000a40 t ibv_madvise_range.part.0\n+000000000000000a t ibv_madvise_range.part.0.cold\n+ U madvise\n+ U malloc\n+0000000000000020 b mm_mutex\n+0000000000000048 b mm_root\n+0000000000000008 b page_size\n+ U posix_memalign\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_get_copy_on_fork\n+0000000000000710 t split_range\n+0000000000000000 t split_range.cold\n+ U strstr\n+ U sysconf\n+0000000000000000 b too_late\n+\n cmd_qp.c.o:\n U __errno_location\n U __stack_chk_fail\n 0000000000000000 t ibv_icmd_create_qp\n U pthread_cond_init\n U pthread_cond_wait\n U pthread_mutex_init\n@@ -891,208 +1031,25 @@\n U rdmacore50_0_abi_ver\n 0000000000000c70 T rdmacore50_0_ibv_cmd_create_qp\n 0000000000000df0 T rdmacore50_0_ibv_cmd_create_qp_ex\n 0000000000000ef0 T rdmacore50_0_ibv_cmd_create_qp_ex2\n 0000000000000ff0 T rdmacore50_0_ibv_cmd_destroy_qp\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-cmd_rwq_ind.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-all_providers.c.o:\n-0000000000000000 d all_providers\n-0000000000000000 D verbs_provider_all\n- U verbs_provider_bnxt_re\n- U verbs_provider_cxgb4\n- U verbs_provider_efa\n- U verbs_provider_erdma\n- U verbs_provider_hfi1verbs\n- U verbs_provider_hns\n- U verbs_provider_ipathverbs\n- U verbs_provider_irdma\n- U verbs_provider_mana\n- U verbs_provider_mlx4\n- U verbs_provider_mlx5\n- U verbs_provider_mthca\n- U verbs_provider_ocrdma\n- U verbs_provider_qedr\n- U verbs_provider_rxe\n- U verbs_provider_siw\n- U verbs_provider_vmw_pvrdma\n-\n-cmd_mr.c.o:\n-0000000000000000 r .LC5\n- U __errno_location\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_advise_mr\n-0000000000000130 T rdmacore50_0_ibv_cmd_dereg_mr\n-0000000000000230 T rdmacore50_0_ibv_cmd_query_mr\n-0000000000000360 T rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd_dm.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_alloc_dm\n-00000000000001e0 T rdmacore50_0_ibv_cmd_free_dm\n-0000000000000290 T rdmacore50_0_ibv_cmd_reg_dm_mr\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-neigh.c.o:\n+interval_set.c.o:\n U __errno_location\n- U __fdelt_chk\n- U __stack_chk_fail\n- U bind\n- U close\n-0000000000000000 d encoded_prefixes\n- U freeaddrinfo\n- U freeifaddrs\n-0000000000000110 t get_link_local_mac_ipv6\n-0000000000000080 t get_mcast_mac_ipv4\n-0000000000000000 t get_mcast_mac_ipv6\n-00000000000001b0 t get_neigh_cb\n-00000000000001e0 t get_neigh_cb_event\n-0000000000000680 t get_route_cb\n-0000000000000240 t get_route_cb_parser\n- U getifaddrs\n- U if_nametoindex\n- U memcmp\n- U memcpy\n- U nl_addr_build\n- U nl_addr_clone\n- U nl_addr_fill_sockaddr\n- U nl_addr_get_binary_addr\n- U nl_addr_get_family\n- U nl_addr_get_len\n- U nl_addr_get_prefixlen\n- U nl_addr_info\n- U nl_addr_put\n- U nl_addr_set_prefixlen\n- U nl_cache_free\n- U nl_cache_mngt_provide\n- U nl_cache_mngt_unprovide\n- U nl_cache_refill\n- U nl_connect\n- U nl_msg_parse\n- U nl_object_match_filter\n- U nl_recvmsgs_default\n- U nl_send_auto\n- U nl_socket_add_membership\n- U nl_socket_alloc\n- U nl_socket_disable_seq_check\n- U nl_socket_free\n- U nl_socket_get_fd\n- U nl_socket_modify_cb\n- U nla_put\n- U nlmsg_alloc_simple\n- U nlmsg_append\n- U nlmsg_free\n-00000000000010c0 T rdmacore50_0_neigh_free_resources\n-0000000000001060 T rdmacore50_0_neigh_get_ll\n-0000000000000cf0 T rdmacore50_0_neigh_get_oif_from_src\n-0000000000000f60 T rdmacore50_0_neigh_get_vlan_id_from_dev\n-0000000000000e10 T rdmacore50_0_neigh_init_resources\n-0000000000000ff0 T rdmacore50_0_neigh_set_dst\n-0000000000001050 T rdmacore50_0_neigh_set_oif\n-0000000000001020 T rdmacore50_0_neigh_set_src\n-0000000000000fd0 T rdmacore50_0_neigh_set_vlan_id\n-00000000000011a0 T rdmacore50_0_process_get_neigh\n- U read\n- U rtnl_link_alloc_cache\n- U rtnl_link_get\n- U rtnl_link_get_addr\n- U rtnl_link_is_vlan\n- U rtnl_link_put\n- U rtnl_link_vlan_get_id\n- U rtnl_neigh_alloc\n- U rtnl_neigh_alloc_cache\n- U rtnl_neigh_get\n- U rtnl_neigh_get_lladdr\n- U rtnl_neigh_put\n- U rtnl_neigh_set_dst\n- U rtnl_neigh_set_ifindex\n- U rtnl_route_alloc_cache\n- U rtnl_route_get_pref_src\n- U rtnl_route_get_type\n- U rtnl_route_nexthop_n\n- U rtnl_route_nh_get_gateway\n- U rtnl_route_nh_get_ifindex\n- U select\n- U sendto\n- U socket\n- U timerfd_create\n- U timerfd_settime\n-\n-static_driver.c.o:\n-0000000000000000 T ibv_static_providers\n-0000000000000000 R verbs_provider_none\n-\n-mmio.c.o:\n-\n-cl_map.c.o:\n-00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n-0000000000000db0 T rdmacore50_0_cl_qmap_delta\n-0000000000000060 T rdmacore50_0_cl_qmap_get\n-00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n-0000000000000000 T rdmacore50_0_cl_qmap_init\n-0000000000000140 T rdmacore50_0_cl_qmap_insert\n-00000000000008f0 T rdmacore50_0_cl_qmap_merge\n-00000000000008b0 T rdmacore50_0_cl_qmap_remove\n-0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n-\n-rdma_nl.c.o:\n- U __stack_chk_fail\n- U nl_connect\n- U nl_recvmsgs_default\n- U nl_send_auto\n- U nl_send_simple\n- U nl_socket_alloc\n- U nl_socket_disable_auto_ack\n- U nl_socket_disable_msg_peek\n- U nl_socket_free\n- U nl_socket_modify_cb\n- U nl_socket_modify_err_cb\n- U nla_put\n- U nlmsg_alloc_simple\n- U nlmsg_free\n-0000000000000200 T rdmacore50_0_rdmanl_get_chardev\n-0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n-0000000000000130 T rdmacore50_0_rdmanl_get_devices\n-0000000000000000 D rdmacore50_0_rdmanl_policy\n-0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n-0000000000000000 t rdmanl_saw_err_cb\n- U strlen\n-\n-open_cdev.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-000000000000001b r .LC2\n- U __asprintf_chk\n- U __stack_chk_fail\n- U close\n+ U calloc\n U free\n- U fstat\n- U inotify_add_watch\n- U inotify_init1\n- U open\n-0000000000000000 t open_cdev_robust.isra.0\n- U poll\n-0000000000000380 T rdmacore50_0_open_cdev\n- U read\n- U timerfd_create\n- U timerfd_settime\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+0000000000000290 T rdmacore50_0_iset_alloc_range\n+0000000000000000 T rdmacore50_0_iset_create\n+0000000000000050 T rdmacore50_0_iset_destroy\n+0000000000000090 T rdmacore50_0_iset_insert_range\n \n node_name_map.c.o:\n 0000000000000000 r .LC0\n 000000000000001b r .LC1\n 000000000000001d r .LC2\n 0000000000000000 r .LC3\n 0000000000000020 r .LC4\n@@ -1119,37 +1076,80 @@\n U strchr\n U strdup\n U strerror\n U strncpy\n U strtok\n U strtoull\n \n-interval_set.c.o:\n- U __errno_location\n- U calloc\n- U free\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n-0000000000000290 T rdmacore50_0_iset_alloc_range\n-0000000000000000 T rdmacore50_0_iset_create\n-0000000000000050 T rdmacore50_0_iset_destroy\n-0000000000000090 T rdmacore50_0_iset_insert_range\n-\n bitmap.c.o:\n U memset\n 0000000000000160 T rdmacore50_0_bitmap_fill_region\n 0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n 0000000000000220 T rdmacore50_0_bitmap_find_free_region\n 0000000000000090 T rdmacore50_0_bitmap_zero_region\n \n+mmio.c.o:\n+\n+cl_map.c.o:\n+00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n+0000000000000db0 T rdmacore50_0_cl_qmap_delta\n+0000000000000060 T rdmacore50_0_cl_qmap_get\n+00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n+0000000000000000 T rdmacore50_0_cl_qmap_init\n+0000000000000140 T rdmacore50_0_cl_qmap_insert\n+00000000000008f0 T rdmacore50_0_cl_qmap_merge\n+00000000000008b0 T rdmacore50_0_cl_qmap_remove\n+0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+\n+open_cdev.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+000000000000001b r .LC2\n+ U __asprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U free\n+ U fstat\n+ U inotify_add_watch\n+ U inotify_init1\n+ U open\n+0000000000000000 t open_cdev_robust.isra.0\n+ U poll\n+0000000000000380 T rdmacore50_0_open_cdev\n+ U read\n+ U timerfd_create\n+ U timerfd_settime\n+\n util.c.o:\n U fcntl\n U getenv\n U getrandom\n U rand_r\n 00000000000000d0 T rdmacore50_0_check_env\n 0000000000000050 T rdmacore50_0_get_random\n 0000000000000000 T rdmacore50_0_set_fd_nonblock\n 0000000000000110 T rdmacore50_0_xorshift32\n 0000000000000000 b seed.0\n U time\n+\n+rdma_nl.c.o:\n+ U __stack_chk_fail\n+ U nl_connect\n+ U nl_recvmsgs_default\n+ U nl_send_auto\n+ U nl_send_simple\n+ U nl_socket_alloc\n+ U nl_socket_disable_auto_ack\n+ U nl_socket_disable_msg_peek\n+ U nl_socket_free\n+ U nl_socket_modify_cb\n+ U nl_socket_modify_err_cb\n+ U nla_put\n+ U nlmsg_alloc_simple\n+ U nlmsg_free\n+0000000000000200 T rdmacore50_0_rdmanl_get_chardev\n+0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n+0000000000000130 T rdmacore50_0_rdmanl_get_devices\n+0000000000000000 D rdmacore50_0_rdmanl_policy\n+0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n+0000000000000000 t rdmanl_saw_err_cb\n+ U strlen\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,42 +1,42 @@\n ---------- 0 0 0 6648 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 5120 1970-01-01 00:00:00.000000 cmd_fallback.c.o\n-?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 sysfs.c.o\n-?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_ah.c.o\n-?rw-r--r-- 0 0 0 6152 1970-01-01 00:00:00.000000 enum_strs.c.o\n-?rw-r--r-- 0 0 0 6040 1970-01-01 00:00:00.000000 cmd_srq.c.o\n-?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 compat-1_0.c.o\n+?rw-r--r-- 0 0 0 1792 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n+?rw-r--r-- 0 0 0 14936 1970-01-01 00:00:00.000000 neigh.c.o\n ?rw-r--r-- 0 0 0 14736 1970-01-01 00:00:00.000000 init.c.o\n-?rw-r--r-- 0 0 0 18624 1970-01-01 00:00:00.000000 cmd.c.o\n-?rw-r--r-- 0 0 0 1784 1970-01-01 00:00:00.000000 cmd_flow.c.o\n-?rw-r--r-- 0 0 0 2944 1970-01-01 00:00:00.000000 cmd_counters.c.o\n ?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_xrcd.c.o\n-?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 cmd_ioctl.c.o\n-?rw-r--r-- 0 0 0 5144 1970-01-01 00:00:00.000000 cmd_cq.c.o\n-?rw-r--r-- 0 0 0 4240 1970-01-01 00:00:00.000000 cmd_wq.c.o\n-?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 dynamic_driver.c.o\n-?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n-?rw-r--r-- 0 0 0 12760 1970-01-01 00:00:00.000000 cmd_device.c.o\n-?rw-r--r-- 0 0 0 6016 1970-01-01 00:00:00.000000 ibdev_nl.c.o\n ?rw-r--r-- 0 0 0 18584 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_mw.c.o\n-?rw-r--r-- 0 0 0 9984 1970-01-01 00:00:00.000000 memory.c.o\n+?rw-r--r-- 0 0 0 3640 1970-01-01 00:00:00.000000 cmd_mr.c.o\n+?rw-r--r-- 0 0 0 12760 1970-01-01 00:00:00.000000 cmd_device.c.o\n+?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 dynamic_driver.c.o\n+?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_ah.c.o\n+?rw-r--r-- 0 0 0 18624 1970-01-01 00:00:00.000000 cmd.c.o\n+?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 cmd_dm.c.o\n+?rw-r--r-- 0 0 0 14048 1970-01-01 00:00:00.000000 dummy_ops.c.o\n+?rw-r--r-- 0 0 0 6016 1970-01-01 00:00:00.000000 ibdev_nl.c.o\n+?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 cmd_ioctl.c.o\n+?rw-r--r-- 0 0 0 6152 1970-01-01 00:00:00.000000 enum_strs.c.o\n ?rw-r--r-- 0 0 0 1960 1970-01-01 00:00:00.000000 marshall.c.o\n+?rw-r--r-- 0 0 0 6040 1970-01-01 00:00:00.000000 cmd_srq.c.o\n+?rw-r--r-- 0 0 0 2944 1970-01-01 00:00:00.000000 cmd_counters.c.o\n ?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_pd.c.o\n-?rw-r--r-- 0 0 0 14048 1970-01-01 00:00:00.000000 dummy_ops.c.o\n-?rw-r--r-- 0 0 0 11824 1970-01-01 00:00:00.000000 device.c.o\n-?rw-r--r-- 0 0 0 8072 1970-01-01 00:00:00.000000 cmd_qp.c.o\n-?rw-r--r-- 0 0 0 1792 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n+?rw-r--r-- 0 0 0 1784 1970-01-01 00:00:00.000000 cmd_flow.c.o\n+?rw-r--r-- 0 0 0 4240 1970-01-01 00:00:00.000000 cmd_wq.c.o\n+?rw-r--r-- 0 0 0 5144 1970-01-01 00:00:00.000000 cmd_cq.c.o\n ?rw-r--r-- 0 0 0 2624 1970-01-01 00:00:00.000000 all_providers.c.o\n-?rw-r--r-- 0 0 0 3640 1970-01-01 00:00:00.000000 cmd_mr.c.o\n-?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 cmd_dm.c.o\n-?rw-r--r-- 0 0 0 14936 1970-01-01 00:00:00.000000 neigh.c.o\n+?rw-r--r-- 0 0 0 5120 1970-01-01 00:00:00.000000 cmd_fallback.c.o\n+?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 compat-1_0.c.o\n ?rw-r--r-- 0 0 0 1288 1970-01-01 00:00:00.000000 static_driver.c.o\n+?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n+?rw-r--r-- 0 0 0 11824 1970-01-01 00:00:00.000000 device.c.o\n+?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 sysfs.c.o\n+?rw-r--r-- 0 0 0 9984 1970-01-01 00:00:00.000000 memory.c.o\n+?rw-r--r-- 0 0 0 8072 1970-01-01 00:00:00.000000 cmd_qp.c.o\n+?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n+?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n+?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n ?rw-r--r-- 0 0 0 6176 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n-?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n-?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n-?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n ?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n+?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libirdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libirdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,38 @@\n \n Archive index:\n+rdmacore50_0_irdma_clr_wqes in uk.c.o\n+rdmacore50_0_irdma_uk_qp_post_wr in uk.c.o\n+rdmacore50_0_irdma_qp_push_wqe in uk.c.o\n+rdmacore50_0_irdma_qp_get_next_send_wqe in uk.c.o\n+rdmacore50_0_irdma_qp_get_next_recv_wqe in uk.c.o\n+rdmacore50_0_irdma_uk_rdma_write in uk.c.o\n+rdmacore50_0_irdma_uk_rdma_read in uk.c.o\n+rdmacore50_0_irdma_uk_send in uk.c.o\n+rdmacore50_0_irdma_uk_inline_rdma_write in uk.c.o\n+rdmacore50_0_irdma_uk_inline_send in uk.c.o\n+rdmacore50_0_irdma_uk_stag_local_invalidate in uk.c.o\n+rdmacore50_0_irdma_uk_mw_bind in uk.c.o\n+rdmacore50_0_irdma_uk_post_receive in uk.c.o\n+rdmacore50_0_irdma_uk_cq_resize in uk.c.o\n+rdmacore50_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n+rdmacore50_0_irdma_uk_cq_request_notification in uk.c.o\n+rdmacore50_0_irdma_uk_cq_poll_cmpl in uk.c.o\n+rdmacore50_0_irdma_get_wqe_shift in uk.c.o\n+rdmacore50_0_irdma_get_sqdepth in uk.c.o\n+rdmacore50_0_irdma_get_rqdepth in uk.c.o\n+rdmacore50_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n+rdmacore50_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n+rdmacore50_0_irdma_uk_qp_init in uk.c.o\n+rdmacore50_0_irdma_uk_cq_init in uk.c.o\n+rdmacore50_0_irdma_uk_clean_cq in uk.c.o\n+rdmacore50_0_irdma_nop in uk.c.o\n+rdmacore50_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n+rdmacore50_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n+verbs_provider_irdma in umain.c.o\n rdmacore50_0_irdma_uquery_device_ex in uverbs.c.o\n rdmacore50_0_irdma_uquery_port in uverbs.c.o\n rdmacore50_0_irdma_ualloc_pd in uverbs.c.o\n rdmacore50_0_irdma_ufree_pd in uverbs.c.o\n rdmacore50_0_irdma_ureg_mr in uverbs.c.o\n rdmacore50_0_irdma_ureg_mr_dmabuf in uverbs.c.o\n rdmacore50_0_irdma_urereg_mr in uverbs.c.o\n@@ -27,43 +56,108 @@\n rdmacore50_0_irdma_ubind_mw in uverbs.c.o\n rdmacore50_0_irdma_upost_recv in uverbs.c.o\n rdmacore50_0_irdma_ucreate_ah in uverbs.c.o\n rdmacore50_0_irdma_udestroy_ah in uverbs.c.o\n rdmacore50_0_irdma_uattach_mcast in uverbs.c.o\n rdmacore50_0_irdma_udetach_mcast in uverbs.c.o\n rdmacore50_0_irdma_uresize_cq in uverbs.c.o\n-rdmacore50_0_irdma_clr_wqes in uk.c.o\n-rdmacore50_0_irdma_uk_qp_post_wr in uk.c.o\n-rdmacore50_0_irdma_qp_push_wqe in uk.c.o\n-rdmacore50_0_irdma_qp_get_next_send_wqe in uk.c.o\n-rdmacore50_0_irdma_qp_get_next_recv_wqe in uk.c.o\n-rdmacore50_0_irdma_uk_rdma_write in uk.c.o\n-rdmacore50_0_irdma_uk_rdma_read in uk.c.o\n-rdmacore50_0_irdma_uk_send in uk.c.o\n-rdmacore50_0_irdma_uk_inline_rdma_write in uk.c.o\n-rdmacore50_0_irdma_uk_inline_send in uk.c.o\n-rdmacore50_0_irdma_uk_stag_local_invalidate in uk.c.o\n-rdmacore50_0_irdma_uk_mw_bind in uk.c.o\n-rdmacore50_0_irdma_uk_post_receive in uk.c.o\n-rdmacore50_0_irdma_uk_cq_resize in uk.c.o\n-rdmacore50_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n-rdmacore50_0_irdma_uk_cq_request_notification in uk.c.o\n-rdmacore50_0_irdma_uk_cq_poll_cmpl in uk.c.o\n-rdmacore50_0_irdma_get_wqe_shift in uk.c.o\n-rdmacore50_0_irdma_get_sqdepth in uk.c.o\n-rdmacore50_0_irdma_get_rqdepth in uk.c.o\n-rdmacore50_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n-rdmacore50_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n-rdmacore50_0_irdma_uk_qp_init in uk.c.o\n-rdmacore50_0_irdma_uk_cq_init in uk.c.o\n-rdmacore50_0_irdma_uk_clean_cq in uk.c.o\n-rdmacore50_0_irdma_nop in uk.c.o\n-rdmacore50_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n-rdmacore50_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n-verbs_provider_irdma in umain.c.o\n+\n+uk.c.o:\n+ U __stack_chk_fail\n+0000000000000110 t irdma_copy_inline_data\n+0000000000000070 t irdma_copy_inline_data_gen_1\n+0000000000000014 t irdma_fragcnt_to_quanta_sq.cold\n+00000000000002b0 t irdma_inline_data_size_to_quanta\n+0000000000000030 t irdma_inline_data_size_to_quanta_gen_1\n+0000000000000210 t irdma_set_fragment\n+0000000000000270 t irdma_set_fragment_gen_1\n+0000000000000040 t irdma_set_mw_bind_wqe\n+0000000000000000 t irdma_set_mw_bind_wqe_gen_1\n+0000000000000000 t irdma_uk_rdma_write.cold\n+000000000000000a t irdma_uk_send.cold\n+ U memcpy\n+0000000000000310 T rdmacore50_0_irdma_clr_wqes\n+0000000000003420 T rdmacore50_0_irdma_fragcnt_to_quanta_sq\n+00000000000034c0 T rdmacore50_0_irdma_fragcnt_to_wqesize_rq\n+0000000000002cc0 T rdmacore50_0_irdma_get_rqdepth\n+0000000000002c60 T rdmacore50_0_irdma_get_sqdepth\n+0000000000002be0 T rdmacore50_0_irdma_get_wqe_shift\n+0000000000003280 T rdmacore50_0_irdma_nop\n+00000000000006b0 T rdmacore50_0_irdma_qp_get_next_recv_wqe\n+0000000000000430 T rdmacore50_0_irdma_qp_get_next_send_wqe\n+00000000000003a0 T rdmacore50_0_irdma_qp_push_wqe\n+0000000000002e30 T rdmacore50_0_irdma_uk_calc_depth_shift_rq\n+0000000000002d20 T rdmacore50_0_irdma_uk_calc_depth_shift_sq\n+00000000000031a0 T rdmacore50_0_irdma_uk_clean_cq\n+0000000000003140 T rdmacore50_0_irdma_uk_cq_init\n+00000000000025c0 T rdmacore50_0_irdma_uk_cq_poll_cmpl\n+0000000000002570 T rdmacore50_0_irdma_uk_cq_request_notification\n+0000000000002520 T rdmacore50_0_irdma_uk_cq_resize\n+0000000000002540 T rdmacore50_0_irdma_uk_cq_set_resized_cnt\n+0000000000001780 T rdmacore50_0_irdma_uk_inline_rdma_write\n+0000000000001b20 T rdmacore50_0_irdma_uk_inline_send\n+0000000000002130 T rdmacore50_0_irdma_uk_mw_bind\n+0000000000002370 T rdmacore50_0_irdma_uk_post_receive\n+0000000000002f30 T rdmacore50_0_irdma_uk_qp_init\n+0000000000000380 T rdmacore50_0_irdma_uk_qp_post_wr\n+0000000000000ca0 T rdmacore50_0_irdma_uk_rdma_read\n+0000000000000730 T rdmacore50_0_irdma_uk_rdma_write\n+00000000000011a0 T rdmacore50_0_irdma_uk_send\n+0000000000001f00 T rdmacore50_0_irdma_uk_stag_local_invalidate\n+\n+umain.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+0000000000000000 r hca_table\n+0000000000000010 t irdma_device_alloc\n+0000000000000030 t irdma_ualloc_context\n+0000000000000000 d irdma_uctx_ops\n+0000000000000000 d irdma_udev_ops\n+0000000000000270 t irdma_ufree_context\n+0000000000000000 t irdma_uninit_device\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_irdma_cq_event\n+ U rdmacore50_0_irdma_mmap\n+ U rdmacore50_0_irdma_munmap\n+ U rdmacore50_0_irdma_ualloc_mw\n+ U rdmacore50_0_irdma_ualloc_pd\n+ U rdmacore50_0_irdma_uarm_cq\n+ U rdmacore50_0_irdma_uattach_mcast\n+ U rdmacore50_0_irdma_ubind_mw\n+ U rdmacore50_0_irdma_ucreate_ah\n+ U rdmacore50_0_irdma_ucreate_cq\n+ U rdmacore50_0_irdma_ucreate_cq_ex\n+ U rdmacore50_0_irdma_ucreate_qp\n+ U rdmacore50_0_irdma_udealloc_mw\n+ U rdmacore50_0_irdma_udereg_mr\n+ U rdmacore50_0_irdma_udestroy_ah\n+ U rdmacore50_0_irdma_udestroy_cq\n+ U rdmacore50_0_irdma_udestroy_qp\n+ U rdmacore50_0_irdma_udetach_mcast\n+ U rdmacore50_0_irdma_ufree_pd\n+ U rdmacore50_0_irdma_umodify_qp\n+ U rdmacore50_0_irdma_upoll_cq\n+ U rdmacore50_0_irdma_upost_recv\n+ U rdmacore50_0_irdma_upost_send\n+ U rdmacore50_0_irdma_uquery_device_ex\n+ U rdmacore50_0_irdma_uquery_port\n+ U rdmacore50_0_irdma_uquery_qp\n+ U rdmacore50_0_irdma_ureg_mr\n+ U rdmacore50_0_irdma_ureg_mr_dmabuf\n+ U rdmacore50_0_irdma_urereg_mr\n+ U rdmacore50_0_irdma_uresize_cq\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_irdma\n \n uverbs.c.o:\n 0000000000000000 r .LC0\n 00000000000000e0 r CSWTCH.37\n U __errno_location\n 0000000000000500 t __irdma_upoll_cq.constprop.0\n U __snprintf_chk\n@@ -167,101 +261,7 @@\n 0000000000000950 T rdmacore50_0_irdma_uquery_port\n 0000000000002500 T rdmacore50_0_irdma_uquery_qp\n 0000000000000a80 T rdmacore50_0_irdma_ureg_mr\n 0000000000000b50 T rdmacore50_0_irdma_ureg_mr_dmabuf\n 0000000000000bf0 T rdmacore50_0_irdma_urereg_mr\n 00000000000030b0 T rdmacore50_0_irdma_uresize_cq\n 0000000000001710 t ucreate_cq\n-\n-uk.c.o:\n- U __stack_chk_fail\n-0000000000000110 t irdma_copy_inline_data\n-0000000000000070 t irdma_copy_inline_data_gen_1\n-0000000000000014 t irdma_fragcnt_to_quanta_sq.cold\n-00000000000002b0 t irdma_inline_data_size_to_quanta\n-0000000000000030 t irdma_inline_data_size_to_quanta_gen_1\n-0000000000000210 t irdma_set_fragment\n-0000000000000270 t irdma_set_fragment_gen_1\n-0000000000000040 t irdma_set_mw_bind_wqe\n-0000000000000000 t irdma_set_mw_bind_wqe_gen_1\n-0000000000000000 t irdma_uk_rdma_write.cold\n-000000000000000a t irdma_uk_send.cold\n- U memcpy\n-0000000000000310 T rdmacore50_0_irdma_clr_wqes\n-0000000000003420 T rdmacore50_0_irdma_fragcnt_to_quanta_sq\n-00000000000034c0 T rdmacore50_0_irdma_fragcnt_to_wqesize_rq\n-0000000000002cc0 T rdmacore50_0_irdma_get_rqdepth\n-0000000000002c60 T rdmacore50_0_irdma_get_sqdepth\n-0000000000002be0 T rdmacore50_0_irdma_get_wqe_shift\n-0000000000003280 T rdmacore50_0_irdma_nop\n-00000000000006b0 T rdmacore50_0_irdma_qp_get_next_recv_wqe\n-0000000000000430 T rdmacore50_0_irdma_qp_get_next_send_wqe\n-00000000000003a0 T rdmacore50_0_irdma_qp_push_wqe\n-0000000000002e30 T rdmacore50_0_irdma_uk_calc_depth_shift_rq\n-0000000000002d20 T rdmacore50_0_irdma_uk_calc_depth_shift_sq\n-00000000000031a0 T rdmacore50_0_irdma_uk_clean_cq\n-0000000000003140 T rdmacore50_0_irdma_uk_cq_init\n-00000000000025c0 T rdmacore50_0_irdma_uk_cq_poll_cmpl\n-0000000000002570 T rdmacore50_0_irdma_uk_cq_request_notification\n-0000000000002520 T rdmacore50_0_irdma_uk_cq_resize\n-0000000000002540 T rdmacore50_0_irdma_uk_cq_set_resized_cnt\n-0000000000001780 T rdmacore50_0_irdma_uk_inline_rdma_write\n-0000000000001b20 T rdmacore50_0_irdma_uk_inline_send\n-0000000000002130 T rdmacore50_0_irdma_uk_mw_bind\n-0000000000002370 T rdmacore50_0_irdma_uk_post_receive\n-0000000000002f30 T rdmacore50_0_irdma_uk_qp_init\n-0000000000000380 T rdmacore50_0_irdma_uk_qp_post_wr\n-0000000000000ca0 T rdmacore50_0_irdma_uk_rdma_read\n-0000000000000730 T rdmacore50_0_irdma_uk_rdma_write\n-00000000000011a0 T rdmacore50_0_irdma_uk_send\n-0000000000001f00 T rdmacore50_0_irdma_uk_stag_local_invalidate\n-\n-umain.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n-0000000000000000 r hca_table\n-0000000000000010 t irdma_device_alloc\n-0000000000000030 t irdma_ualloc_context\n-0000000000000000 d irdma_uctx_ops\n-0000000000000000 d irdma_udev_ops\n-0000000000000270 t irdma_ufree_context\n-0000000000000000 t irdma_uninit_device\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_irdma_cq_event\n- U rdmacore50_0_irdma_mmap\n- U rdmacore50_0_irdma_munmap\n- U rdmacore50_0_irdma_ualloc_mw\n- U rdmacore50_0_irdma_ualloc_pd\n- U rdmacore50_0_irdma_uarm_cq\n- U rdmacore50_0_irdma_uattach_mcast\n- U rdmacore50_0_irdma_ubind_mw\n- U rdmacore50_0_irdma_ucreate_ah\n- U rdmacore50_0_irdma_ucreate_cq\n- U rdmacore50_0_irdma_ucreate_cq_ex\n- U rdmacore50_0_irdma_ucreate_qp\n- U rdmacore50_0_irdma_udealloc_mw\n- U rdmacore50_0_irdma_udereg_mr\n- U rdmacore50_0_irdma_udestroy_ah\n- U rdmacore50_0_irdma_udestroy_cq\n- U rdmacore50_0_irdma_udestroy_qp\n- U rdmacore50_0_irdma_udetach_mcast\n- U rdmacore50_0_irdma_ufree_pd\n- U rdmacore50_0_irdma_umodify_qp\n- U rdmacore50_0_irdma_upoll_cq\n- U rdmacore50_0_irdma_upost_recv\n- U rdmacore50_0_irdma_upost_send\n- U rdmacore50_0_irdma_uquery_device_ex\n- U rdmacore50_0_irdma_uquery_port\n- U rdmacore50_0_irdma_uquery_qp\n- U rdmacore50_0_irdma_ureg_mr\n- U rdmacore50_0_irdma_ureg_mr_dmabuf\n- U rdmacore50_0_irdma_urereg_mr\n- U rdmacore50_0_irdma_uresize_cq\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_irdma\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 2180 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 31024 1970-01-01 00:00:00.000000 uverbs.c.o\n ?rw-r--r-- 0 0 0 22264 1970-01-01 00:00:00.000000 uk.c.o\n ?rw-r--r-- 0 0 0 8480 1970-01-01 00:00:00.000000 umain.c.o\n+?rw-r--r-- 0 0 0 31024 1970-01-01 00:00:00.000000 uverbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmana.a", "source2": "./usr/lib/x86_64-linux-gnu/libmana.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,107 +1,42 @@\n \n Archive index:\n manadv_set_context_attr in manadv.c.o\n manadv_init_obj in manadv.c.o\n-rdmacore50_0_mana_create_qp in qp.c.o\n-rdmacore50_0_mana_modify_qp in qp.c.o\n-rdmacore50_0_mana_destroy_qp in qp.c.o\n-rdmacore50_0_mana_create_qp_ex in qp.c.o\n-rdmacore50_0_mana_modify_wq in wq.c.o\n-rdmacore50_0_mana_create_wq in wq.c.o\n-rdmacore50_0_mana_destroy_wq in wq.c.o\n-rdmacore50_0_mana_create_rwq_ind_table in wq.c.o\n-rdmacore50_0_mana_destroy_rwq_ind_table in wq.c.o\n rdmacore50_0_mana_query_device_ex in mana.c.o\n rdmacore50_0_mana_query_port in mana.c.o\n rdmacore50_0_mana_alloc_parent_domain in mana.c.o\n rdmacore50_0_mana_alloc_pd in mana.c.o\n rdmacore50_0_mana_dealloc_pd in mana.c.o\n rdmacore50_0_mana_reg_mr in mana.c.o\n rdmacore50_0_mana_create_cq in mana.c.o\n rdmacore50_0_mana_destroy_cq in mana.c.o\n rdmacore50_0_mana_dereg_mr in mana.c.o\n rdmacore50_0_to_mctx in mana.c.o\n verbs_provider_mana in mana.c.o\n+rdmacore50_0_mana_create_qp in qp.c.o\n+rdmacore50_0_mana_modify_qp in qp.c.o\n+rdmacore50_0_mana_destroy_qp in qp.c.o\n+rdmacore50_0_mana_create_qp_ex in qp.c.o\n+rdmacore50_0_mana_modify_wq in wq.c.o\n+rdmacore50_0_mana_create_wq in wq.c.o\n+rdmacore50_0_mana_destroy_wq in wq.c.o\n+rdmacore50_0_mana_create_rwq_ind_table in wq.c.o\n+rdmacore50_0_mana_destroy_rwq_ind_table in wq.c.o\n \n manadv.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n 0000000000000000 r __func__.0\n 00000000000000b0 T manadv_init_obj\n 0000000000000000 T manadv_set_context_attr\n 0000000000000000 t manadv_set_context_attr.cold\n U rdmacore50_0___verbs_log\n U rdmacore50_0_to_mctx\n \n-qp.c.o:\n-0000000000000000 r .LC0\n-0000000000000038 r .LC1\n-000000000000001d r .LC10\n-0000000000000060 r .LC2\n-0000000000000080 r .LC4\n-00000000000000b8 r .LC5\n-0000000000000000 r .LC6\n-00000000000000f0 r .LC7\n-0000000000000118 r .LC9\n- U __errno_location\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n-0000000000000040 r __func__.2\n-0000000000000050 r __func__.3\n-0000000000000068 r __func__.4\n- U __stack_chk_fail\n- U calloc\n- U free\n-0000000000000014 t mana_create_qp.cold\n-0000000000000046 t mana_create_qp_ex.cold\n-0000000000000000 t mana_create_qp_ex_raw\n-0000000000000000 t mana_create_qp_ex_raw.cold\n-0000000000000032 t mana_destroy_qp.cold\n- U rdmacore50_0___verbs_log\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_qp_ex2\n- U rdmacore50_0_ibv_cmd_destroy_qp\n-0000000000000260 T rdmacore50_0_mana_create_qp\n-0000000000000700 T rdmacore50_0_mana_create_qp_ex\n-00000000000005e0 T rdmacore50_0_mana_destroy_qp\n-00000000000005d0 T rdmacore50_0_mana_modify_qp\n- U rdmacore50_0_to_mctx\n-\n-wq.c.o:\n-0000000000000000 r .LC0\n-0000000000000038 r .LC1\n-0000000000000058 r .LC3\n-0000000000000088 r .LC4\n-00000000000000b0 r .LC6\n-00000000000000e0 r .LC8\n- U __errno_location\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n-0000000000000040 r __func__.2\n-0000000000000050 r __func__.3\n- U __stack_chk_fail\n- U calloc\n- U free\n-0000000000000028 t mana_create_rwq_ind_table.cold\n-0000000000000000 t mana_create_wq.cold\n-0000000000000032 t mana_destroy_rwq_ind_table.cold\n-0000000000000014 t mana_destroy_wq.cold\n- U rdmacore50_0___verbs_log\n- U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_create_wq\n- U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_destroy_wq\n-00000000000003c0 T rdmacore50_0_mana_create_rwq_ind_table\n-0000000000000010 T rdmacore50_0_mana_create_wq\n-0000000000000570 T rdmacore50_0_mana_destroy_rwq_ind_table\n-0000000000000290 T rdmacore50_0_mana_destroy_wq\n-0000000000000000 T rdmacore50_0_mana_modify_wq\n- U rdmacore50_0_to_mctx\n-\n mana.c.o:\n 0000000000000000 r .LC0\n 0000000000000108 r .LC10\n 0000000000000148 r .LC11\n 0000000000000168 r .LC13\n 00000000000001a0 r .LC14\n 00000000000001c8 r .LC16\n@@ -177,7 +112,72 @@\n 0000000000000100 T rdmacore50_0_mana_query_port\n 00000000000003c0 T rdmacore50_0_mana_reg_mr\n 0000000000000a80 T rdmacore50_0_to_mctx\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n 0000000000000000 D verbs_provider_mana\n+\n+qp.c.o:\n+0000000000000000 r .LC0\n+0000000000000038 r .LC1\n+000000000000001d r .LC10\n+0000000000000060 r .LC2\n+0000000000000080 r .LC4\n+00000000000000b8 r .LC5\n+0000000000000000 r .LC6\n+00000000000000f0 r .LC7\n+0000000000000118 r .LC9\n+ U __errno_location\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+0000000000000040 r __func__.2\n+0000000000000050 r __func__.3\n+0000000000000068 r __func__.4\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+0000000000000014 t mana_create_qp.cold\n+0000000000000046 t mana_create_qp_ex.cold\n+0000000000000000 t mana_create_qp_ex_raw\n+0000000000000000 t mana_create_qp_ex_raw.cold\n+0000000000000032 t mana_destroy_qp.cold\n+ U rdmacore50_0___verbs_log\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_qp_ex2\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+0000000000000260 T rdmacore50_0_mana_create_qp\n+0000000000000700 T rdmacore50_0_mana_create_qp_ex\n+00000000000005e0 T rdmacore50_0_mana_destroy_qp\n+00000000000005d0 T rdmacore50_0_mana_modify_qp\n+ U rdmacore50_0_to_mctx\n+\n+wq.c.o:\n+0000000000000000 r .LC0\n+0000000000000038 r .LC1\n+0000000000000058 r .LC3\n+0000000000000088 r .LC4\n+00000000000000b0 r .LC6\n+00000000000000e0 r .LC8\n+ U __errno_location\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+0000000000000040 r __func__.2\n+0000000000000050 r __func__.3\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+0000000000000028 t mana_create_rwq_ind_table.cold\n+0000000000000000 t mana_create_wq.cold\n+0000000000000032 t mana_destroy_rwq_ind_table.cold\n+0000000000000014 t mana_destroy_wq.cold\n+ U rdmacore50_0___verbs_log\n+ U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_create_wq\n+ U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_destroy_wq\n+00000000000003c0 T rdmacore50_0_mana_create_rwq_ind_table\n+0000000000000010 T rdmacore50_0_mana_create_wq\n+0000000000000570 T rdmacore50_0_mana_destroy_rwq_ind_table\n+0000000000000290 T rdmacore50_0_mana_destroy_wq\n+0000000000000000 T rdmacore50_0_mana_modify_wq\n+ U rdmacore50_0_to_mctx\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 720 1970-01-01 00:00:00.000000 /\n ?rw-r--r-- 0 0 0 2664 1970-01-01 00:00:00.000000 manadv.c.o\n+?rw-r--r-- 0 0 0 14976 1970-01-01 00:00:00.000000 mana.c.o\n ?rw-r--r-- 0 0 0 7256 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 6424 1970-01-01 00:00:00.000000 wq.c.o\n-?rw-r--r-- 0 0 0 14976 1970-01-01 00:00:00.000000 mana.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmlx4.a", "source2": "./usr/lib/x86_64-linux-gnu/libmlx4.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,44 +1,11 @@\n \n Archive index:\n-rdmacore50_0_mlx4_poll_cq in cq.c.o\n-rdmacore50_0_mlx4_cq_fill_pfns in cq.c.o\n-rdmacore50_0_mlx4_arm_cq in cq.c.o\n-rdmacore50_0_mlx4_cq_event in cq.c.o\n-rdmacore50_0___mlx4_cq_clean in cq.c.o\n-rdmacore50_0_mlx4_cq_clean in cq.c.o\n-rdmacore50_0_mlx4_get_outstanding_cqes in cq.c.o\n-rdmacore50_0_mlx4_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mlx4_alloc_cq_buf in cq.c.o\n rdmacore50_0_mlx4_alloc_db in dbrec.c.o\n rdmacore50_0_mlx4_free_db in dbrec.c.o\n-rdmacore50_0_mlx4_init_qp_indices in qp.c.o\n-rdmacore50_0_mlx4_qp_init_sq_ownership in qp.c.o\n-rdmacore50_0_mlx4_post_send in qp.c.o\n-rdmacore50_0_mlx4_post_recv in qp.c.o\n-rdmacore50_0_mlx4_post_wq_recv in qp.c.o\n-rdmacore50_0_mlx4_calc_sq_wqe_size in qp.c.o\n-rdmacore50_0_mlx4_alloc_qp_buf in qp.c.o\n-rdmacore50_0_mlx4_set_sq_sizes in qp.c.o\n-rdmacore50_0_mlx4_find_qp in qp.c.o\n-rdmacore50_0_mlx4_store_qp in qp.c.o\n-rdmacore50_0_mlx4_clear_qp in qp.c.o\n-mlx4dv_init_obj in mlx4.c.o\n-mlx4dv_query_device in mlx4.c.o\n-mlx4dv_set_context_attr in mlx4.c.o\n-verbs_provider_mlx4 in mlx4.c.o\n-rdmacore50_0_mlx4_free_srq_wqe in srq.c.o\n-rdmacore50_0_mlx4_post_srq_recv in srq.c.o\n-rdmacore50_0_mlx4_alloc_srq_buf in srq.c.o\n-rdmacore50_0_mlx4_init_xsrq_table in srq.c.o\n-rdmacore50_0_mlx4_find_xsrq in srq.c.o\n-rdmacore50_0_mlx4_store_xsrq in srq.c.o\n-rdmacore50_0_mlx4_clear_xsrq in srq.c.o\n-rdmacore50_0_mlx4_create_xrc_srq in srq.c.o\n-rdmacore50_0_mlx4_destroy_xrc_srq in srq.c.o\n rdmacore50_0_mlx4_query_device_ex in verbs.c.o\n rdmacore50_0_mlx4_query_device_ctx in verbs.c.o\n rdmacore50_0_mlx4_query_rt_values in verbs.c.o\n rdmacore50_0_mlx4_query_port in verbs.c.o\n rdmacore50_0_mlx4_alloc_pd in verbs.c.o\n rdmacore50_0_mlx4_free_pd in verbs.c.o\n rdmacore50_0_mlx4_open_xrcd in verbs.c.o\n@@ -72,201 +39,62 @@\n rdmacore50_0_mlx4_modify_wq in verbs.c.o\n rdmacore50_0_mlx4_create_flow in verbs.c.o\n rdmacore50_0_mlx4_destroy_flow in verbs.c.o\n rdmacore50_0_mlx4_destroy_wq in verbs.c.o\n rdmacore50_0_mlx4_create_rwq_ind_table in verbs.c.o\n rdmacore50_0_mlx4_destroy_rwq_ind_table in verbs.c.o\n rdmacore50_0_mlx4_modify_cq in verbs.c.o\n+mlx4dv_init_obj in mlx4.c.o\n+mlx4dv_query_device in mlx4.c.o\n+mlx4dv_set_context_attr in mlx4.c.o\n+verbs_provider_mlx4 in mlx4.c.o\n rdmacore50_0_mlx4_alloc_buf in buf.c.o\n rdmacore50_0_mlx4_free_buf in buf.c.o\n-\n-cq.c.o:\n-0000000000000000 r .LC0\n-00000000000000c0 r CSWTCH.48\n-0000000000000080 r CSWTCH.55\n- U __printf_chk\n- U __stack_chk_fail\n- U memcpy\n- U memset\n-00000000000001b0 t mlx4_cq_read_wc_byte_len\n-0000000000000120 t mlx4_cq_read_wc_completion_ts\n-00000000000000b0 t mlx4_cq_read_wc_dlid_path_bits\n-00000000000001d0 t mlx4_cq_read_wc_flags\n-0000000000000190 t mlx4_cq_read_wc_imm_data\n-0000000000000000 t mlx4_cq_read_wc_opcode\n-0000000000000170 t mlx4_cq_read_wc_qp_num\n-0000000000000070 t mlx4_cq_read_wc_sl\n-00000000000000d0 t mlx4_cq_read_wc_slid\n-0000000000000150 t mlx4_cq_read_wc_src_qp\n-0000000000000060 t mlx4_cq_read_wc_vendor_err\n-0000000000000600 t mlx4_end_poll\n-00000000000000f0 t mlx4_end_poll_lock\n-0000000000000620 t mlx4_next_poll\n-0000000000000960 t mlx4_start_poll\n-0000000000000260 t mlx4_start_poll_lock\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000001410 T rdmacore50_0___mlx4_cq_clean\n- U rdmacore50_0_mlx4_alloc_buf\n-0000000000001920 T rdmacore50_0_mlx4_alloc_cq_buf\n-0000000000001390 T rdmacore50_0_mlx4_arm_cq\n-0000000000001710 T rdmacore50_0_mlx4_cq_clean\n-0000000000001400 T rdmacore50_0_mlx4_cq_event\n-0000000000001280 T rdmacore50_0_mlx4_cq_fill_pfns\n-0000000000001830 T rdmacore50_0_mlx4_cq_resize_copy_cqes\n- U rdmacore50_0_mlx4_find_qp\n- U rdmacore50_0_mlx4_find_xsrq\n- U rdmacore50_0_mlx4_free_srq_wqe\n-0000000000001760 T rdmacore50_0_mlx4_get_outstanding_cqes\n-0000000000000cc0 T rdmacore50_0_mlx4_poll_cq\n+rdmacore50_0_mlx4_init_qp_indices in qp.c.o\n+rdmacore50_0_mlx4_qp_init_sq_ownership in qp.c.o\n+rdmacore50_0_mlx4_post_send in qp.c.o\n+rdmacore50_0_mlx4_post_recv in qp.c.o\n+rdmacore50_0_mlx4_post_wq_recv in qp.c.o\n+rdmacore50_0_mlx4_calc_sq_wqe_size in qp.c.o\n+rdmacore50_0_mlx4_alloc_qp_buf in qp.c.o\n+rdmacore50_0_mlx4_set_sq_sizes in qp.c.o\n+rdmacore50_0_mlx4_find_qp in qp.c.o\n+rdmacore50_0_mlx4_store_qp in qp.c.o\n+rdmacore50_0_mlx4_clear_qp in qp.c.o\n+rdmacore50_0_mlx4_free_srq_wqe in srq.c.o\n+rdmacore50_0_mlx4_post_srq_recv in srq.c.o\n+rdmacore50_0_mlx4_alloc_srq_buf in srq.c.o\n+rdmacore50_0_mlx4_init_xsrq_table in srq.c.o\n+rdmacore50_0_mlx4_find_xsrq in srq.c.o\n+rdmacore50_0_mlx4_store_xsrq in srq.c.o\n+rdmacore50_0_mlx4_clear_xsrq in srq.c.o\n+rdmacore50_0_mlx4_create_xrc_srq in srq.c.o\n+rdmacore50_0_mlx4_destroy_xrc_srq in srq.c.o\n+rdmacore50_0_mlx4_poll_cq in cq.c.o\n+rdmacore50_0_mlx4_cq_fill_pfns in cq.c.o\n+rdmacore50_0_mlx4_arm_cq in cq.c.o\n+rdmacore50_0_mlx4_cq_event in cq.c.o\n+rdmacore50_0___mlx4_cq_clean in cq.c.o\n+rdmacore50_0_mlx4_cq_clean in cq.c.o\n+rdmacore50_0_mlx4_get_outstanding_cqes in cq.c.o\n+rdmacore50_0_mlx4_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mlx4_alloc_cq_buf in cq.c.o\n \n dbrec.c.o:\n 0000000000000000 r db_size\n U free\n U malloc\n U memset\n U pthread_mutex_lock\n U pthread_mutex_unlock\n U rdmacore50_0_mlx4_alloc_buf\n 0000000000000000 T rdmacore50_0_mlx4_alloc_db\n U rdmacore50_0_mlx4_free_buf\n 00000000000001c0 T rdmacore50_0_mlx4_free_db\n \n-qp.c.o:\n-0000000000000000 r .LC0\n- U calloc\n- U free\n- U malloc\n- U memcpy\n- U memset\n-0000000000000040 r mlx4_ib_opcode\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_mlx4_alloc_buf\n-00000000000013c0 T rdmacore50_0_mlx4_alloc_qp_buf\n-0000000000001290 T rdmacore50_0_mlx4_calc_sq_wqe_size\n-0000000000001720 T rdmacore50_0_mlx4_clear_qp\n-0000000000001640 T rdmacore50_0_mlx4_find_qp\n-0000000000000000 T rdmacore50_0_mlx4_init_qp_indices\n-0000000000000eb0 T rdmacore50_0_mlx4_post_recv\n-0000000000000210 T rdmacore50_0_mlx4_post_send\n-00000000000010a0 T rdmacore50_0_mlx4_post_wq_recv\n-0000000000000020 T rdmacore50_0_mlx4_qp_init_sq_ownership\n-00000000000015c0 T rdmacore50_0_mlx4_set_sq_sizes\n-0000000000001690 T rdmacore50_0_mlx4_store_qp\n-\n-mlx4.c.o:\n-0000000000000000 r .LC0\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n- U fwrite\n-0000000000000060 d hca_table\n-00000000000000e0 t mlx4_alloc_context\n-0000000000000000 d mlx4_ctx_ops\n-0000000000000000 d mlx4_dev_ops\n-0000000000000010 t mlx4_device_alloc\n-0000000000000060 t mlx4_free_context\n-0000000000000000 t mlx4_uninit_device\n-00000000000003a0 T mlx4dv_init_obj\n-0000000000000560 T mlx4dv_query_device\n-0000000000000580 T mlx4dv_set_context_attr\n- U mmap\n- U munmap\n- U pthread_mutex_init\n- U pthread_spin_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_mlx4_alloc_mw\n- U rdmacore50_0_mlx4_alloc_pd\n- U rdmacore50_0_mlx4_arm_cq\n- U rdmacore50_0_mlx4_bind_mw\n- U rdmacore50_0_mlx4_close_xrcd\n- U rdmacore50_0_mlx4_cq_event\n- U rdmacore50_0_mlx4_create_ah\n- U rdmacore50_0_mlx4_create_cq\n- U rdmacore50_0_mlx4_create_cq_ex\n- U rdmacore50_0_mlx4_create_flow\n- U rdmacore50_0_mlx4_create_qp\n- U rdmacore50_0_mlx4_create_qp_ex\n- U rdmacore50_0_mlx4_create_rwq_ind_table\n- U rdmacore50_0_mlx4_create_srq\n- U rdmacore50_0_mlx4_create_srq_ex\n- U rdmacore50_0_mlx4_create_wq\n- U rdmacore50_0_mlx4_dealloc_mw\n- U rdmacore50_0_mlx4_dereg_mr\n- U rdmacore50_0_mlx4_destroy_ah\n- U rdmacore50_0_mlx4_destroy_cq\n- U rdmacore50_0_mlx4_destroy_flow\n- U rdmacore50_0_mlx4_destroy_qp\n- U rdmacore50_0_mlx4_destroy_rwq_ind_table\n- U rdmacore50_0_mlx4_destroy_srq\n- U rdmacore50_0_mlx4_destroy_wq\n- U rdmacore50_0_mlx4_free_pd\n- U rdmacore50_0_mlx4_get_srq_num\n- U rdmacore50_0_mlx4_init_xsrq_table\n- U rdmacore50_0_mlx4_modify_cq\n- U rdmacore50_0_mlx4_modify_qp\n- U rdmacore50_0_mlx4_modify_srq\n- U rdmacore50_0_mlx4_modify_wq\n- U rdmacore50_0_mlx4_open_qp\n- U rdmacore50_0_mlx4_open_xrcd\n- U rdmacore50_0_mlx4_poll_cq\n- U rdmacore50_0_mlx4_post_recv\n- U rdmacore50_0_mlx4_post_send\n- U rdmacore50_0_mlx4_post_srq_recv\n- U rdmacore50_0_mlx4_query_device_ctx\n- U rdmacore50_0_mlx4_query_device_ex\n- U rdmacore50_0_mlx4_query_port\n- U rdmacore50_0_mlx4_query_qp\n- U rdmacore50_0_mlx4_query_rt_values\n- U rdmacore50_0_mlx4_query_srq\n- U rdmacore50_0_mlx4_reg_mr\n- U rdmacore50_0_mlx4_rereg_mr\n- U rdmacore50_0_mlx4_resize_cq\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n- U stderr\n- U sysconf\n-0000000000000000 D verbs_provider_mlx4\n-\n-srq.c.o:\n-0000000000000000 r .LC0\n- U __stack_chk_fail\n- U calloc\n- U free\n- U malloc\n- U memset\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_ibv_cmd_create_srq_ex\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_mlx4_alloc_buf\n- U rdmacore50_0_mlx4_alloc_db\n-00000000000001d0 T rdmacore50_0_mlx4_alloc_srq_buf\n-00000000000004e0 T rdmacore50_0_mlx4_clear_xsrq\n- U rdmacore50_0_mlx4_cq_clean\n-0000000000000560 T rdmacore50_0_mlx4_create_xrc_srq\n-00000000000007d0 T rdmacore50_0_mlx4_destroy_xrc_srq\n-00000000000003f0 T rdmacore50_0_mlx4_find_xsrq\n- U rdmacore50_0_mlx4_free_buf\n- U rdmacore50_0_mlx4_free_db\n-0000000000000000 T rdmacore50_0_mlx4_free_srq_wqe\n-0000000000000380 T rdmacore50_0_mlx4_init_xsrq_table\n-0000000000000050 T rdmacore50_0_mlx4_post_srq_recv\n-0000000000000430 T rdmacore50_0_mlx4_store_xsrq\n-\n verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n U _GLOBAL_OFFSET_TABLE_\n U __errno_location\n U __snprintf_chk\n U __stack_chk_fail\n@@ -378,15 +206,187 @@\n 0000000000000bf0 T rdmacore50_0_mlx4_reg_mr\n 0000000000000cb0 T rdmacore50_0_mlx4_rereg_mr\n 0000000000001370 T rdmacore50_0_mlx4_resize_cq\n U rdmacore50_0_mlx4_set_sq_sizes\n U rdmacore50_0_mlx4_store_qp\n U stderr\n \n+mlx4.c.o:\n+0000000000000000 r .LC0\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+ U fwrite\n+0000000000000060 d hca_table\n+00000000000000e0 t mlx4_alloc_context\n+0000000000000000 d mlx4_ctx_ops\n+0000000000000000 d mlx4_dev_ops\n+0000000000000010 t mlx4_device_alloc\n+0000000000000060 t mlx4_free_context\n+0000000000000000 t mlx4_uninit_device\n+00000000000003a0 T mlx4dv_init_obj\n+0000000000000560 T mlx4dv_query_device\n+0000000000000580 T mlx4dv_set_context_attr\n+ U mmap\n+ U munmap\n+ U pthread_mutex_init\n+ U pthread_spin_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_mlx4_alloc_mw\n+ U rdmacore50_0_mlx4_alloc_pd\n+ U rdmacore50_0_mlx4_arm_cq\n+ U rdmacore50_0_mlx4_bind_mw\n+ U rdmacore50_0_mlx4_close_xrcd\n+ U rdmacore50_0_mlx4_cq_event\n+ U rdmacore50_0_mlx4_create_ah\n+ U rdmacore50_0_mlx4_create_cq\n+ U rdmacore50_0_mlx4_create_cq_ex\n+ U rdmacore50_0_mlx4_create_flow\n+ U rdmacore50_0_mlx4_create_qp\n+ U rdmacore50_0_mlx4_create_qp_ex\n+ U rdmacore50_0_mlx4_create_rwq_ind_table\n+ U rdmacore50_0_mlx4_create_srq\n+ U rdmacore50_0_mlx4_create_srq_ex\n+ U rdmacore50_0_mlx4_create_wq\n+ U rdmacore50_0_mlx4_dealloc_mw\n+ U rdmacore50_0_mlx4_dereg_mr\n+ U rdmacore50_0_mlx4_destroy_ah\n+ U rdmacore50_0_mlx4_destroy_cq\n+ U rdmacore50_0_mlx4_destroy_flow\n+ U rdmacore50_0_mlx4_destroy_qp\n+ U rdmacore50_0_mlx4_destroy_rwq_ind_table\n+ U rdmacore50_0_mlx4_destroy_srq\n+ U rdmacore50_0_mlx4_destroy_wq\n+ U rdmacore50_0_mlx4_free_pd\n+ U rdmacore50_0_mlx4_get_srq_num\n+ U rdmacore50_0_mlx4_init_xsrq_table\n+ U rdmacore50_0_mlx4_modify_cq\n+ U rdmacore50_0_mlx4_modify_qp\n+ U rdmacore50_0_mlx4_modify_srq\n+ U rdmacore50_0_mlx4_modify_wq\n+ U rdmacore50_0_mlx4_open_qp\n+ U rdmacore50_0_mlx4_open_xrcd\n+ U rdmacore50_0_mlx4_poll_cq\n+ U rdmacore50_0_mlx4_post_recv\n+ U rdmacore50_0_mlx4_post_send\n+ U rdmacore50_0_mlx4_post_srq_recv\n+ U rdmacore50_0_mlx4_query_device_ctx\n+ U rdmacore50_0_mlx4_query_device_ex\n+ U rdmacore50_0_mlx4_query_port\n+ U rdmacore50_0_mlx4_query_qp\n+ U rdmacore50_0_mlx4_query_rt_values\n+ U rdmacore50_0_mlx4_query_srq\n+ U rdmacore50_0_mlx4_reg_mr\n+ U rdmacore50_0_mlx4_rereg_mr\n+ U rdmacore50_0_mlx4_resize_cq\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+ U stderr\n+ U sysconf\n+0000000000000000 D verbs_provider_mlx4\n+\n buf.c.o:\n U __errno_location\n U ibv_dofork_range\n U ibv_dontfork_range\n U mmap\n U munmap\n 0000000000000000 T rdmacore50_0_mlx4_alloc_buf\n 0000000000000120 T rdmacore50_0_mlx4_free_buf\n+\n+qp.c.o:\n+0000000000000000 r .LC0\n+ U calloc\n+ U free\n+ U malloc\n+ U memcpy\n+ U memset\n+0000000000000040 r mlx4_ib_opcode\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_mlx4_alloc_buf\n+00000000000013c0 T rdmacore50_0_mlx4_alloc_qp_buf\n+0000000000001290 T rdmacore50_0_mlx4_calc_sq_wqe_size\n+0000000000001720 T rdmacore50_0_mlx4_clear_qp\n+0000000000001640 T rdmacore50_0_mlx4_find_qp\n+0000000000000000 T rdmacore50_0_mlx4_init_qp_indices\n+0000000000000eb0 T rdmacore50_0_mlx4_post_recv\n+0000000000000210 T rdmacore50_0_mlx4_post_send\n+00000000000010a0 T rdmacore50_0_mlx4_post_wq_recv\n+0000000000000020 T rdmacore50_0_mlx4_qp_init_sq_ownership\n+00000000000015c0 T rdmacore50_0_mlx4_set_sq_sizes\n+0000000000001690 T rdmacore50_0_mlx4_store_qp\n+\n+srq.c.o:\n+0000000000000000 r .LC0\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U malloc\n+ U memset\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_ibv_cmd_create_srq_ex\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_mlx4_alloc_buf\n+ U rdmacore50_0_mlx4_alloc_db\n+00000000000001d0 T rdmacore50_0_mlx4_alloc_srq_buf\n+00000000000004e0 T rdmacore50_0_mlx4_clear_xsrq\n+ U rdmacore50_0_mlx4_cq_clean\n+0000000000000560 T rdmacore50_0_mlx4_create_xrc_srq\n+00000000000007d0 T rdmacore50_0_mlx4_destroy_xrc_srq\n+00000000000003f0 T rdmacore50_0_mlx4_find_xsrq\n+ U rdmacore50_0_mlx4_free_buf\n+ U rdmacore50_0_mlx4_free_db\n+0000000000000000 T rdmacore50_0_mlx4_free_srq_wqe\n+0000000000000380 T rdmacore50_0_mlx4_init_xsrq_table\n+0000000000000050 T rdmacore50_0_mlx4_post_srq_recv\n+0000000000000430 T rdmacore50_0_mlx4_store_xsrq\n+\n+cq.c.o:\n+0000000000000000 r .LC0\n+00000000000000c0 r CSWTCH.48\n+0000000000000080 r CSWTCH.55\n+ U __printf_chk\n+ U __stack_chk_fail\n+ U memcpy\n+ U memset\n+00000000000001b0 t mlx4_cq_read_wc_byte_len\n+0000000000000120 t mlx4_cq_read_wc_completion_ts\n+00000000000000b0 t mlx4_cq_read_wc_dlid_path_bits\n+00000000000001d0 t mlx4_cq_read_wc_flags\n+0000000000000190 t mlx4_cq_read_wc_imm_data\n+0000000000000000 t mlx4_cq_read_wc_opcode\n+0000000000000170 t mlx4_cq_read_wc_qp_num\n+0000000000000070 t mlx4_cq_read_wc_sl\n+00000000000000d0 t mlx4_cq_read_wc_slid\n+0000000000000150 t mlx4_cq_read_wc_src_qp\n+0000000000000060 t mlx4_cq_read_wc_vendor_err\n+0000000000000600 t mlx4_end_poll\n+00000000000000f0 t mlx4_end_poll_lock\n+0000000000000620 t mlx4_next_poll\n+0000000000000960 t mlx4_start_poll\n+0000000000000260 t mlx4_start_poll_lock\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+0000000000001410 T rdmacore50_0___mlx4_cq_clean\n+ U rdmacore50_0_mlx4_alloc_buf\n+0000000000001920 T rdmacore50_0_mlx4_alloc_cq_buf\n+0000000000001390 T rdmacore50_0_mlx4_arm_cq\n+0000000000001710 T rdmacore50_0_mlx4_cq_clean\n+0000000000001400 T rdmacore50_0_mlx4_cq_event\n+0000000000001280 T rdmacore50_0_mlx4_cq_fill_pfns\n+0000000000001830 T rdmacore50_0_mlx4_cq_resize_copy_cqes\n+ U rdmacore50_0_mlx4_find_qp\n+ U rdmacore50_0_mlx4_find_xsrq\n+ U rdmacore50_0_mlx4_free_srq_wqe\n+0000000000001760 T rdmacore50_0_mlx4_get_outstanding_cqes\n+0000000000000cc0 T rdmacore50_0_mlx4_poll_cq\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,8 +1,8 @@\n ---------- 0 0 0 2590 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 13272 1970-01-01 00:00:00.000000 cq.c.o\n ?rw-r--r-- 0 0 0 2736 1970-01-01 00:00:00.000000 dbrec.c.o\n-?rw-r--r-- 0 0 0 10096 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r-- 0 0 0 11232 1970-01-01 00:00:00.000000 mlx4.c.o\n-?rw-r--r-- 0 0 0 6776 1970-01-01 00:00:00.000000 srq.c.o\n ?rw-r--r-- 0 0 0 27560 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 11232 1970-01-01 00:00:00.000000 mlx4.c.o\n ?rw-r--r-- 0 0 0 2160 1970-01-01 00:00:00.000000 buf.c.o\n+?rw-r--r-- 0 0 0 10096 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 6776 1970-01-01 00:00:00.000000 srq.c.o\n+?rw-r--r-- 0 0 0 13272 1970-01-01 00:00:00.000000 cq.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmlx5.a", "source2": "./usr/lib/x86_64-linux-gnu/libmlx5.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,25 +1,204 @@\n \n Archive index:\n rdmacore50_0_dr_ste_get_ctx_v0 in dr_ste_v0.c.o\n-rdmacore50_0_mlx5_stall_cq_poll_min in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_dec_step in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_poll_max in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_inc_step in cq.c.o\n-rdmacore50_0_mlx5_stall_num_loop in cq.c.o\n-rdmacore50_0_mlx5_poll_cq in cq.c.o\n-rdmacore50_0_mlx5_poll_cq_v1 in cq.c.o\n-rdmacore50_0_mlx5_cq_fill_pfns in cq.c.o\n-rdmacore50_0_mlx5_arm_cq in cq.c.o\n-rdmacore50_0_mlx5_cq_event in cq.c.o\n-rdmacore50_0___mlx5_cq_clean in cq.c.o\n-rdmacore50_0_mlx5_cq_clean in cq.c.o\n-rdmacore50_0_mlx5_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mlx5_alloc_cq_buf in cq.c.o\n-rdmacore50_0_mlx5_free_cq_buf in cq.c.o\n+rdmacore50_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n+rdmacore50_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n+mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n+mlx5dv_dr_matcher_create in dr_matcher.c.o\n+mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n+rdmacore50_0_mlx5_alloc_dbrec in dbrec.c.o\n+rdmacore50_0_mlx5_free_db in dbrec.c.o\n+rdmacore50_0_mlx5_single_threaded in verbs.c.o\n+rdmacore50_0__mlx5dv_create_flow in verbs.c.o\n+rdmacore50_0_mlx5_query_rt_values in verbs.c.o\n+rdmacore50_0_mlx5_query_port in verbs.c.o\n+rdmacore50_0_mlx5_async_event in verbs.c.o\n+rdmacore50_0_mlx5_alloc_pd in verbs.c.o\n+rdmacore50_0_mlx5_alloc_td in verbs.c.o\n+rdmacore50_0_mlx5_dealloc_td in verbs.c.o\n+rdmacore50_0_mlx5_set_singleton_nc_uar in verbs.c.o\n+rdmacore50_0_mlx5_alloc_parent_domain in verbs.c.o\n+rdmacore50_0_mlx5_free_pd in verbs.c.o\n+rdmacore50_0_mlx5_reg_mr in verbs.c.o\n+rdmacore50_0_mlx5_reg_dmabuf_mr in verbs.c.o\n+rdmacore50_0_mlx5_alloc_null_mr in verbs.c.o\n+rdmacore50_0_mlx5_reg_dm_mr in verbs.c.o\n+rdmacore50_0_mlx5_rereg_mr in verbs.c.o\n+rdmacore50_0_mlx5_dereg_mr in verbs.c.o\n+rdmacore50_0_mlx5_advise_mr in verbs.c.o\n+rdmacore50_0_mlx5_import_pd in verbs.c.o\n+rdmacore50_0_mlx5_unimport_pd in verbs.c.o\n+rdmacore50_0_mlx5_import_mr in verbs.c.o\n+rdmacore50_0_mlx5_unimport_mr in verbs.c.o\n+rdmacore50_0_mlx5_alloc_mw in verbs.c.o\n+rdmacore50_0_mlx5_dealloc_mw in verbs.c.o\n+rdmacore50_0_mlx5_create_cq in verbs.c.o\n+rdmacore50_0_mlx5_create_cq_ex in verbs.c.o\n+mlx5dv_create_cq in verbs.c.o\n+rdmacore50_0_mlx5_resize_cq in verbs.c.o\n+rdmacore50_0_mlx5_destroy_cq in verbs.c.o\n+rdmacore50_0_mlx5_create_srq in verbs.c.o\n+rdmacore50_0_mlx5_modify_srq in verbs.c.o\n+rdmacore50_0_mlx5_query_srq in verbs.c.o\n+rdmacore50_0_mlx5_set_ece in verbs.c.o\n+rdmacore50_0_mlx5_query_ece in verbs.c.o\n+rdmacore50_0_mlx5_create_qp in verbs.c.o\n+rdmacore50_0_mlx5_destroy_qp in verbs.c.o\n+rdmacore50_0_mlx5_destroy_srq in verbs.c.o\n+rdmacore50_0_mlx5_query_qp_data_in_order in verbs.c.o\n+rdmacore50_0_mlx5_query_qp in verbs.c.o\n+rdmacore50_0_mlx5_modify_qp_rate_limit in verbs.c.o\n+rdmacore50_0_mlx5_create_ah in verbs.c.o\n+rdmacore50_0_mlx5_destroy_ah in verbs.c.o\n+mlx5dv_map_ah_to_qp in verbs.c.o\n+rdmacore50_0_mlx5_attach_mcast in verbs.c.o\n+rdmacore50_0_mlx5_detach_mcast in verbs.c.o\n+rdmacore50_0_mlx5_create_qp_ex in verbs.c.o\n+mlx5dv_create_qp in verbs.c.o\n+mlx5dv_qp_ex_from_ibv_qp_ex in verbs.c.o\n+rdmacore50_0_mlx5_get_srq_num in verbs.c.o\n+rdmacore50_0_mlx5_open_qp in verbs.c.o\n+rdmacore50_0_mlx5_open_xrcd in verbs.c.o\n+rdmacore50_0_mlx5_close_xrcd in verbs.c.o\n+rdmacore50_0_mlx5_create_srq_ex in verbs.c.o\n+rdmacore50_0_mlx5_query_device_ex in verbs.c.o\n+rdmacore50_0_mlx5_query_device_ctx in verbs.c.o\n+rdmacore50_0_mlx5_create_wq in verbs.c.o\n+mlx5dv_create_wq in verbs.c.o\n+rdmacore50_0_mlx5_modify_wq in verbs.c.o\n+rdmacore50_0_mlx5_destroy_wq in verbs.c.o\n+rdmacore50_0_mlx5_create_flow in verbs.c.o\n+rdmacore50_0_mlx5_destroy_flow in verbs.c.o\n+rdmacore50_0_mlx5_create_rwq_ind_table in verbs.c.o\n+rdmacore50_0_mlx5_destroy_rwq_ind_table in verbs.c.o\n+rdmacore50_0_mlx5_modify_cq in verbs.c.o\n+rdmacore50_0_mlx5_create_flow_action_esp in verbs.c.o\n+mlx5dv_create_flow_action_esp in verbs.c.o\n+rdmacore50_0_mlx5_modify_flow_action_esp in verbs.c.o\n+mlx5dv_create_flow_action_modify_header in verbs.c.o\n+mlx5dv_create_flow_action_packet_reformat in verbs.c.o\n+rdmacore50_0_mlx5_destroy_flow_action in verbs.c.o\n+mlx5dv_dm_map_op_addr in verbs.c.o\n+rdmacore50_0_mlx5_unimport_dm in verbs.c.o\n+rdmacore50_0_mlx5_import_dm in verbs.c.o\n+mlx5dv_alloc_dm in verbs.c.o\n+rdmacore50_0_mlx5_free_dm in verbs.c.o\n+rdmacore50_0_mlx5_alloc_dm in verbs.c.o\n+rdmacore50_0_mlx5_create_counters in verbs.c.o\n+rdmacore50_0_mlx5_destroy_counters in verbs.c.o\n+rdmacore50_0_mlx5_attach_counters_point_flow in verbs.c.o\n+rdmacore50_0_mlx5_read_counters in verbs.c.o\n+mlx5dv_create_flow_matcher in verbs.c.o\n+mlx5dv_destroy_flow_matcher in verbs.c.o\n+mlx5dv_create_flow in verbs.c.o\n+mlx5dv_create_steering_anchor in verbs.c.o\n+mlx5dv_destroy_steering_anchor in verbs.c.o\n+mlx5dv_devx_umem_reg_ex in verbs.c.o\n+mlx5dv_devx_umem_reg in verbs.c.o\n+mlx5dv_devx_umem_dereg in verbs.c.o\n+mlx5dv_devx_obj_create in verbs.c.o\n+mlx5dv_devx_obj_query in verbs.c.o\n+mlx5dv_devx_obj_modify in verbs.c.o\n+mlx5dv_devx_obj_destroy in verbs.c.o\n+mlx5dv_devx_general_cmd in verbs.c.o\n+_mlx5dv_query_port in verbs.c.o\n+rdmacore50_0_clean_dyn_uars in verbs.c.o\n+mlx5dv_devx_alloc_uar in verbs.c.o\n+mlx5dv_devx_free_uar in verbs.c.o\n+mlx5dv_devx_query_eqn in verbs.c.o\n+mlx5dv_devx_cq_query in verbs.c.o\n+mlx5dv_devx_cq_modify in verbs.c.o\n+mlx5dv_devx_qp_query in verbs.c.o\n+mlx5dv_devx_qp_modify in verbs.c.o\n+rdmacore50_0_mlx5_modify_qp in verbs.c.o\n+mlx5dv_devx_srq_query in verbs.c.o\n+mlx5dv_devx_srq_modify in verbs.c.o\n+mlx5dv_devx_wq_query in verbs.c.o\n+mlx5dv_devx_wq_modify in verbs.c.o\n+mlx5dv_devx_ind_tbl_query in verbs.c.o\n+mlx5dv_devx_ind_tbl_modify in verbs.c.o\n+mlx5dv_devx_create_cmd_comp in verbs.c.o\n+mlx5dv_devx_destroy_cmd_comp in verbs.c.o\n+mlx5dv_devx_create_event_channel in verbs.c.o\n+mlx5dv_devx_destroy_event_channel in verbs.c.o\n+mlx5dv_devx_subscribe_devx_event in verbs.c.o\n+mlx5dv_devx_subscribe_devx_event_fd in verbs.c.o\n+mlx5dv_devx_obj_query_async in verbs.c.o\n+mlx5dv_devx_get_async_cmd_comp in verbs.c.o\n+mlx5dv_devx_get_event in verbs.c.o\n+mlx5dv_create_mkey in verbs.c.o\n+mlx5dv_destroy_mkey in verbs.c.o\n+_mlx5dv_mkey_check in verbs.c.o\n+mlx5dv_crypto_login in verbs.c.o\n+mlx5dv_crypto_login_query_state in verbs.c.o\n+mlx5dv_crypto_logout in verbs.c.o\n+mlx5dv_crypto_login_create in verbs.c.o\n+mlx5dv_crypto_login_query in verbs.c.o\n+mlx5dv_crypto_login_destroy in verbs.c.o\n+mlx5dv_dek_create in verbs.c.o\n+mlx5dv_dek_query in verbs.c.o\n+mlx5dv_dek_destroy in verbs.c.o\n+mlx5dv_alloc_var in verbs.c.o\n+mlx5dv_free_var in verbs.c.o\n+mlx5dv_pp_alloc in verbs.c.o\n+mlx5dv_pp_free in verbs.c.o\n+mlx5dv_devx_alloc_msi_vector in verbs.c.o\n+mlx5dv_devx_free_msi_vector in verbs.c.o\n+mlx5dv_devx_create_eq in verbs.c.o\n+mlx5dv_devx_destroy_eq in verbs.c.o\n+rdmacore50_0_mlx5_set_dv_ctx_ops in verbs.c.o\n+rdmacore50_0_dr_rule_send_update_list in dr_rule.c.o\n+rdmacore50_0_dr_rule_rehash_matcher_s_anchor in dr_rule.c.o\n+rdmacore50_0_dr_rule_set_last_member in dr_rule.c.o\n+rdmacore50_0_dr_rule_get_reverse_rule_members in dr_rule.c.o\n+mlx5dv_dr_rule_create in dr_rule.c.o\n+mlx5dv_dr_rule_destroy in dr_rule.c.o\n+mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n+mlx5dv_vfio_process_events in mlx5_vfio.c.o\n+mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n+rdmacore50_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n+rdmacore50_0_dr_crc32_init_table in dr_crc32.c.o\n+rdmacore50_0_dr_crc32_slice8_calc in dr_crc32.c.o\n+rdmacore50_0_mlx5_free_buf_extern in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf_extern in buf.c.o\n+rdmacore50_0_mlx5_free_actual_buf in buf.c.o\n+rdmacore50_0_mlx5_is_custom_alloc in buf.c.o\n+rdmacore50_0_mlx5_is_extern_alloc in buf.c.o\n+rdmacore50_0_mlx5_get_alloc_type in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf_contig in buf.c.o\n+rdmacore50_0_mlx5_alloc_prefered_buf in buf.c.o\n+rdmacore50_0_mlx5_free_buf_contig in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf in buf.c.o\n+rdmacore50_0_mlx5_free_buf in buf.c.o\n+rdmacore50_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n+mlx5dv_dump_dr_domain in dr_dbg.c.o\n+mlx5dv_dump_dr_table in dr_dbg.c.o\n+mlx5dv_dump_dr_matcher in dr_dbg.c.o\n+mlx5dv_dump_dr_rule in dr_dbg.c.o\n+rdmacore50_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n+rdmacore50_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n+rdmacore50_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n+rdmacore50_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n+mlx5dv_dr_domain_create in dr_domain.c.o\n+mlx5dv_dr_domain_sync in dr_domain.c.o\n+mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n+mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n+mlx5dv_dr_domain_destroy in dr_domain.c.o\n+rdmacore50_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_ste in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_htbl in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_formated_htbl in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_action in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_pattern in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_args in dr_send.c.o\n+rdmacore50_0_dr_send_allow_fl in dr_send.c.o\n+rdmacore50_0_dr_send_ring_free in dr_send.c.o\n+rdmacore50_0_dr_send_ring_alloc in dr_send.c.o\n+rdmacore50_0_dr_send_ring_force_drain in dr_send.c.o\n rdmacore50_0_dr_actions_build_ste_arr in dr_action.c.o\n rdmacore50_0_dr_actions_build_attr in dr_action.c.o\n mlx5dv_dr_action_create_drop in dr_action.c.o\n mlx5dv_dr_action_create_default_miss in dr_action.c.o\n mlx5dv_dr_action_create_dest_ibv_qp in dr_action.c.o\n mlx5dv_dr_action_create_dest_devx_tir in dr_action.c.o\n mlx5dv_dr_action_create_dest_table in dr_action.c.o\n@@ -36,24 +215,47 @@\n mlx5dv_dr_action_modify_flow_meter in dr_action.c.o\n mlx5dv_dr_action_create_flow_meter in dr_action.c.o\n mlx5dv_dr_action_create_dest_vport in dr_action.c.o\n mlx5dv_dr_action_create_dest_ib_port in dr_action.c.o\n mlx5dv_dr_action_create_dest_array in dr_action.c.o\n mlx5dv_dr_action_destroy in dr_action.c.o\n mlx5dv_dr_action_create_flow_sampler in dr_action.c.o\n-rdmacore50_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n-rdmacore50_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n-rdmacore50_0_dr_buddy_init in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_cleanup in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_alloc_mem in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_free_mem in dr_buddy.c.o\n-mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n-mlx5dv_vfio_process_events in mlx5_vfio.c.o\n-mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n-rdmacore50_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n+rdmacore50_0_mlx5_copy_to_recv_wqe in qp.c.o\n+rdmacore50_0_mlx5_copy_to_send_wqe in qp.c.o\n+rdmacore50_0_mlx5_get_send_wqe in qp.c.o\n+rdmacore50_0_mlx5_init_rwq_indices in qp.c.o\n+rdmacore50_0_mlx5_init_qp_indices in qp.c.o\n+rdmacore50_0_mlx5_get_atomic_laddr in qp.c.o\n+rdmacore50_0_mlx5_post_send in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_pfns in qp.c.o\n+rdmacore50_0_mlx5_bind_mw in qp.c.o\n+rdmacore50_0_mlx5_post_wq_recv in qp.c.o\n+rdmacore50_0_mlx5_post_recv in qp.c.o\n+rdmacore50_0_mlx5_post_srq_ops in qp.c.o\n+rdmacore50_0_mlx5_use_huge in qp.c.o\n+rdmacore50_0_mlx5_find_qp in qp.c.o\n+rdmacore50_0_mlx5_store_qp in qp.c.o\n+rdmacore50_0_mlx5_clear_qp in qp.c.o\n+mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n+rdmacore50_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n+rdmacore50_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_free_chunk in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_create in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n rdmacore50_0_mlx5_debug_mask in mlx5.c.o\n rdmacore50_0_mlx5_freeze_on_error_cqe in mlx5.c.o\n rdmacore50_0_mlx5_cmd_status_to_err in mlx5.c.o\n rdmacore50_0_mlx5_get_cmd_status_err in mlx5.c.o\n rdmacore50_0_mlx5_store_uidx in mlx5.c.o\n rdmacore50_0_mlx5_clear_uidx in mlx5.c.o\n rdmacore50_0_mlx5_find_mkey in mlx5.c.o\n@@ -85,47 +287,16 @@\n mlx5dv_set_context_attr in mlx5.c.o\n mlx5dv_get_clock_info in mlx5.c.o\n mlx5dv_is_supported in mlx5.c.o\n mlx5dv_open_device in mlx5.c.o\n rdmacore50_0_mlx5_get_dv_ops in mlx5.c.o\n rdmacore50_0_mlx5_hca_table in mlx5.c.o\n verbs_provider_mlx5 in mlx5.c.o\n-rdmacore50_0_dr_rule_send_update_list in dr_rule.c.o\n-rdmacore50_0_dr_rule_rehash_matcher_s_anchor in dr_rule.c.o\n-rdmacore50_0_dr_rule_set_last_member in dr_rule.c.o\n-rdmacore50_0_dr_rule_get_reverse_rule_members in dr_rule.c.o\n-mlx5dv_dr_rule_create in dr_rule.c.o\n-mlx5dv_dr_rule_destroy in dr_rule.c.o\n-rdmacore50_0_mlx5_alloc_dbrec in dbrec.c.o\n-rdmacore50_0_mlx5_free_db in dbrec.c.o\n-rdmacore50_0_dr_arg_get_object_id in dr_arg.c.o\n-rdmacore50_0_dr_arg_get_obj in dr_arg.c.o\n-rdmacore50_0_dr_arg_put_obj in dr_arg.c.o\n-rdmacore50_0_dr_arg_mngr_create in dr_arg.c.o\n-rdmacore50_0_dr_arg_mngr_destroy in dr_arg.c.o\n-rdmacore50_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n-rdmacore50_0_mlx5_copy_to_recv_wqe in qp.c.o\n-rdmacore50_0_mlx5_copy_to_send_wqe in qp.c.o\n-rdmacore50_0_mlx5_get_send_wqe in qp.c.o\n-rdmacore50_0_mlx5_init_rwq_indices in qp.c.o\n-rdmacore50_0_mlx5_init_qp_indices in qp.c.o\n-rdmacore50_0_mlx5_get_atomic_laddr in qp.c.o\n-rdmacore50_0_mlx5_post_send in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_pfns in qp.c.o\n-rdmacore50_0_mlx5_bind_mw in qp.c.o\n-rdmacore50_0_mlx5_post_wq_recv in qp.c.o\n-rdmacore50_0_mlx5_post_recv in qp.c.o\n-rdmacore50_0_mlx5_post_srq_ops in qp.c.o\n-rdmacore50_0_mlx5_use_huge in qp.c.o\n-rdmacore50_0_mlx5_find_qp in qp.c.o\n-rdmacore50_0_mlx5_store_qp in qp.c.o\n-rdmacore50_0_mlx5_clear_qp in qp.c.o\n-mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n+mlx5dv_dr_table_create in dr_table.c.o\n+mlx5dv_dr_table_destroy in dr_table.c.o\n rdmacore50_0_dr_vports_table_get_vport_cap in dr_vports.c.o\n rdmacore50_0_dr_vports_table_get_ib_port_cap in dr_vports.c.o\n rdmacore50_0_dr_vports_table_add_wire in dr_vports.c.o\n rdmacore50_0_dr_vports_table_del_wire in dr_vports.c.o\n rdmacore50_0_dr_vports_table_create in dr_vports.c.o\n rdmacore50_0_dr_vports_table_destroy in dr_vports.c.o\n rdmacore50_0_dr_ste_calc_hash_index in dr_ste.c.o\n@@ -211,177 +382,14 @@\n rdmacore50_0_srq_cooldown_wqe in srq.c.o\n rdmacore50_0_mlx5_complete_odp_fault in srq.c.o\n rdmacore50_0_mlx5_post_srq_recv in srq.c.o\n rdmacore50_0_mlx5_alloc_srq_buf in srq.c.o\n rdmacore50_0_mlx5_find_srq in srq.c.o\n rdmacore50_0_mlx5_store_srq in srq.c.o\n rdmacore50_0_mlx5_clear_srq in srq.c.o\n-rdmacore50_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n-rdmacore50_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n-rdmacore50_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n-rdmacore50_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n-mlx5dv_dr_domain_create in dr_domain.c.o\n-mlx5dv_dr_domain_sync in dr_domain.c.o\n-mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n-mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n-mlx5dv_dr_domain_destroy in dr_domain.c.o\n-rdmacore50_0_mlx5_single_threaded in verbs.c.o\n-rdmacore50_0__mlx5dv_create_flow in verbs.c.o\n-rdmacore50_0_mlx5_query_rt_values in verbs.c.o\n-rdmacore50_0_mlx5_query_port in verbs.c.o\n-rdmacore50_0_mlx5_async_event in verbs.c.o\n-rdmacore50_0_mlx5_alloc_pd in verbs.c.o\n-rdmacore50_0_mlx5_alloc_td in verbs.c.o\n-rdmacore50_0_mlx5_dealloc_td in verbs.c.o\n-rdmacore50_0_mlx5_set_singleton_nc_uar in verbs.c.o\n-rdmacore50_0_mlx5_alloc_parent_domain in verbs.c.o\n-rdmacore50_0_mlx5_free_pd in verbs.c.o\n-rdmacore50_0_mlx5_reg_mr in verbs.c.o\n-rdmacore50_0_mlx5_reg_dmabuf_mr in verbs.c.o\n-rdmacore50_0_mlx5_alloc_null_mr in verbs.c.o\n-rdmacore50_0_mlx5_reg_dm_mr in verbs.c.o\n-rdmacore50_0_mlx5_rereg_mr in verbs.c.o\n-rdmacore50_0_mlx5_dereg_mr in verbs.c.o\n-rdmacore50_0_mlx5_advise_mr in verbs.c.o\n-rdmacore50_0_mlx5_import_pd in verbs.c.o\n-rdmacore50_0_mlx5_unimport_pd in verbs.c.o\n-rdmacore50_0_mlx5_import_mr in verbs.c.o\n-rdmacore50_0_mlx5_unimport_mr in verbs.c.o\n-rdmacore50_0_mlx5_alloc_mw in verbs.c.o\n-rdmacore50_0_mlx5_dealloc_mw in verbs.c.o\n-rdmacore50_0_mlx5_create_cq in verbs.c.o\n-rdmacore50_0_mlx5_create_cq_ex in verbs.c.o\n-mlx5dv_create_cq in verbs.c.o\n-rdmacore50_0_mlx5_resize_cq in verbs.c.o\n-rdmacore50_0_mlx5_destroy_cq in verbs.c.o\n-rdmacore50_0_mlx5_create_srq in verbs.c.o\n-rdmacore50_0_mlx5_modify_srq in verbs.c.o\n-rdmacore50_0_mlx5_query_srq in verbs.c.o\n-rdmacore50_0_mlx5_set_ece in verbs.c.o\n-rdmacore50_0_mlx5_query_ece in verbs.c.o\n-rdmacore50_0_mlx5_create_qp in verbs.c.o\n-rdmacore50_0_mlx5_destroy_qp in verbs.c.o\n-rdmacore50_0_mlx5_destroy_srq in verbs.c.o\n-rdmacore50_0_mlx5_query_qp_data_in_order in verbs.c.o\n-rdmacore50_0_mlx5_query_qp in verbs.c.o\n-rdmacore50_0_mlx5_modify_qp_rate_limit in verbs.c.o\n-rdmacore50_0_mlx5_create_ah in verbs.c.o\n-rdmacore50_0_mlx5_destroy_ah in verbs.c.o\n-mlx5dv_map_ah_to_qp in verbs.c.o\n-rdmacore50_0_mlx5_attach_mcast in verbs.c.o\n-rdmacore50_0_mlx5_detach_mcast in verbs.c.o\n-rdmacore50_0_mlx5_create_qp_ex in verbs.c.o\n-mlx5dv_create_qp in verbs.c.o\n-mlx5dv_qp_ex_from_ibv_qp_ex in verbs.c.o\n-rdmacore50_0_mlx5_get_srq_num in verbs.c.o\n-rdmacore50_0_mlx5_open_qp in verbs.c.o\n-rdmacore50_0_mlx5_open_xrcd in verbs.c.o\n-rdmacore50_0_mlx5_close_xrcd in verbs.c.o\n-rdmacore50_0_mlx5_create_srq_ex in verbs.c.o\n-rdmacore50_0_mlx5_query_device_ex in verbs.c.o\n-rdmacore50_0_mlx5_query_device_ctx in verbs.c.o\n-rdmacore50_0_mlx5_create_wq in verbs.c.o\n-mlx5dv_create_wq in verbs.c.o\n-rdmacore50_0_mlx5_modify_wq in verbs.c.o\n-rdmacore50_0_mlx5_destroy_wq in verbs.c.o\n-rdmacore50_0_mlx5_create_flow in verbs.c.o\n-rdmacore50_0_mlx5_destroy_flow in verbs.c.o\n-rdmacore50_0_mlx5_create_rwq_ind_table in verbs.c.o\n-rdmacore50_0_mlx5_destroy_rwq_ind_table in verbs.c.o\n-rdmacore50_0_mlx5_modify_cq in verbs.c.o\n-rdmacore50_0_mlx5_create_flow_action_esp in verbs.c.o\n-mlx5dv_create_flow_action_esp in verbs.c.o\n-rdmacore50_0_mlx5_modify_flow_action_esp in verbs.c.o\n-mlx5dv_create_flow_action_modify_header in verbs.c.o\n-mlx5dv_create_flow_action_packet_reformat in verbs.c.o\n-rdmacore50_0_mlx5_destroy_flow_action in verbs.c.o\n-mlx5dv_dm_map_op_addr in verbs.c.o\n-rdmacore50_0_mlx5_unimport_dm in verbs.c.o\n-rdmacore50_0_mlx5_import_dm in verbs.c.o\n-mlx5dv_alloc_dm in verbs.c.o\n-rdmacore50_0_mlx5_free_dm in verbs.c.o\n-rdmacore50_0_mlx5_alloc_dm in verbs.c.o\n-rdmacore50_0_mlx5_create_counters in verbs.c.o\n-rdmacore50_0_mlx5_destroy_counters in verbs.c.o\n-rdmacore50_0_mlx5_attach_counters_point_flow in verbs.c.o\n-rdmacore50_0_mlx5_read_counters in verbs.c.o\n-mlx5dv_create_flow_matcher in verbs.c.o\n-mlx5dv_destroy_flow_matcher in verbs.c.o\n-mlx5dv_create_flow in verbs.c.o\n-mlx5dv_create_steering_anchor in verbs.c.o\n-mlx5dv_destroy_steering_anchor in verbs.c.o\n-mlx5dv_devx_umem_reg_ex in verbs.c.o\n-mlx5dv_devx_umem_reg in verbs.c.o\n-mlx5dv_devx_umem_dereg in verbs.c.o\n-mlx5dv_devx_obj_create in verbs.c.o\n-mlx5dv_devx_obj_query in verbs.c.o\n-mlx5dv_devx_obj_modify in verbs.c.o\n-mlx5dv_devx_obj_destroy in verbs.c.o\n-mlx5dv_devx_general_cmd in verbs.c.o\n-_mlx5dv_query_port in verbs.c.o\n-rdmacore50_0_clean_dyn_uars in verbs.c.o\n-mlx5dv_devx_alloc_uar in verbs.c.o\n-mlx5dv_devx_free_uar in verbs.c.o\n-mlx5dv_devx_query_eqn in verbs.c.o\n-mlx5dv_devx_cq_query in verbs.c.o\n-mlx5dv_devx_cq_modify in verbs.c.o\n-mlx5dv_devx_qp_query in verbs.c.o\n-mlx5dv_devx_qp_modify in verbs.c.o\n-rdmacore50_0_mlx5_modify_qp in verbs.c.o\n-mlx5dv_devx_srq_query in verbs.c.o\n-mlx5dv_devx_srq_modify in verbs.c.o\n-mlx5dv_devx_wq_query in verbs.c.o\n-mlx5dv_devx_wq_modify in verbs.c.o\n-mlx5dv_devx_ind_tbl_query in verbs.c.o\n-mlx5dv_devx_ind_tbl_modify in verbs.c.o\n-mlx5dv_devx_create_cmd_comp in verbs.c.o\n-mlx5dv_devx_destroy_cmd_comp in verbs.c.o\n-mlx5dv_devx_create_event_channel in verbs.c.o\n-mlx5dv_devx_destroy_event_channel in verbs.c.o\n-mlx5dv_devx_subscribe_devx_event in verbs.c.o\n-mlx5dv_devx_subscribe_devx_event_fd in verbs.c.o\n-mlx5dv_devx_obj_query_async in verbs.c.o\n-mlx5dv_devx_get_async_cmd_comp in verbs.c.o\n-mlx5dv_devx_get_event in verbs.c.o\n-mlx5dv_create_mkey in verbs.c.o\n-mlx5dv_destroy_mkey in verbs.c.o\n-_mlx5dv_mkey_check in verbs.c.o\n-mlx5dv_crypto_login in verbs.c.o\n-mlx5dv_crypto_login_query_state in verbs.c.o\n-mlx5dv_crypto_logout in verbs.c.o\n-mlx5dv_crypto_login_create in verbs.c.o\n-mlx5dv_crypto_login_query in verbs.c.o\n-mlx5dv_crypto_login_destroy in verbs.c.o\n-mlx5dv_dek_create in verbs.c.o\n-mlx5dv_dek_query in verbs.c.o\n-mlx5dv_dek_destroy in verbs.c.o\n-mlx5dv_alloc_var in verbs.c.o\n-mlx5dv_free_var in verbs.c.o\n-mlx5dv_pp_alloc in verbs.c.o\n-mlx5dv_pp_free in verbs.c.o\n-mlx5dv_devx_alloc_msi_vector in verbs.c.o\n-mlx5dv_devx_free_msi_vector in verbs.c.o\n-mlx5dv_devx_create_eq in verbs.c.o\n-mlx5dv_devx_destroy_eq in verbs.c.o\n-rdmacore50_0_mlx5_set_dv_ctx_ops in verbs.c.o\n-rdmacore50_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_ste in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_htbl in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_formated_htbl in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_action in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_pattern in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_args in dr_send.c.o\n-rdmacore50_0_dr_send_allow_fl in dr_send.c.o\n-rdmacore50_0_dr_send_ring_free in dr_send.c.o\n-rdmacore50_0_dr_send_ring_alloc in dr_send.c.o\n-rdmacore50_0_dr_send_ring_force_drain in dr_send.c.o\n-mlx5dv_dump_dr_domain in dr_dbg.c.o\n-mlx5dv_dump_dr_table in dr_dbg.c.o\n-mlx5dv_dump_dr_matcher in dr_dbg.c.o\n-mlx5dv_dump_dr_rule in dr_dbg.c.o\n rdmacore50_0_dr_devx_query_esw_vport_context in dr_devx.c.o\n rdmacore50_0_dr_devx_query_gvmi in dr_devx.c.o\n rdmacore50_0_dr_devx_query_esw_caps in dr_devx.c.o\n rdmacore50_0_dr_devx_query_device in dr_devx.c.o\n rdmacore50_0_dr_devx_sync_steering in dr_devx.c.o\n rdmacore50_0_dr_devx_create_flow_table in dr_devx.c.o\n rdmacore50_0_dr_devx_query_flow_table in dr_devx.c.o\n@@ -396,46 +404,38 @@\n rdmacore50_0_dr_devx_modify_meter in dr_devx.c.o\n rdmacore50_0_dr_devx_create_qp in dr_devx.c.o\n rdmacore50_0_dr_devx_modify_qp_rst2init in dr_devx.c.o\n rdmacore50_0_dr_devx_modify_qp_init2rtr in dr_devx.c.o\n rdmacore50_0_dr_devx_modify_qp_rtr2rts in dr_devx.c.o\n rdmacore50_0_dr_devx_query_gid in dr_devx.c.o\n rdmacore50_0_dr_devx_create_modify_header_arg in dr_devx.c.o\n-rdmacore50_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_free_chunk in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_create in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n-mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n-mlx5dv_dr_matcher_create in dr_matcher.c.o\n-mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n-mlx5dv_dr_table_create in dr_table.c.o\n-mlx5dv_dr_table_destroy in dr_table.c.o\n-rdmacore50_0_mlx5_free_buf_extern in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf_extern in buf.c.o\n-rdmacore50_0_mlx5_free_actual_buf in buf.c.o\n-rdmacore50_0_mlx5_is_custom_alloc in buf.c.o\n-rdmacore50_0_mlx5_is_extern_alloc in buf.c.o\n-rdmacore50_0_mlx5_get_alloc_type in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf_contig in buf.c.o\n-rdmacore50_0_mlx5_alloc_prefered_buf in buf.c.o\n-rdmacore50_0_mlx5_free_buf_contig in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf in buf.c.o\n-rdmacore50_0_mlx5_free_buf in buf.c.o\n-rdmacore50_0_dr_crc32_init_table in dr_crc32.c.o\n-rdmacore50_0_dr_crc32_slice8_calc in dr_crc32.c.o\n-rdmacore50_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n+rdmacore50_0_mlx5_stall_cq_poll_min in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_dec_step in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_poll_max in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_inc_step in cq.c.o\n+rdmacore50_0_mlx5_stall_num_loop in cq.c.o\n+rdmacore50_0_mlx5_poll_cq in cq.c.o\n+rdmacore50_0_mlx5_poll_cq_v1 in cq.c.o\n+rdmacore50_0_mlx5_cq_fill_pfns in cq.c.o\n+rdmacore50_0_mlx5_arm_cq in cq.c.o\n+rdmacore50_0_mlx5_cq_event in cq.c.o\n+rdmacore50_0___mlx5_cq_clean in cq.c.o\n+rdmacore50_0_mlx5_cq_clean in cq.c.o\n+rdmacore50_0_mlx5_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mlx5_alloc_cq_buf in cq.c.o\n+rdmacore50_0_mlx5_free_cq_buf in cq.c.o\n+rdmacore50_0_dr_arg_get_object_id in dr_arg.c.o\n+rdmacore50_0_dr_arg_get_obj in dr_arg.c.o\n+rdmacore50_0_dr_arg_put_obj in dr_arg.c.o\n+rdmacore50_0_dr_arg_mngr_create in dr_arg.c.o\n+rdmacore50_0_dr_arg_mngr_destroy in dr_arg.c.o\n+rdmacore50_0_dr_buddy_init in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_cleanup in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_alloc_mem in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_free_mem in dr_buddy.c.o\n \n dr_ste_v0.c.o:\n U __errno_location\n U __stack_chk_fail\n 0000000000000000 r dr_ste_v0_action_modify_field_arr\n 0000000000001e80 t dr_ste_v0_build_eth_ipv6_l3_l4_init\n 00000000000008e0 t dr_ste_v0_build_eth_ipv6_l3_l4_tag\n@@ -512,199 +512,14 @@\n 0000000000000330 t dr_ste_v0_set_miss_addr\n 0000000000000370 t dr_ste_v0_set_next_lu_type\n U rdmacore50_0_dr_ste_conv_bit_to_byte_mask\n 00000000000041a0 T rdmacore50_0_dr_ste_get_ctx_v0\n U rdmacore50_0_dr_vports_table_get_vport_cap\n 0000000000000000 d ste_ctx_v0\n \n-cq.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000000 r .LC2\n-0000000000000090 r .LC3\n-0000000000000015 r .LC4\n-0000000000000032 r .LC6\n-00000000000000b8 r .LC7\n-0000000000000050 r .LC8\n-0000000000000058 r .LC9\n-0000000000000980 r CSWTCH.108\n-0000000000000590 t __mlx5_cq_clean.part.0\n- U __stack_chk_fail\n- U __vfprintf_chk\n- U abort\n-00000000000004f0 t dump_cqe\n- U fwrite\n-0000000000000bf0 t handle_tag_matching\n- U memcpy\n- U memset\n-0000000000000910 t mlx5_cq_read_flow_tag\n-0000000000000350 t mlx5_cq_read_wc_byte_len\n-0000000000000230 t mlx5_cq_read_wc_completion_ts\n-0000000000000250 t mlx5_cq_read_wc_completion_wallclock_ns\n-0000000000000550 t mlx5_cq_read_wc_cvlan\n-0000000000000030 t mlx5_cq_read_wc_dlid_path_bits\n-0000000000000370 t mlx5_cq_read_wc_flags\n-0000000000000330 t mlx5_cq_read_wc_imm_data\n-0000000000000100 t mlx5_cq_read_wc_opcode\n-0000000000000310 t mlx5_cq_read_wc_qp_num\n-0000000000000010 t mlx5_cq_read_wc_sl\n-0000000000000570 t mlx5_cq_read_wc_slid\n-00000000000002f0 t mlx5_cq_read_wc_src_qp\n-00000000000002d0 t mlx5_cq_read_wc_tm_info\n-0000000000000000 t mlx5_cq_read_wc_vendor_err\n-0000000000000930 t mlx5_end_poll\n-0000000000000990 t mlx5_end_poll_adaptive_stall\n-0000000000000b00 t mlx5_end_poll_adaptive_stall_lock\n-0000000000000a50 t mlx5_end_poll_lock\n-0000000000000950 t mlx5_end_poll_stall\n-0000000000000a90 t mlx5_end_poll_stall_lock\n-0000000000000430 t mlx5_err\n-00000000000000c0 t mlx5_find_uidx\n-0000000000001970 t mlx5_next_poll_adaptive_v0\n-000000000000d740 t mlx5_next_poll_adaptive_v1\n-0000000000000fa0 t mlx5_next_poll_v0\n-000000000000cce0 t mlx5_next_poll_v1\n-0000000000010c40 t mlx5_start_poll_adaptive_stall_v0\n-0000000000012cb0 t mlx5_start_poll_adaptive_stall_v0_clock_update\n-0000000000004f40 t mlx5_start_poll_adaptive_stall_v0_lock\n-0000000000007130 t mlx5_start_poll_adaptive_stall_v0_lock_clock_update\n-0000000000005b10 t mlx5_start_poll_adaptive_stall_v1\n-0000000000007cf0 t mlx5_start_poll_adaptive_stall_v1_clock_update\n-000000000000a020 t mlx5_start_poll_adaptive_stall_v1_lock\n-000000000000ac50 t mlx5_start_poll_adaptive_stall_v1_lock_clock_update\n-000000000000e190 t mlx5_start_poll_stall_v0\n-000000000000ec30 t mlx5_start_poll_stall_v0_clock_update\n-0000000000013790 t mlx5_start_poll_stall_v0_lock\n-0000000000002e00 t mlx5_start_poll_stall_v0_lock_clock_update\n-0000000000002360 t mlx5_start_poll_stall_v1\n-0000000000003980 t mlx5_start_poll_stall_v1_clock_update\n-0000000000008800 t mlx5_start_poll_stall_v1_lock\n-0000000000009400 t mlx5_start_poll_stall_v1_lock_clock_update\n-000000000000b8a0 t mlx5_start_poll_v0\n-000000000000c2b0 t mlx5_start_poll_v0_clock_update\n-000000000000f6e0 t mlx5_start_poll_v0_lock\n-0000000000011710 t mlx5_start_poll_v0_lock_clock_update\n-00000000000101d0 t mlx5_start_poll_v1\n-0000000000012220 t mlx5_start_poll_v1_clock_update\n-0000000000004450 t mlx5_start_poll_v1_lock\n-00000000000065f0 t mlx5_start_poll_v1_lock_clock_update\n- U mlx5dv_get_clock_info\n-0000000000000050 t next_cqe_sw\n-0000000000000000 d ops\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000016220 T rdmacore50_0___mlx5_cq_clean\n-0000000000016610 T rdmacore50_0_mlx5_alloc_cq_buf\n- U rdmacore50_0_mlx5_alloc_prefered_buf\n-00000000000161a0 T rdmacore50_0_mlx5_arm_cq\n- U rdmacore50_0_mlx5_complete_odp_fault\n- U rdmacore50_0_mlx5_copy_to_recv_srq\n- U rdmacore50_0_mlx5_copy_to_recv_wqe\n- U rdmacore50_0_mlx5_copy_to_send_wqe\n-0000000000016250 T rdmacore50_0_mlx5_cq_clean\n-0000000000016210 T rdmacore50_0_mlx5_cq_event\n-0000000000015fa0 T rdmacore50_0_mlx5_cq_fill_pfns\n-0000000000016310 T rdmacore50_0_mlx5_cq_resize_copy_cqes\n- U rdmacore50_0_mlx5_find_mkey\n- U rdmacore50_0_mlx5_find_qp\n- U rdmacore50_0_mlx5_find_srq\n- U rdmacore50_0_mlx5_free_actual_buf\n-0000000000016780 T rdmacore50_0_mlx5_free_cq_buf\n- U rdmacore50_0_mlx5_free_srq_wqe\n- U rdmacore50_0_mlx5_freeze_on_error_cqe\n- U rdmacore50_0_mlx5_get_alloc_type\n-0000000000014360 T rdmacore50_0_mlx5_poll_cq\n-0000000000015100 T rdmacore50_0_mlx5_poll_cq_v1\n-0000000000000000 D rdmacore50_0_mlx5_stall_cq_dec_step\n-0000000000000004 D rdmacore50_0_mlx5_stall_cq_inc_step\n-0000000000000008 D rdmacore50_0_mlx5_stall_cq_poll_max\n-000000000000000c D rdmacore50_0_mlx5_stall_cq_poll_min\n-0000000000000010 D rdmacore50_0_mlx5_stall_num_loop\n- U rdmacore50_0_mlx5_use_huge\n- U sleep\n- U stderr\n-\n-dr_action.c.o:\n-0000000000000000 r .LC0\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_action_aso_flow_meter_init\n-00000000000001e0 t dr_action_convert_to_fte_dest\n-0000000000000090 t dr_action_create_sampler\n- U free\n- U memcpy\n- U mlx5dv_create_flow_action_modify_header\n- U mlx5dv_create_flow_action_packet_reformat\n- U mlx5dv_create_steering_anchor\n- U mlx5dv_destroy_steering_anchor\n- U mlx5dv_devx_obj_destroy\n-00000000000017b0 T mlx5dv_dr_action_create_aso\n-00000000000013a0 T mlx5dv_dr_action_create_default_miss\n-0000000000002860 T mlx5dv_dr_action_create_dest_array\n-0000000000001440 T mlx5dv_dr_action_create_dest_devx_tir\n-00000000000027d0 T mlx5dv_dr_action_create_dest_ib_port\n-00000000000013e0 T mlx5dv_dr_action_create_dest_ibv_qp\n-0000000000001510 T mlx5dv_dr_action_create_dest_root_table\n-00000000000014a0 T mlx5dv_dr_action_create_dest_table\n-0000000000002720 T mlx5dv_dr_action_create_dest_vport\n-0000000000001360 T mlx5dv_dr_action_create_drop\n-0000000000001740 T mlx5dv_dr_action_create_flow_counter\n-0000000000002600 T mlx5dv_dr_action_create_flow_meter\n-0000000000002e50 T mlx5dv_dr_action_create_flow_sampler\n-0000000000001f10 T mlx5dv_dr_action_create_modify_header\n-0000000000001b20 T mlx5dv_dr_action_create_packet_reformat\n-0000000000001e50 T mlx5dv_dr_action_create_pop_vlan\n-0000000000001e90 T mlx5dv_dr_action_create_push_vlan\n-0000000000001ac0 T mlx5dv_dr_action_create_tag\n-0000000000002bd0 T mlx5dv_dr_action_destroy\n-0000000000001990 T mlx5dv_dr_action_modify_aso\n-00000000000025c0 T mlx5dv_dr_action_modify_flow_meter\n- U mlx5dv_dr_matcher_create\n- U mlx5dv_dr_matcher_destroy\n- U mlx5dv_dr_rule_create\n- U mlx5dv_dr_rule_destroy\n- U mlx5dv_dr_table_create\n- U mlx5dv_dr_table_destroy\n-00000000000001a0 r next_action_state\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-00000000000011f0 T rdmacore50_0_dr_actions_build_attr\n-00000000000004a0 T rdmacore50_0_dr_actions_build_ste_arr\n-0000000000001ef0 T rdmacore50_0_dr_actions_reformat_get_id\n- U rdmacore50_0_dr_arg_get_object_id\n- U rdmacore50_0_dr_devx_create_always_hit_ft\n- U rdmacore50_0_dr_devx_create_flow_sampler\n- U rdmacore50_0_dr_devx_create_meter\n- U rdmacore50_0_dr_devx_create_reformat_ctx\n- U rdmacore50_0_dr_devx_destroy_always_hit_ft\n- U rdmacore50_0_dr_devx_modify_meter\n- U rdmacore50_0_dr_devx_query_flow_sampler\n- U rdmacore50_0_dr_devx_query_flow_table\n- U rdmacore50_0_dr_devx_query_meter\n- U rdmacore50_0_dr_domain_is_support_sw_encap\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_send_postsend_args\n- U rdmacore50_0_dr_ste_alloc_encap\n- U rdmacore50_0_dr_ste_alloc_modify_hdr\n- U rdmacore50_0_dr_ste_conv_modify_hdr_sw_field\n- U rdmacore50_0_dr_ste_free_encap\n- U rdmacore50_0_dr_ste_free_modify_hdr\n- U rdmacore50_0_dr_ste_set_action_add\n- U rdmacore50_0_dr_ste_set_action_copy\n- U rdmacore50_0_dr_ste_set_action_decap_l3_list\n- U rdmacore50_0_dr_ste_set_action_set\n- U rdmacore50_0_dr_ste_set_actions_rx\n- U rdmacore50_0_dr_ste_set_actions_tx\n- U rdmacore50_0_dr_vports_table_get_ib_port_cap\n- U rdmacore50_0_dr_vports_table_get_vport_cap\n- U rdmacore50_0_mlx5_destroy_flow_action\n-\n dr_ste_v1.c.o:\n U __errno_location\n U __stack_chk_fail\n U calloc\n 0000000000000060 r dr_ste_v1_action_modify_field_arr\n 0000000000000000 r dr_ste_v1_action_modify_flex_field_arr\n 0000000000004bf0 t dr_ste_v1_alloc_modify_hdr_ptrn_arg\n@@ -828,23 +643,522 @@\n U rdmacore50_0_dr_ste_htbl_alloc\n U rdmacore50_0_dr_ste_htbl_free\n U rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl\n 0000000000008c20 T rdmacore50_0_dr_ste_v1_set_aso_ct\n U rdmacore50_0_dr_vports_table_get_vport_cap\n 0000000000000000 d ste_ctx_v1\n \n-dr_buddy.c.o:\n+dr_matcher.c.o:\n U __errno_location\n+ U __stack_chk_fail\n U calloc\n+0000000000000000 t dr_mask_is_tnl_gtpu_flex_parser_0\n+00000000000000a0 t dr_mask_is_tnl_gtpu_flex_parser_1\n+0000000000002350 t dr_matcher_connect\n+0000000000000140 t dr_matcher_copy_mask\n+00000000000024d0 t dr_matcher_init_nic\n+0000000000000460 t dr_matcher_is_mask_consumed\n+00000000000002f0 t dr_matcher_set_nic_matcher_layout\n+00000000000005d0 t dr_matcher_set_ste_builders\n+00000000000025c0 t dr_matcher_uninit_nic\n U free\n- U rdmacore50_0_bitmap_find_first_bit\n-0000000000000250 T rdmacore50_0_dr_buddy_alloc_mem\n-00000000000001e0 T rdmacore50_0_dr_buddy_cleanup\n-0000000000000400 T rdmacore50_0_dr_buddy_free_mem\n-0000000000000000 T rdmacore50_0_dr_buddy_init\n+ U memcmp\n+ U memcpy\n+ U mlx5dv_create_flow_matcher\n+ U mlx5dv_destroy_flow_matcher\n+ U mlx5dv_devx_obj_destroy\n+0000000000002710 T mlx5dv_dr_matcher_create\n+0000000000002e60 T mlx5dv_dr_matcher_destroy\n+0000000000002660 T mlx5dv_dr_matcher_set_layout\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_dr_devx_create_definer\n+ U rdmacore50_0_dr_domain_is_support_ste_icm_size\n+ U rdmacore50_0_dr_domain_set_max_ste_icm_size\n+ U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n+ U rdmacore50_0_dr_rule_rehash_matcher_s_anchor\n+ U rdmacore50_0_dr_send_ring_force_drain\n+ U rdmacore50_0_dr_ste_build_def0\n+ U rdmacore50_0_dr_ste_build_def16\n+ U rdmacore50_0_dr_ste_build_def2\n+ U rdmacore50_0_dr_ste_build_def22\n+ U rdmacore50_0_dr_ste_build_def24\n+ U rdmacore50_0_dr_ste_build_def25\n+ U rdmacore50_0_dr_ste_build_def26\n+ U rdmacore50_0_dr_ste_build_def28\n+ U rdmacore50_0_dr_ste_build_def33\n+ U rdmacore50_0_dr_ste_build_def6\n+ U rdmacore50_0_dr_ste_build_empty_always_hit\n+ U rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4\n+ U rdmacore50_0_dr_ste_build_eth_l2_dst\n+ U rdmacore50_0_dr_ste_build_eth_l2_src\n+ U rdmacore50_0_dr_ste_build_eth_l2_src_dst\n+ U rdmacore50_0_dr_ste_build_eth_l2_tnl\n+ U rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple\n+ U rdmacore50_0_dr_ste_build_eth_l3_ipv4_misc\n+ U rdmacore50_0_dr_ste_build_eth_l3_ipv6_dst\n+ U rdmacore50_0_dr_ste_build_eth_l3_ipv6_src\n+ U rdmacore50_0_dr_ste_build_eth_l4_misc\n+ U rdmacore50_0_dr_ste_build_flex_parser_0\n+ U rdmacore50_0_dr_ste_build_flex_parser_1\n+ U rdmacore50_0_dr_ste_build_general_purpose\n+ U rdmacore50_0_dr_ste_build_ib_l4\n+ U rdmacore50_0_dr_ste_build_icmp\n+ U rdmacore50_0_dr_ste_build_mpls\n+ U rdmacore50_0_dr_ste_build_pre_check\n+ U rdmacore50_0_dr_ste_build_register_0\n+ U rdmacore50_0_dr_ste_build_register_1\n+ U rdmacore50_0_dr_ste_build_src_gvmi_qpn\n+ U rdmacore50_0_dr_ste_build_tnl_geneve\n+ U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt\n+ U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n+ U rdmacore50_0_dr_ste_build_tnl_gre\n+ U rdmacore50_0_dr_ste_build_tnl_gtpu\n+ U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0\n+ U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1\n+ U rdmacore50_0_dr_ste_build_tnl_mpls_over_gre\n+ U rdmacore50_0_dr_ste_build_tnl_mpls_over_udp\n+ U rdmacore50_0_dr_ste_build_tnl_vxlan_gpe\n+ U rdmacore50_0_dr_ste_build_tunnel_header\n+ U rdmacore50_0_dr_ste_copy_param\n+ U rdmacore50_0_dr_ste_htbl_alloc\n+ U rdmacore50_0_dr_ste_htbl_free\n+ U rdmacore50_0_dr_ste_htbl_init_and_postsend\n+\n+dbrec.c.o:\n+ U free\n+ U malloc\n+ U memset\n+0000000000000000 t mlx5_alloc_dbrec.cold\n+000000000000000a t mlx5_free_db.cold\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_cl_qmap_get\n+ U rdmacore50_0_cl_qmap_insert\n+ U rdmacore50_0_cl_qmap_remove_item\n+ U rdmacore50_0_mlx5_alloc_buf\n+ U rdmacore50_0_mlx5_alloc_buf_extern\n+0000000000000000 T rdmacore50_0_mlx5_alloc_dbrec\n+ U rdmacore50_0_mlx5_free_buf\n+ U rdmacore50_0_mlx5_free_buf_extern\n+0000000000000260 T rdmacore50_0_mlx5_free_db\n+ U rdmacore50_0_mlx5_is_custom_alloc\n+ U rdmacore50_0_mlx5_is_extern_alloc\n+\n+verbs.c.o:\n+0000000000000000 r .LC19\n+0000000000000000 r .LC21\n+0000000000000008 r .LC23\n+000000000000000e r .LC26\n+0000000000000021 r .LC27\n+0000000000000010 r .LC33\n+0000000000000000 r .LC34\n+0000000000000018 r .LC38\n+0000000000000020 r .LC39\n+0000000000000028 r .LC40\n+0000000000000030 r .LC41\n+0000000000000029 r .LC43\n+0000000000000031 r .LC44\n+0000000000000039 r .LC45\n+0000000000000041 r .LC46\n+000000000000004e r .LC47\n+0000000000000056 r .LC48\n+000000000000006a r .LC49\n+000000000000007c r .LC50\n+0000000000000000 r .LC53\n+0000000000000083 r .LC54\n+0000000000000090 r .LC55\n+000000000000008b r .LC56\n+0000000000000038 r .LC57\n+000000000000009e r .LC58\n+0000000000000040 r .LC59\n+0000000000000048 r .LC60\n+0000000000000010 r .LC62\n+0000000000000020 r .LC63\n+0000000000000120 r CSWTCH.257\n+ U _GLOBAL_OFFSET_TABLE_\n+ U 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rdmacore50_0_mlx5_is_extern_alloc\n+ U shmat\n+ U shmctl\n+ U shmdt\n+ U shmget\n+ U stderr\n+ U strcasecmp\n+ U strerror\n+ U strtol\n+\n+dr_ste_v2.c.o:\n+0000000000000000 b ctx_mutex\n+0000000000000000 r dr_ste_v2_action_modify_field_arr\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_dr_ste_get_ctx_v1\n+0000000000000000 T rdmacore50_0_dr_ste_get_ctx_v2\n+0000000000000040 b ste_ctx_v2\n+\n+dr_dbg.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+0000000000000070 r .LC10\n+0000000000000058 r .LC11\n+000000000000008a r .LC12\n+00000000000000a2 r .LC13\n+00000000000000b5 r .LC14\n+00000000000000ba r .LC15\n+00000000000000ca r .LC16\n+00000000000000e5 r .LC17\n+00000000000000fa r .LC18\n+0000000000000080 r .LC19\n+0000000000000005 r .LC2\n+0000000000000110 r .LC20\n+0000000000000112 r .LC21\n+00000000000000a8 r .LC22\n+00000000000000d0 r .LC23\n+0000000000000100 r .LC24\n+000000000000011c r .LC25\n+0000000000000132 r .LC26\n+000000000000013c r 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rdmacore50_0_dr_vports_table_get_ib_port_cap\n+\n+dr_send.c.o:\n+0000000000000000 r .LC0\n+0000000000000008 r .LC1\n+0000000000000010 r .LC2\n+0000000000000018 r .LC3\n+ U __errno_location\n+ U __stack_chk_fail\n+ U calloc\n+00000000000002b0 t dr_postsend_icm_data\n+0000000000000000 t dr_rdma_segments\n+ U free\n+ U ibv_create_cq\n+ U ibv_dereg_mr\n+ U ibv_destroy_cq\n+ U ibv_reg_mr\n+ U malloc\n+ U memcpy\n+ U memset\n+ U mlx5dv_devx_obj_destroy\n+ U mlx5dv_devx_umem_dereg\n+ U mlx5dv_devx_umem_reg\n+ U mlx5dv_init_obj\n+ U posix_memalign\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_dr_devx_create_qp\n+ U rdmacore50_0_dr_devx_modify_qp_init2rtr\n+ U rdmacore50_0_dr_devx_modify_qp_rst2init\n+ U rdmacore50_0_dr_devx_modify_qp_rtr2rts\n+ U rdmacore50_0_dr_devx_query_gid\n+ U rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n+ U rdmacore50_0_dr_icm_pool_get_chunk_rkey\n+0000000000001320 T rdmacore50_0_dr_send_allow_fl\n+0000000000000680 T rdmacore50_0_dr_send_fill_and_append_ste_send_info\n+0000000000001050 T rdmacore50_0_dr_send_postsend_action\n+0000000000001230 T rdmacore50_0_dr_send_postsend_args\n+0000000000000d70 T rdmacore50_0_dr_send_postsend_formated_htbl\n+00000000000007c0 T rdmacore50_0_dr_send_postsend_htbl\n+0000000000001150 T rdmacore50_0_dr_send_postsend_pattern\n+00000000000006f0 T rdmacore50_0_dr_send_postsend_ste\n+0000000000001420 T rdmacore50_0_dr_send_ring_alloc\n+0000000000001d60 T rdmacore50_0_dr_send_ring_force_drain\n+0000000000001340 T rdmacore50_0_dr_send_ring_free\n+ U rdmacore50_0_dr_ste_get_mr_addr\n+ U rdmacore50_0_dr_ste_prepare_for_postsend\n+ U sysconf\n+\n+dr_action.c.o:\n+0000000000000000 r .LC0\n+ U __errno_location\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t dr_action_aso_flow_meter_init\n+00000000000001e0 t dr_action_convert_to_fte_dest\n+0000000000000090 t dr_action_create_sampler\n+ U free\n+ U memcpy\n+ U mlx5dv_create_flow_action_modify_header\n+ U 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rdmacore50_0_mlx5_bind_mw\n+000000000000a510 T rdmacore50_0_mlx5_clear_qp\n+0000000000008930 T rdmacore50_0_mlx5_copy_to_recv_wqe\n+0000000000008a30 T rdmacore50_0_mlx5_copy_to_send_wqe\n+000000000000a460 T rdmacore50_0_mlx5_find_qp\n+0000000000008d00 T rdmacore50_0_mlx5_get_atomic_laddr\n+ U rdmacore50_0_mlx5_get_cmd_status_err\n+0000000000008ca0 T rdmacore50_0_mlx5_get_send_wqe\n+0000000000008cd0 T rdmacore50_0_mlx5_init_qp_indices\n+0000000000008cc0 T rdmacore50_0_mlx5_init_rwq_indices\n+0000000000009780 T rdmacore50_0_mlx5_post_recv\n+0000000000008d30 T rdmacore50_0_mlx5_post_send\n+0000000000009b80 T rdmacore50_0_mlx5_post_srq_ops\n+00000000000093b0 T rdmacore50_0_mlx5_post_wq_recv\n+0000000000008d40 T rdmacore50_0_mlx5_qp_fill_wr_complete_error\n+0000000000008d60 T rdmacore50_0_mlx5_qp_fill_wr_complete_real\n+0000000000008d80 T rdmacore50_0_mlx5_qp_fill_wr_pfns\n+000000000000a490 T rdmacore50_0_mlx5_store_qp\n+000000000000a420 T rdmacore50_0_mlx5_use_huge\n+ U stderr\n+0000000000005230 t umr_wqe_finalize\n+\n+dr_ptrn.c.o:\n+ U __errno_location\n+ U calloc\n+ U free\n+ U ibv_get_device_name\n+ U memcpy\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n+ U rdmacore50_0_dr_icm_alloc_chunk\n+ U rdmacore50_0_dr_icm_free_chunk\n+ U rdmacore50_0_dr_icm_pool_create\n+ U rdmacore50_0_dr_icm_pool_destroy\n+ U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n+ U rdmacore50_0_dr_icm_pool_sync_pool\n+0000000000000010 T rdmacore50_0_dr_ptrn_cache_get_pattern\n+0000000000000370 T rdmacore50_0_dr_ptrn_cache_put_pattern\n+00000000000003d0 T rdmacore50_0_dr_ptrn_mngr_create\n+0000000000000460 T rdmacore50_0_dr_ptrn_mngr_destroy\n+0000000000000000 T rdmacore50_0_dr_ptrn_sync_pool\n+ U rdmacore50_0_dr_send_postsend_pattern\n+\n+dr_icm_pool.c.o:\n+0000000000000000 r .LC0\n+0000000000000008 r .LC1\n+ U __errno_location\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t dr_icm_buddy_destroy\n+0000000000000160 t dr_icm_pool_sync_pool_buddies\n+ U free\n+ U ibv_dereg_mr\n+ U malloc\n+ U memset\n+ U mlx5dv_alloc_dm\n+ U pthread_spin_destroy\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_dr_buddy_alloc_mem\n+ U rdmacore50_0_dr_buddy_cleanup\n+ U rdmacore50_0_dr_buddy_free_mem\n+ U rdmacore50_0_dr_buddy_init\n+ U rdmacore50_0_dr_devx_sync_steering\n+00000000000003f0 T rdmacore50_0_dr_icm_alloc_chunk\n+0000000000000a90 T rdmacore50_0_dr_icm_free_chunk\n+0000000000000c00 T rdmacore50_0_dr_icm_pool_create\n+0000000000000d40 T rdmacore50_0_dr_icm_pool_destroy\n+0000000000000b50 T rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n+0000000000000ba0 T rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n+0000000000000be0 T rdmacore50_0_dr_icm_pool_get_chunk_rkey\n+0000000000000b20 T rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz\n+00000000000003a0 T rdmacore50_0_dr_icm_pool_sync_pool\n+ U rdmacore50_0_dr_send_ring_force_drain\n+ U rdmacore50_0_mlx5_free_dm\n+\n mlx5.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000018 r .LC10\n 0000000000000012 r .LC11\n 0000000000000022 r .LC12\n 0000000000000026 r .LC13\n@@ -1246,202 +2017,32 @@\n U strncpy\n U strrchr\n U strtol\n U strtoul\n U sysconf\n 0000000000000000 D verbs_provider_mlx5\n \n-dr_rule.c.o:\n-0000000000000000 r .LC0\n+dr_table.c.o:\n U __errno_location\n- U __memcpy_chk\n U __stack_chk_fail\n U calloc\n-0000000000000000 t dr_rule_clean_rule_members\n-0000000000001e40 t dr_rule_create_rule\n-0000000000000de0 t dr_rule_create_rule_nic\n-00000000000000d0 t dr_rule_rehash_htbl_common\n+0000000000000000 t dr_table_init_nic\n+00000000000000c0 t dr_table_uninit\n U free\n-0000000000002520 T mlx5dv_dr_rule_create\n-0000000000002710 T mlx5dv_dr_rule_destroy\n+ U mlx5dv_devx_obj_destroy\n+0000000000000110 T mlx5dv_dr_table_create\n+0000000000000440 T mlx5dv_dr_table_destroy\n U pthread_spin_lock\n U pthread_spin_unlock\n- U rdmacore50_0__mlx5dv_create_flow\n- U rdmacore50_0_dr_actions_build_attr\n- U rdmacore50_0_dr_actions_build_ste_arr\n+ U rdmacore50_0_dr_devx_create_flow_table\n U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n-00000000000024c0 T rdmacore50_0_dr_rule_get_reverse_rule_members\n-00000000000023e0 T rdmacore50_0_dr_rule_rehash_matcher_s_anchor\n-0000000000000b30 T rdmacore50_0_dr_rule_send_update_list\n-00000000000024a0 T rdmacore50_0_dr_rule_set_last_member\n- U rdmacore50_0_dr_send_fill_and_append_ste_send_info\n- U rdmacore50_0_dr_send_postsend_htbl\n- U rdmacore50_0_dr_send_postsend_ste\n- U rdmacore50_0_dr_ste_build_ste_arr\n- U rdmacore50_0_dr_ste_calc_hash_index\n- U rdmacore50_0_dr_ste_copy_param\n- U rdmacore50_0_dr_ste_create_next_htbl\n- U rdmacore50_0_dr_ste_equal_tag\n- U rdmacore50_0_dr_ste_free\n- U rdmacore50_0_dr_ste_get_icm_addr\n- U rdmacore50_0_dr_ste_get_miss_list\n- U rdmacore50_0_dr_ste_get_miss_list_top\n+ U rdmacore50_0_dr_send_ring_force_drain\n U rdmacore50_0_dr_ste_htbl_alloc\n U rdmacore50_0_dr_ste_htbl_free\n- U rdmacore50_0_dr_ste_is_last_in_rule\n- U rdmacore50_0_dr_ste_set_bit_mask\n- U rdmacore50_0_dr_ste_set_formated_ste\n- U rdmacore50_0_dr_ste_set_hit_addr\n- U rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl\n- U rdmacore50_0_dr_ste_set_hit_gvmi\n- U rdmacore50_0_dr_ste_set_miss_addr\n-\n-dbrec.c.o:\n- U free\n- U malloc\n- U memset\n-0000000000000000 t mlx5_alloc_dbrec.cold\n-000000000000000a t mlx5_free_db.cold\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_cl_qmap_get\n- U rdmacore50_0_cl_qmap_insert\n- U rdmacore50_0_cl_qmap_remove_item\n- U rdmacore50_0_mlx5_alloc_buf\n- U rdmacore50_0_mlx5_alloc_buf_extern\n-0000000000000000 T rdmacore50_0_mlx5_alloc_dbrec\n- U rdmacore50_0_mlx5_free_buf\n- U rdmacore50_0_mlx5_free_buf_extern\n-0000000000000260 T rdmacore50_0_mlx5_free_db\n- U rdmacore50_0_mlx5_is_custom_alloc\n- U rdmacore50_0_mlx5_is_extern_alloc\n-\n-dr_arg.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_arg_pool_alloc_objs\n- U free\n- U mlx5dv_devx_obj_destroy\n- U pthread_mutex_destroy\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n-00000000000001c0 T rdmacore50_0_dr_arg_get_obj\n-00000000000001b0 T rdmacore50_0_dr_arg_get_object_id\n-0000000000000390 T rdmacore50_0_dr_arg_mngr_create\n-0000000000000500 T rdmacore50_0_dr_arg_mngr_destroy\n-0000000000000330 T rdmacore50_0_dr_arg_put_obj\n- U rdmacore50_0_dr_devx_create_modify_header_arg\n- U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n- U rdmacore50_0_dr_send_postsend_args\n-\n-dr_ste_v2.c.o:\n-0000000000000000 b ctx_mutex\n-0000000000000000 r dr_ste_v2_action_modify_field_arr\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_dr_ste_get_ctx_v1\n-0000000000000000 T rdmacore50_0_dr_ste_get_ctx_v2\n-0000000000000040 b ste_ctx_v2\n-\n-qp.c.o:\n-0000000000000000 r .LC0\n-0000000000000090 r .LC3\n-0000000000000000 r .LC4\n-0000000000000000 r .LC5\n-0000000000000158 r CSWTCH.171\n-0000000000000140 r CSWTCH.180\n- U __errno_location\n- U __stack_chk_fail\n- U __vfprintf_chk\n-00000000000073f0 t _mlx5_post_send\n- U abort\n-0000000000000164 r bs_selector.0\n- U calloc\n- U free\n- U fwrite\n- U getenv\n- U ibv_qp_to_qp_ex\n- U memcpy\n- U memset\n-0000000000000390 t mlx5_err\n-0000000000000180 r mlx5_ib_opcode\n-0000000000000500 t mlx5_qp_query_sqd\n-00000000000004b0 t mlx5_send_wr_abort\n-0000000000003bd0 t mlx5_send_wr_atomic_cmp_swp\n-0000000000003910 t mlx5_send_wr_atomic_fetch_add\n-0000000000004ab0 t mlx5_send_wr_bind_mw\n-0000000000001170 t mlx5_send_wr_complete\n-0000000000000450 t mlx5_send_wr_complete_error\n-0000000000004f30 t mlx5_send_wr_local_inv\n-0000000000006410 t mlx5_send_wr_mkey_configure\n-00000000000069f0 t mlx5_send_wr_mr_interleaved\n-0000000000006e60 t mlx5_send_wr_mr_list\n-0000000000002f40 t mlx5_send_wr_rdma_read\n-00000000000031b0 t mlx5_send_wr_rdma_write\n-0000000000003680 t mlx5_send_wr_rdma_write_imm\n-0000000000004260 t mlx5_send_wr_send_eth\n-0000000000002ce0 t mlx5_send_wr_send_imm\n-0000000000003420 t mlx5_send_wr_send_inv\n-0000000000002a80 t mlx5_send_wr_send_other\n-00000000000047b0 t mlx5_send_wr_send_tso\n-0000000000001f50 t mlx5_send_wr_set_dc_addr\n-0000000000002070 t mlx5_send_wr_set_dc_addr_stream\n-0000000000001620 t mlx5_send_wr_set_inline_data_eth\n-00000000000024b0 t mlx5_send_wr_set_inline_data_list_eth\n-0000000000000f50 t mlx5_send_wr_set_inline_data_list_rc_uc\n-0000000000002860 t mlx5_send_wr_set_inline_data_list_ud_xrc_dc\n-0000000000000db0 t mlx5_send_wr_set_inline_data_rc_uc\n-0000000000002300 t mlx5_send_wr_set_inline_data_ud_xrc_dc\n-0000000000006350 t mlx5_send_wr_set_mkey_access_flags\n-0000000000005dc0 t mlx5_send_wr_set_mkey_crypto\n-0000000000006030 t mlx5_send_wr_set_mkey_layout\n-0000000000006340 t mlx5_send_wr_set_mkey_layout_interleaved\n-0000000000006800 t mlx5_send_wr_set_mkey_layout_list\n-0000000000005e70 t mlx5_send_wr_set_mkey_sig_block\n-00000000000013b0 t mlx5_send_wr_set_sge_eth\n-0000000000001920 t mlx5_send_wr_set_sge_list_eth\n-0000000000000c40 t mlx5_send_wr_set_sge_list_rc_uc\n-0000000000002190 t mlx5_send_wr_set_sge_list_ud_xrc_dc\n-0000000000000b40 t mlx5_send_wr_set_sge_rc_uc\n-0000000000001e50 t mlx5_send_wr_set_sge_ud_xrc_dc\n-0000000000001d40 t mlx5_send_wr_set_ud_addr\n-0000000000001c50 t mlx5_send_wr_set_xrc_srqn\n-0000000000000670 t mlx5_send_wr_start\n-0000000000000710 t mlx5_umr_fill_sig_bsf\n-00000000000044c0 t mlx5_umr_set_psv\n-00000000000005f0 t mlx5_validate_sig_block_domain\n-0000000000000000 t mlx5_wr_memcpy\n-0000000000003ea0 t mlx5_wr_raw_wqe\n- U mlx5dv_devx_qp_query\n-000000000000a550 T mlx5dv_qp_cancel_posted_send_wrs\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-00000000000092a0 T rdmacore50_0_mlx5_bind_mw\n-000000000000a510 T rdmacore50_0_mlx5_clear_qp\n-0000000000008930 T rdmacore50_0_mlx5_copy_to_recv_wqe\n-0000000000008a30 T rdmacore50_0_mlx5_copy_to_send_wqe\n-000000000000a460 T rdmacore50_0_mlx5_find_qp\n-0000000000008d00 T rdmacore50_0_mlx5_get_atomic_laddr\n- U rdmacore50_0_mlx5_get_cmd_status_err\n-0000000000008ca0 T rdmacore50_0_mlx5_get_send_wqe\n-0000000000008cd0 T rdmacore50_0_mlx5_init_qp_indices\n-0000000000008cc0 T rdmacore50_0_mlx5_init_rwq_indices\n-0000000000009780 T rdmacore50_0_mlx5_post_recv\n-0000000000008d30 T rdmacore50_0_mlx5_post_send\n-0000000000009b80 T rdmacore50_0_mlx5_post_srq_ops\n-00000000000093b0 T rdmacore50_0_mlx5_post_wq_recv\n-0000000000008d40 T rdmacore50_0_mlx5_qp_fill_wr_complete_error\n-0000000000008d60 T rdmacore50_0_mlx5_qp_fill_wr_complete_real\n-0000000000008d80 T rdmacore50_0_mlx5_qp_fill_wr_pfns\n-000000000000a490 T rdmacore50_0_mlx5_store_qp\n-000000000000a420 T rdmacore50_0_mlx5_use_huge\n- U stderr\n-0000000000005230 t umr_wqe_finalize\n+ U rdmacore50_0_dr_ste_htbl_init_and_postsend\n \n dr_vports.c.o:\n U __errno_location\n U __stack_chk_fail\n U _mlx5dv_query_port\n U calloc\n U free\n@@ -1585,537 +2186,14 @@\n 00000000000000a0 T rdmacore50_0_mlx5_free_srq_wqe\n U rdmacore50_0_mlx5_get_alloc_type\n 0000000000000430 T rdmacore50_0_mlx5_post_srq_recv\n 0000000000000bf0 T rdmacore50_0_mlx5_store_srq\n 0000000000000160 T rdmacore50_0_srq_cooldown_wqe\n U stderr\n \n-dr_domain.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n- U free\n- U ibv_alloc_pd\n- U ibv_dealloc_pd\n- U ibv_get_device_name\n- U ibv_query_device\n- U ibv_query_port\n- U mlx5dv_devx_alloc_uar\n- U mlx5dv_devx_free_uar\n-0000000000000c70 T mlx5dv_dr_domain_allow_duplicate_rules\n-00000000000000a0 T mlx5dv_dr_domain_create\n-0000000000000d40 T mlx5dv_dr_domain_destroy\n-0000000000000ba0 T mlx5dv_dr_domain_set_reclaim_device_memory\n-0000000000000ac0 T mlx5dv_dr_domain_sync\n- U mlx5dv_init_obj\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_arg_mngr_create\n- U rdmacore50_0_dr_arg_mngr_destroy\n- U rdmacore50_0_dr_crc32_init_table\n- U rdmacore50_0_dr_devx_query_device\n- U rdmacore50_0_dr_devx_query_esw_caps\n- U rdmacore50_0_dr_devx_query_esw_vport_context\n- U rdmacore50_0_dr_devx_sync_steering\n-0000000000000010 T rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n-0000000000000030 T rdmacore50_0_dr_domain_is_support_ste_icm_size\n-0000000000000000 T rdmacore50_0_dr_domain_is_support_sw_encap\n-0000000000000050 T rdmacore50_0_dr_domain_set_max_ste_icm_size\n- U rdmacore50_0_dr_icm_pool_create\n- U rdmacore50_0_dr_icm_pool_destroy\n- U rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz\n- U rdmacore50_0_dr_icm_pool_sync_pool\n- U rdmacore50_0_dr_ptrn_mngr_create\n- U rdmacore50_0_dr_ptrn_mngr_destroy\n- U rdmacore50_0_dr_ptrn_sync_pool\n- U rdmacore50_0_dr_send_allow_fl\n- U rdmacore50_0_dr_send_ring_alloc\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_dr_send_ring_free\n- U rdmacore50_0_dr_ste_get_ctx\n- U rdmacore50_0_dr_vports_table_add_wire\n- U rdmacore50_0_dr_vports_table_create\n- U rdmacore50_0_dr_vports_table_del_wire\n- U rdmacore50_0_dr_vports_table_destroy\n- U rdmacore50_0_dr_vports_table_get_ib_port_cap\n-\n-verbs.c.o:\n-0000000000000000 r .LC19\n-0000000000000000 r .LC21\n-0000000000000008 r .LC23\n-000000000000000e r .LC26\n-0000000000000021 r .LC27\n-0000000000000010 r .LC33\n-0000000000000000 r .LC34\n-0000000000000018 r .LC38\n-0000000000000020 r .LC39\n-0000000000000028 r .LC40\n-0000000000000030 r .LC41\n-0000000000000029 r .LC43\n-0000000000000031 r .LC44\n-0000000000000039 r .LC45\n-0000000000000041 r .LC46\n-000000000000004e r .LC47\n-0000000000000056 r .LC48\n-000000000000006a r .LC49\n-000000000000007c r .LC50\n-0000000000000000 r .LC53\n-0000000000000083 r .LC54\n-0000000000000090 r .LC55\n-000000000000008b r .LC56\n-0000000000000038 r .LC57\n-000000000000009e r .LC58\n-0000000000000040 r .LC59\n-0000000000000048 r .LC60\n-0000000000000010 r .LC62\n-0000000000000020 r .LC63\n-0000000000000120 r CSWTCH.257\n- U _GLOBAL_OFFSET_TABLE_\n- U __errno_location\n-0000000000000160 r __func__.0\n-0000000000000180 r __func__.2\n- U __memcpy_chk\n-0000000000000fb0 t __mlx5dv_query_port\n- U __snprintf_chk\n- U __stack_chk_fail\n- U __vfprintf_chk\n-00000000000021c0 t _mlx5dv_alloc_dm\n-0000000000000650 t _mlx5dv_alloc_var\n-00000000000020c0 t _mlx5dv_create_cq\n-0000000000001650 t _mlx5dv_create_flow_action_esp\n-00000000000047b0 t _mlx5dv_create_flow_action_modify_header\n-00000000000033d0 t _mlx5dv_create_flow_action_packet_reformat\n-0000000000002970 t _mlx5dv_create_flow_matcher\n-0000000000006470 t _mlx5dv_create_mkey\n-0000000000008240 t _mlx5dv_create_qp\n-0000000000001150 t _mlx5dv_create_steering_anchor\n-00000000000033c0 t _mlx5dv_create_wq\n-0000000000004cd0 t _mlx5dv_crypto_login\n-0000000000004c50 t _mlx5dv_crypto_login_create\n-0000000000003630 t _mlx5dv_crypto_login_destroy\n-0000000000002950 t _mlx5dv_crypto_login_query\n-00000000000028b0 t _mlx5dv_crypto_login_query_state\n-0000000000003690 t _mlx5dv_crypto_logout\n-0000000000005b10 t _mlx5dv_dek_create\n-00000000000035d0 t _mlx5dv_dek_destroy\n-0000000000002bc0 t _mlx5dv_dek_query\n-0000000000000280 t _mlx5dv_destroy_flow_matcher\n-0000000000004da0 t _mlx5dv_destroy_mkey\n-00000000000001c0 t _mlx5dv_destroy_steering_anchor\n-0000000000001400 t _mlx5dv_devx_alloc_uar\n-0000000000003730 t _mlx5dv_devx_cq_modify\n-0000000000004390 t _mlx5dv_devx_cq_query\n-00000000000004a0 t _mlx5dv_devx_create_cmd_comp\n-0000000000000e90 t _mlx5dv_devx_create_event_channel\n-00000000000024b0 t _mlx5dv_devx_destroy_cmd_comp\n-0000000000001770 t _mlx5dv_devx_destroy_event_channel\n-00000000000024d0 t _mlx5dv_devx_free_uar\n-0000000000002540 t _mlx5dv_devx_general_cmd\n-0000000000001b20 t _mlx5dv_devx_get_async_cmd_comp\n-0000000000001790 t _mlx5dv_devx_get_event\n-0000000000004650 t _mlx5dv_devx_ind_tbl_modify\n-00000000000044f0 t _mlx5dv_devx_ind_tbl_query\n-0000000000005070 t _mlx5dv_devx_obj_create\n-0000000000000590 t _mlx5dv_devx_obj_destroy\n-0000000000003b50 t _mlx5dv_devx_obj_modify\n-0000000000003cb0 t _mlx5dv_devx_obj_query\n-0000000000004950 t _mlx5dv_devx_obj_query_async\n-00000000000039f0 t _mlx5dv_devx_qp_modify\n-0000000000003890 t _mlx5dv_devx_qp_query\n-0000000000001090 t _mlx5dv_devx_query_eqn\n-0000000000003f70 t _mlx5dv_devx_srq_modify\n-0000000000003e10 t _mlx5dv_devx_srq_query\n-0000000000002670 t _mlx5dv_devx_subscribe_devx_event\n-00000000000012d0 t _mlx5dv_devx_subscribe_devx_event_fd\n-00000000000017d0 t _mlx5dv_devx_umem_dereg\n-0000000000006250 t _mlx5dv_devx_umem_reg\n-0000000000001890 t _mlx5dv_devx_umem_reg_ex\n-0000000000004230 t _mlx5dv_devx_wq_modify\n-00000000000040d0 t _mlx5dv_devx_wq_query\n-0000000000002cc0 t _mlx5dv_dm_map_op_addr\n-00000000000003f0 t _mlx5dv_free_var\n-00000000000060e0 t _mlx5dv_map_ah_to_qp\n-000000000000dbf0 T _mlx5dv_mkey_check\n-0000000000004e90 t _mlx5dv_pp_alloc\n-0000000000000340 t _mlx5dv_pp_free\n-000000000000cb60 T _mlx5dv_query_port\n- U abort\n- U calloc\n- U close\n-0000000000001b60 t create_cq\n-0000000000006960 t create_qp\n-0000000000000000 t create_qp.cold\n-0000000000002e60 t create_wq\n-0000000000004af0 t crypto_login_create\n-00000000000027b0 t crypto_login_query\n- U free\n- U fwrite\n-0000000000005da0 t get_hca_general_caps\n- U getenv\n-0000000000000190 r ib_to_mlx5_rate_table\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U ibv_query_port\n- U ibv_resolve_eth_l2_from_gid\n- U malloc\n- U memcpy\n- U memset\n-00000000000008b0 t mlx5_alloc_dyn_uar\n-0000000000000dd0 t mlx5_err\n-00000000000007c0 t mlx5_free_uar\n-0000000000000b80 t mlx5_insert_dyn_uuars\n-0000000000002100 t mlx5_memcpy_from_dm\n-0000000000002160 t mlx5_memcpy_to_dm\n-000000000000c3c0 T mlx5dv_alloc_dm\n-000000000000dfa0 T mlx5dv_alloc_var\n-00000000000090e0 T mlx5dv_create_cq\n-000000000000c7a0 T mlx5dv_create_flow\n-000000000000bf60 T mlx5dv_create_flow_action_esp\n-000000000000bfe0 T mlx5dv_create_flow_action_modify_header\n-000000000000c050 T mlx5dv_create_flow_action_packet_reformat\n-000000000000c710 T mlx5dv_create_flow_matcher\n-000000000000db70 T mlx5dv_create_mkey\n-000000000000a820 T mlx5dv_create_qp\n-000000000000c810 T mlx5dv_create_steering_anchor\n-000000000000b7f0 T mlx5dv_create_wq\n-000000000000dd10 T mlx5dv_crypto_login\n-000000000000dde0 T mlx5dv_crypto_login_create\n-000000000000de80 T mlx5dv_crypto_login_destroy\n-000000000000de30 T mlx5dv_crypto_login_query\n-000000000000dd60 T mlx5dv_crypto_login_query_state\n-000000000000ddb0 T mlx5dv_crypto_logout\n-000000000000dec0 T mlx5dv_dek_create\n-000000000000df60 T mlx5dv_dek_destroy\n-000000000000df10 T mlx5dv_dek_query\n-000000000000c760 T mlx5dv_destroy_flow_matcher\n-000000000000dbb0 T mlx5dv_destroy_mkey\n-000000000000c860 T mlx5dv_destroy_steering_anchor\n-000000000000e0e0 T mlx5dv_devx_alloc_msi_vector\n-000000000000cd30 T mlx5dv_devx_alloc_uar\n-000000000000ce70 T mlx5dv_devx_cq_modify\n-000000000000ce10 T mlx5dv_devx_cq_query\n-000000000000d8c0 T mlx5dv_devx_create_cmd_comp\n-000000000000e160 T mlx5dv_devx_create_eq\n-000000000000d920 T mlx5dv_devx_create_event_channel\n-000000000000d900 T mlx5dv_devx_destroy_cmd_comp\n-000000000000e1d0 T mlx5dv_devx_destroy_eq\n-000000000000d970 T mlx5dv_devx_destroy_event_channel\n-000000000000e120 T mlx5dv_devx_free_msi_vector\n-000000000000cd80 T mlx5dv_devx_free_uar\n-000000000000cb00 T mlx5dv_devx_general_cmd\n-000000000000daf0 T mlx5dv_devx_get_async_cmd_comp\n-000000000000db30 T mlx5dv_devx_get_event\n-000000000000d860 T mlx5dv_devx_ind_tbl_modify\n-000000000000d800 T mlx5dv_devx_ind_tbl_query\n-000000000000c9a0 T mlx5dv_devx_obj_create\n-000000000000cad0 T mlx5dv_devx_obj_destroy\n-000000000000ca70 T mlx5dv_devx_obj_modify\n-000000000000ca10 T mlx5dv_devx_obj_query\n-000000000000da70 T mlx5dv_devx_obj_query_async\n-000000000000cf30 T mlx5dv_devx_qp_modify\n-000000000000ced0 T mlx5dv_devx_qp_query\n-000000000000cdc0 T mlx5dv_devx_query_eqn\n-000000000000d6e0 T mlx5dv_devx_srq_modify\n-000000000000d680 T mlx5dv_devx_srq_query\n-000000000000d9b0 T mlx5dv_devx_subscribe_devx_event\n-000000000000da10 T mlx5dv_devx_subscribe_devx_event_fd\n-000000000000c960 T mlx5dv_devx_umem_dereg\n-000000000000c8f0 T mlx5dv_devx_umem_reg\n-000000000000c8a0 T mlx5dv_devx_umem_reg_ex\n-000000000000d7a0 T mlx5dv_devx_wq_modify\n-000000000000d740 T mlx5dv_devx_wq_query\n-000000000000c100 T mlx5dv_dm_map_op_addr\n-000000000000dff0 T mlx5dv_free_var\n-000000000000a7a0 T mlx5dv_map_ah_to_qp\n-000000000000e030 T mlx5dv_pp_alloc\n-000000000000e0a0 T mlx5dv_pp_free\n-000000000000a880 T mlx5dv_qp_ex_from_ibv_qp_ex\n- U mmap\n- U munmap\n- U posix_memalign\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0___mlx5_cq_clean\n-00000000000053f0 T rdmacore50_0__mlx5dv_create_flow\n-000000000000cbc0 T rdmacore50_0_clean_dyn_uars\n- U rdmacore50_0_execute_ioctl\n- U rdmacore50_0_get_random\n- U rdmacore50_0_get_uar_mmap_offset\n- U rdmacore50_0_ibv_cmd_advise_mr\n- U rdmacore50_0_ibv_cmd_alloc_dm\n- U rdmacore50_0_ibv_cmd_alloc_mw\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_close_xrcd\n- U rdmacore50_0_ibv_cmd_create_ah\n- U rdmacore50_0_ibv_cmd_create_counters\n- U rdmacore50_0_ibv_cmd_create_cq_ex\n- U rdmacore50_0_ibv_cmd_create_flow\n- U rdmacore50_0_ibv_cmd_create_flow_action_esp\n- U rdmacore50_0_ibv_cmd_create_qp_ex\n- U rdmacore50_0_ibv_cmd_create_qp_ex2\n- U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_create_srq_ex\n- U rdmacore50_0_ibv_cmd_create_wq\n- U rdmacore50_0_ibv_cmd_dealloc_mw\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_destroy_ah\n- U rdmacore50_0_ibv_cmd_destroy_counters\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_ibv_cmd_destroy_flow\n- U rdmacore50_0_ibv_cmd_destroy_flow_action\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_destroy_wq\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_free_dm\n- U rdmacore50_0_ibv_cmd_modify_cq\n- U rdmacore50_0_ibv_cmd_modify_flow_action_esp\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ibv_cmd_modify_qp_ex\n- U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_modify_wq\n- U rdmacore50_0_ibv_cmd_open_qp\n- U rdmacore50_0_ibv_cmd_open_xrcd\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_mr\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_ibv_cmd_read_counters\n- U rdmacore50_0_ibv_cmd_reg_dm_mr\n- U rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n- U rdmacore50_0_ibv_cmd_reg_mr\n- U rdmacore50_0_ibv_cmd_rereg_mr\n- U rdmacore50_0_ibv_cmd_resize_cq\n- U rdmacore50_0_ibv_query_gid_type\n-0000000000008d50 T rdmacore50_0_mlx5_advise_mr\n- U rdmacore50_0_mlx5_alloc_cq_buf\n- U rdmacore50_0_mlx5_alloc_dbrec\n-000000000000c480 T rdmacore50_0_mlx5_alloc_dm\n-0000000000008f70 T rdmacore50_0_mlx5_alloc_mw\n-0000000000008b70 T rdmacore50_0_mlx5_alloc_null_mr\n-00000000000088a0 T rdmacore50_0_mlx5_alloc_parent_domain\n-0000000000008360 T rdmacore50_0_mlx5_alloc_pd\n- U rdmacore50_0_mlx5_alloc_prefered_buf\n- U rdmacore50_0_mlx5_alloc_srq_buf\n-0000000000008410 T rdmacore50_0_mlx5_alloc_td\n-0000000000008340 T rdmacore50_0_mlx5_async_event\n-000000000000c630 T rdmacore50_0_mlx5_attach_counters_point_flow\n-000000000000a7f0 T rdmacore50_0_mlx5_attach_mcast\n- U rdmacore50_0_mlx5_clear_mkey\n- U rdmacore50_0_mlx5_clear_qp\n- U rdmacore50_0_mlx5_clear_srq\n- U rdmacore50_0_mlx5_clear_uidx\n-000000000000aa10 T rdmacore50_0_mlx5_close_xrcd\n- U rdmacore50_0_mlx5_cq_clean\n- U rdmacore50_0_mlx5_cq_fill_pfns\n- U rdmacore50_0_mlx5_cq_resize_copy_cqes\n-000000000000a400 T rdmacore50_0_mlx5_create_ah\n-000000000000c500 T rdmacore50_0_mlx5_create_counters\n-0000000000009040 T rdmacore50_0_mlx5_create_cq\n-00000000000090d0 T rdmacore50_0_mlx5_create_cq_ex\n-000000000000bae0 T rdmacore50_0_mlx5_create_flow\n-000000000000bee0 T rdmacore50_0_mlx5_create_flow_action_esp\n- U rdmacore50_0_mlx5_create_psv\n-0000000000009980 T rdmacore50_0_mlx5_create_qp\n-000000000000a810 T rdmacore50_0_mlx5_create_qp_ex\n-000000000000bda0 T rdmacore50_0_mlx5_create_rwq_ind_table\n-00000000000094b0 T rdmacore50_0_mlx5_create_srq\n-000000000000aa50 T rdmacore50_0_mlx5_create_srq_ex\n-000000000000b7e0 T rdmacore50_0_mlx5_create_wq\n-0000000000009010 T rdmacore50_0_mlx5_dealloc_mw\n-0000000000008520 T rdmacore50_0_mlx5_dealloc_td\n-0000000000008d20 T rdmacore50_0_mlx5_dereg_mr\n-000000000000a740 T rdmacore50_0_mlx5_destroy_ah\n-000000000000c5b0 T rdmacore50_0_mlx5_destroy_counters\n-0000000000009420 T rdmacore50_0_mlx5_destroy_cq\n-000000000000bd50 T rdmacore50_0_mlx5_destroy_flow\n-000000000000c0c0 T rdmacore50_0_mlx5_destroy_flow_action\n- U rdmacore50_0_mlx5_destroy_psv\n-0000000000009a50 T rdmacore50_0_mlx5_destroy_qp\n-000000000000be50 T rdmacore50_0_mlx5_destroy_rwq_ind_table\n-0000000000009ff0 T rdmacore50_0_mlx5_destroy_srq\n-000000000000b9a0 T rdmacore50_0_mlx5_destroy_wq\n-000000000000a800 T rdmacore50_0_mlx5_detach_mcast\n- U rdmacore50_0_mlx5_free_actual_buf\n- U rdmacore50_0_mlx5_free_cq_buf\n- U rdmacore50_0_mlx5_free_db\n-000000000000c420 T rdmacore50_0_mlx5_free_dm\n-0000000000008970 T rdmacore50_0_mlx5_free_pd\n- U rdmacore50_0_mlx5_get_alloc_type\n- U rdmacore50_0_mlx5_get_cmd_status_err\n- U rdmacore50_0_mlx5_get_dv_ops\n-000000000000a890 T rdmacore50_0_mlx5_get_srq_num\n-000000000000c1a0 T rdmacore50_0_mlx5_import_dm\n-0000000000008f00 T rdmacore50_0_mlx5_import_mr\n-0000000000008d60 T rdmacore50_0_mlx5_import_pd\n- U rdmacore50_0_mlx5_init_qp_indices\n- U rdmacore50_0_mlx5_init_rwq_indices\n-000000000000be80 T rdmacore50_0_mlx5_modify_cq\n-000000000000bfc0 T rdmacore50_0_mlx5_modify_flow_action_esp\n-000000000000d060 T rdmacore50_0_mlx5_modify_qp\n- U rdmacore50_0_mlx5_modify_qp_drain_sigerr\n-000000000000a300 T rdmacore50_0_mlx5_modify_qp_rate_limit\n-0000000000009870 T rdmacore50_0_mlx5_modify_srq\n-000000000000b850 T rdmacore50_0_mlx5_modify_wq\n-000000000000a8a0 T rdmacore50_0_mlx5_open_qp\n-000000000000a950 T rdmacore50_0_mlx5_open_xrcd\n- U rdmacore50_0_mlx5_post_wq_recv\n- U rdmacore50_0_mlx5_qp_fill_wr_complete_error\n- U rdmacore50_0_mlx5_qp_fill_wr_complete_real\n- U rdmacore50_0_mlx5_qp_fill_wr_pfns\n-000000000000b440 T rdmacore50_0_mlx5_query_device_ctx\n-000000000000b210 T rdmacore50_0_mlx5_query_device_ex\n-0000000000009960 T rdmacore50_0_mlx5_query_ece\n-00000000000082f0 T rdmacore50_0_mlx5_query_port\n-000000000000a260 T rdmacore50_0_mlx5_query_qp\n-000000000000a0f0 T rdmacore50_0_mlx5_query_qp_data_in_order\n-0000000000008250 T rdmacore50_0_mlx5_query_rt_values\n-00000000000098b0 T rdmacore50_0_mlx5_query_srq\n-000000000000c700 T rdmacore50_0_mlx5_read_counters\n-0000000000008c00 T rdmacore50_0_mlx5_reg_dm_mr\n-0000000000008ae0 T rdmacore50_0_mlx5_reg_dmabuf_mr\n-0000000000008a20 T rdmacore50_0_mlx5_reg_mr\n-0000000000008cc0 T rdmacore50_0_mlx5_rereg_mr\n-0000000000009140 T rdmacore50_0_mlx5_resize_cq\n-000000000000e210 T rdmacore50_0_mlx5_set_dv_ctx_ops\n-00000000000098f0 T rdmacore50_0_mlx5_set_ece\n-00000000000085c0 T rdmacore50_0_mlx5_set_singleton_nc_uar\n-0000000000000000 B rdmacore50_0_mlx5_single_threaded\n- U rdmacore50_0_mlx5_store_mkey\n- U rdmacore50_0_mlx5_store_qp\n- U rdmacore50_0_mlx5_store_srq\n- U rdmacore50_0_mlx5_store_uidx\n-000000000000c160 T rdmacore50_0_mlx5_unimport_dm\n-0000000000008f60 T rdmacore50_0_mlx5_unimport_mr\n-0000000000008e90 T rdmacore50_0_mlx5_unimport_pd\n- U rdmacore50_0_mlx5_use_huge\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n- U rdmacore50_0_verbs_init_cq\n- U read\n-0000000000000000 t sq_overhead\n- U stderr\n- U strtol\n-\n-dr_send.c.o:\n-0000000000000000 r .LC0\n-0000000000000008 r .LC1\n-0000000000000010 r .LC2\n-0000000000000018 r .LC3\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-00000000000002b0 t dr_postsend_icm_data\n-0000000000000000 t dr_rdma_segments\n- U free\n- U ibv_create_cq\n- U ibv_dereg_mr\n- U ibv_destroy_cq\n- U ibv_reg_mr\n- U malloc\n- U memcpy\n- U memset\n- U mlx5dv_devx_obj_destroy\n- U mlx5dv_devx_umem_dereg\n- U mlx5dv_devx_umem_reg\n- U mlx5dv_init_obj\n- U posix_memalign\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_devx_create_qp\n- U rdmacore50_0_dr_devx_modify_qp_init2rtr\n- U rdmacore50_0_dr_devx_modify_qp_rst2init\n- U rdmacore50_0_dr_devx_modify_qp_rtr2rts\n- U rdmacore50_0_dr_devx_query_gid\n- U rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n- U rdmacore50_0_dr_icm_pool_get_chunk_rkey\n-0000000000001320 T rdmacore50_0_dr_send_allow_fl\n-0000000000000680 T rdmacore50_0_dr_send_fill_and_append_ste_send_info\n-0000000000001050 T rdmacore50_0_dr_send_postsend_action\n-0000000000001230 T rdmacore50_0_dr_send_postsend_args\n-0000000000000d70 T rdmacore50_0_dr_send_postsend_formated_htbl\n-00000000000007c0 T rdmacore50_0_dr_send_postsend_htbl\n-0000000000001150 T rdmacore50_0_dr_send_postsend_pattern\n-00000000000006f0 T rdmacore50_0_dr_send_postsend_ste\n-0000000000001420 T rdmacore50_0_dr_send_ring_alloc\n-0000000000001d60 T rdmacore50_0_dr_send_ring_force_drain\n-0000000000001340 T rdmacore50_0_dr_send_ring_free\n- U rdmacore50_0_dr_ste_get_mr_addr\n- U rdmacore50_0_dr_ste_prepare_for_postsend\n- U sysconf\n-\n-dr_dbg.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000070 r .LC10\n-0000000000000058 r .LC11\n-000000000000008a r .LC12\n-00000000000000a2 r .LC13\n-00000000000000b5 r .LC14\n-00000000000000ba r .LC15\n-00000000000000ca r .LC16\n-00000000000000e5 r .LC17\n-00000000000000fa r .LC18\n-0000000000000080 r .LC19\n-0000000000000005 r .LC2\n-0000000000000110 r .LC20\n-0000000000000112 r .LC21\n-00000000000000a8 r .LC22\n-00000000000000d0 r .LC23\n-0000000000000100 r .LC24\n-000000000000011c r .LC25\n-0000000000000132 r .LC26\n-000000000000013c r .LC27\n-0000000000000140 r .LC28\n-0000000000000142 r .LC29\n-0000000000000030 r .LC3\n-0000000000000146 r .LC30\n-0000000000000149 r .LC31\n-0000000000000018 r .LC4\n-0000000000000021 r .LC5\n-0000000000000033 r .LC6\n-0000000000000051 r .LC7\n-000000000000005a r .LC8\n-0000000000000065 r .LC9\n- U __fprintf_chk\n- U __sprintf_chk\n- U __stack_chk_fail\n-0000000000000000 t dr_dump_domain\n-00000000000010d0 t dr_dump_matcher\n-0000000000000c20 t dr_dump_matcher_mask\n-0000000000000330 t dr_dump_matcher_rx_tx\n-00000000000005c0 t dr_dump_rule\n-0000000000000470 t dr_dump_rule_rx_tx.isra.0\n-0000000000000b20 t dr_dump_table\n- U fputc\n- U getpid\n-0000000000001190 T mlx5dv_dump_dr_domain\n-0000000000001590 T mlx5dv_dump_dr_matcher\n-0000000000001710 T mlx5dv_dump_dr_rule\n-00000000000013b0 T mlx5dv_dump_dr_table\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_actions_reformat_get_id\n- U rdmacore50_0_dr_arg_get_object_id\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_rule_get_reverse_rule_members\n- U rdmacore50_0_dr_ste_get_icm_addr\n-\n dr_devx.c.o:\n 0000000000000000 r .LC0\n 0000000000000008 r .LC1\n 0000000000000040 r .LC10\n 0000000000000010 r .LC3\n 0000000000000018 r .LC5\n 0000000000000020 r .LC6\n@@ -2152,223 +2230,145 @@\n 0000000000000b80 T rdmacore50_0_dr_devx_query_flow_table\n 0000000000001d70 T rdmacore50_0_dr_devx_query_gid\n 00000000000000e0 T rdmacore50_0_dr_devx_query_gvmi\n 0000000000001720 T rdmacore50_0_dr_devx_query_meter\n 00000000000009a0 T rdmacore50_0_dr_devx_sync_steering\n U rdmacore50_0_mlx5_get_cmd_status_err\n \n-dr_icm_pool.c.o:\n-0000000000000000 r .LC0\n-0000000000000008 r .LC1\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_icm_buddy_destroy\n-0000000000000160 t dr_icm_pool_sync_pool_buddies\n- U free\n- U ibv_dereg_mr\n- U malloc\n- U memset\n- U mlx5dv_alloc_dm\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_buddy_alloc_mem\n- U rdmacore50_0_dr_buddy_cleanup\n- U rdmacore50_0_dr_buddy_free_mem\n- U rdmacore50_0_dr_buddy_init\n- U rdmacore50_0_dr_devx_sync_steering\n-00000000000003f0 T rdmacore50_0_dr_icm_alloc_chunk\n-0000000000000a90 T rdmacore50_0_dr_icm_free_chunk\n-0000000000000c00 T rdmacore50_0_dr_icm_pool_create\n-0000000000000d40 T rdmacore50_0_dr_icm_pool_destroy\n-0000000000000b50 T rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n-0000000000000ba0 T rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n-0000000000000be0 T rdmacore50_0_dr_icm_pool_get_chunk_rkey\n-0000000000000b20 T rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz\n-00000000000003a0 T rdmacore50_0_dr_icm_pool_sync_pool\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_mlx5_free_dm\n-\n-dr_matcher.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_mask_is_tnl_gtpu_flex_parser_0\n-00000000000000a0 t dr_mask_is_tnl_gtpu_flex_parser_1\n-0000000000002350 t dr_matcher_connect\n-0000000000000140 t dr_matcher_copy_mask\n-00000000000024d0 t dr_matcher_init_nic\n-0000000000000460 t dr_matcher_is_mask_consumed\n-00000000000002f0 t dr_matcher_set_nic_matcher_layout\n-00000000000005d0 t dr_matcher_set_ste_builders\n-00000000000025c0 t dr_matcher_uninit_nic\n- U free\n- U memcmp\n- U memcpy\n- U mlx5dv_create_flow_matcher\n- U mlx5dv_destroy_flow_matcher\n- U mlx5dv_devx_obj_destroy\n-0000000000002710 T mlx5dv_dr_matcher_create\n-0000000000002e60 T mlx5dv_dr_matcher_destroy\n-0000000000002660 T mlx5dv_dr_matcher_set_layout\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_devx_create_definer\n- U rdmacore50_0_dr_domain_is_support_ste_icm_size\n- U rdmacore50_0_dr_domain_set_max_ste_icm_size\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_rule_rehash_matcher_s_anchor\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_dr_ste_build_def0\n- U rdmacore50_0_dr_ste_build_def16\n- U rdmacore50_0_dr_ste_build_def2\n- U rdmacore50_0_dr_ste_build_def22\n- U rdmacore50_0_dr_ste_build_def24\n- U rdmacore50_0_dr_ste_build_def25\n- U rdmacore50_0_dr_ste_build_def26\n- U rdmacore50_0_dr_ste_build_def28\n- U rdmacore50_0_dr_ste_build_def33\n- U rdmacore50_0_dr_ste_build_def6\n- U rdmacore50_0_dr_ste_build_empty_always_hit\n- U rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4\n- U rdmacore50_0_dr_ste_build_eth_l2_dst\n- U rdmacore50_0_dr_ste_build_eth_l2_src\n- U rdmacore50_0_dr_ste_build_eth_l2_src_dst\n- U rdmacore50_0_dr_ste_build_eth_l2_tnl\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv4_misc\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv6_dst\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv6_src\n- U rdmacore50_0_dr_ste_build_eth_l4_misc\n- U rdmacore50_0_dr_ste_build_flex_parser_0\n- U rdmacore50_0_dr_ste_build_flex_parser_1\n- U rdmacore50_0_dr_ste_build_general_purpose\n- U rdmacore50_0_dr_ste_build_ib_l4\n- U rdmacore50_0_dr_ste_build_icmp\n- U rdmacore50_0_dr_ste_build_mpls\n- U rdmacore50_0_dr_ste_build_pre_check\n- U rdmacore50_0_dr_ste_build_register_0\n- U rdmacore50_0_dr_ste_build_register_1\n- U rdmacore50_0_dr_ste_build_src_gvmi_qpn\n- U rdmacore50_0_dr_ste_build_tnl_geneve\n- U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt\n- U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n- U rdmacore50_0_dr_ste_build_tnl_gre\n- U rdmacore50_0_dr_ste_build_tnl_gtpu\n- U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0\n- U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1\n- U rdmacore50_0_dr_ste_build_tnl_mpls_over_gre\n- U rdmacore50_0_dr_ste_build_tnl_mpls_over_udp\n- U rdmacore50_0_dr_ste_build_tnl_vxlan_gpe\n- U rdmacore50_0_dr_ste_build_tunnel_header\n- U rdmacore50_0_dr_ste_copy_param\n- U rdmacore50_0_dr_ste_htbl_alloc\n- U rdmacore50_0_dr_ste_htbl_free\n- U rdmacore50_0_dr_ste_htbl_init_and_postsend\n-\n-dr_table.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_table_init_nic\n-00000000000000c0 t dr_table_uninit\n- U free\n- U mlx5dv_devx_obj_destroy\n-0000000000000110 T mlx5dv_dr_table_create\n-0000000000000440 T mlx5dv_dr_table_destroy\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_devx_create_flow_table\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_dr_ste_htbl_alloc\n- U rdmacore50_0_dr_ste_htbl_free\n- U rdmacore50_0_dr_ste_htbl_init_and_postsend\n-\n-buf.c.o:\n+cq.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n-000000000000006b r .LC10\n-0000000000000084 r .LC11\n-0000000000000015 r .LC2\n-0000000000000023 r .LC3\n-0000000000000028 r .LC4\n-000000000000002d r .LC5\n-0000000000000034 r .LC6\n-0000000000000042 r .LC7\n-000000000000004e r .LC8\n-0000000000000052 r .LC9\n- U __errno_location\n- U __snprintf_chk\n- U __sprintf_chk\n+0000000000000000 r .LC2\n+0000000000000090 r .LC3\n+0000000000000015 r .LC4\n+0000000000000032 r .LC6\n+00000000000000b8 r .LC7\n+0000000000000050 r .LC8\n+0000000000000058 r .LC9\n+0000000000000980 r CSWTCH.108\n+0000000000000590 t __mlx5_cq_clean.part.0\n U __stack_chk_fail\n U __vfprintf_chk\n U abort\n- U calloc\n- U free\n+00000000000004f0 t dump_cqe\n U fwrite\n- U getenv\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U malloc\n-0000000000000000 t mlx5_err\n- U mmap\n- U munmap\n- U posix_memalign\n+0000000000000bf0 t handle_tag_matching\n+ U memcpy\n+ U memset\n+0000000000000910 t mlx5_cq_read_flow_tag\n+0000000000000350 t mlx5_cq_read_wc_byte_len\n+0000000000000230 t mlx5_cq_read_wc_completion_ts\n+0000000000000250 t mlx5_cq_read_wc_completion_wallclock_ns\n+0000000000000550 t mlx5_cq_read_wc_cvlan\n+0000000000000030 t mlx5_cq_read_wc_dlid_path_bits\n+0000000000000370 t mlx5_cq_read_wc_flags\n+0000000000000330 t mlx5_cq_read_wc_imm_data\n+0000000000000100 t mlx5_cq_read_wc_opcode\n+0000000000000310 t mlx5_cq_read_wc_qp_num\n+0000000000000010 t mlx5_cq_read_wc_sl\n+0000000000000570 t mlx5_cq_read_wc_slid\n+00000000000002f0 t mlx5_cq_read_wc_src_qp\n+00000000000002d0 t mlx5_cq_read_wc_tm_info\n+0000000000000000 t mlx5_cq_read_wc_vendor_err\n+0000000000000930 t mlx5_end_poll\n+0000000000000990 t mlx5_end_poll_adaptive_stall\n+0000000000000b00 t mlx5_end_poll_adaptive_stall_lock\n+0000000000000a50 t mlx5_end_poll_lock\n+0000000000000950 t mlx5_end_poll_stall\n+0000000000000a90 t mlx5_end_poll_stall_lock\n+0000000000000430 t mlx5_err\n+00000000000000c0 t mlx5_find_uidx\n+0000000000001970 t mlx5_next_poll_adaptive_v0\n+000000000000d740 t mlx5_next_poll_adaptive_v1\n+0000000000000fa0 t mlx5_next_poll_v0\n+000000000000cce0 t mlx5_next_poll_v1\n+0000000000010c40 t mlx5_start_poll_adaptive_stall_v0\n+0000000000012cb0 t mlx5_start_poll_adaptive_stall_v0_clock_update\n+0000000000004f40 t mlx5_start_poll_adaptive_stall_v0_lock\n+0000000000007130 t mlx5_start_poll_adaptive_stall_v0_lock_clock_update\n+0000000000005b10 t mlx5_start_poll_adaptive_stall_v1\n+0000000000007cf0 t mlx5_start_poll_adaptive_stall_v1_clock_update\n+000000000000a020 t mlx5_start_poll_adaptive_stall_v1_lock\n+000000000000ac50 t mlx5_start_poll_adaptive_stall_v1_lock_clock_update\n+000000000000e190 t mlx5_start_poll_stall_v0\n+000000000000ec30 t mlx5_start_poll_stall_v0_clock_update\n+0000000000013790 t mlx5_start_poll_stall_v0_lock\n+0000000000002e00 t mlx5_start_poll_stall_v0_lock_clock_update\n+0000000000002360 t mlx5_start_poll_stall_v1\n+0000000000003980 t mlx5_start_poll_stall_v1_clock_update\n+0000000000008800 t mlx5_start_poll_stall_v1_lock\n+0000000000009400 t mlx5_start_poll_stall_v1_lock_clock_update\n+000000000000b8a0 t mlx5_start_poll_v0\n+000000000000c2b0 t mlx5_start_poll_v0_clock_update\n+000000000000f6e0 t mlx5_start_poll_v0_lock\n+0000000000011710 t mlx5_start_poll_v0_lock_clock_update\n+00000000000101d0 t mlx5_start_poll_v1\n+0000000000012220 t mlx5_start_poll_v1_clock_update\n+0000000000004450 t mlx5_start_poll_v1_lock\n+00000000000065f0 t mlx5_start_poll_v1_lock_clock_update\n+ U mlx5dv_get_clock_info\n+0000000000000050 t next_cqe_sw\n+0000000000000000 d ops\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n U pthread_spin_lock\n U pthread_spin_unlock\n- U rdmacore50_0_bitmap_fill_region\n- U rdmacore50_0_bitmap_find_free_region\n- U rdmacore50_0_bitmap_zero_region\n-0000000000000f60 T rdmacore50_0_mlx5_alloc_buf\n-00000000000005f0 T rdmacore50_0_mlx5_alloc_buf_contig\n-0000000000000100 T rdmacore50_0_mlx5_alloc_buf_extern\n-0000000000000840 T rdmacore50_0_mlx5_alloc_prefered_buf\n-0000000000000180 T rdmacore50_0_mlx5_free_actual_buf\n-0000000000000fe0 T rdmacore50_0_mlx5_free_buf\n-0000000000000f30 T rdmacore50_0_mlx5_free_buf_contig\n-00000000000000c0 T rdmacore50_0_mlx5_free_buf_extern\n-0000000000000450 T rdmacore50_0_mlx5_get_alloc_type\n-0000000000000400 T rdmacore50_0_mlx5_is_custom_alloc\n-0000000000000430 T rdmacore50_0_mlx5_is_extern_alloc\n- U shmat\n- U shmctl\n- U shmdt\n- U shmget\n+0000000000016220 T rdmacore50_0___mlx5_cq_clean\n+0000000000016610 T rdmacore50_0_mlx5_alloc_cq_buf\n+ U rdmacore50_0_mlx5_alloc_prefered_buf\n+00000000000161a0 T rdmacore50_0_mlx5_arm_cq\n+ U rdmacore50_0_mlx5_complete_odp_fault\n+ U rdmacore50_0_mlx5_copy_to_recv_srq\n+ U rdmacore50_0_mlx5_copy_to_recv_wqe\n+ U rdmacore50_0_mlx5_copy_to_send_wqe\n+0000000000016250 T rdmacore50_0_mlx5_cq_clean\n+0000000000016210 T rdmacore50_0_mlx5_cq_event\n+0000000000015fa0 T rdmacore50_0_mlx5_cq_fill_pfns\n+0000000000016310 T rdmacore50_0_mlx5_cq_resize_copy_cqes\n+ U rdmacore50_0_mlx5_find_mkey\n+ U rdmacore50_0_mlx5_find_qp\n+ U rdmacore50_0_mlx5_find_srq\n+ U rdmacore50_0_mlx5_free_actual_buf\n+0000000000016780 T rdmacore50_0_mlx5_free_cq_buf\n+ U rdmacore50_0_mlx5_free_srq_wqe\n+ U rdmacore50_0_mlx5_freeze_on_error_cqe\n+ U rdmacore50_0_mlx5_get_alloc_type\n+0000000000014360 T rdmacore50_0_mlx5_poll_cq\n+0000000000015100 T rdmacore50_0_mlx5_poll_cq_v1\n+0000000000000000 D rdmacore50_0_mlx5_stall_cq_dec_step\n+0000000000000004 D rdmacore50_0_mlx5_stall_cq_inc_step\n+0000000000000008 D rdmacore50_0_mlx5_stall_cq_poll_max\n+000000000000000c D rdmacore50_0_mlx5_stall_cq_poll_min\n+0000000000000010 D rdmacore50_0_mlx5_stall_num_loop\n+ U rdmacore50_0_mlx5_use_huge\n+ U sleep\n U stderr\n- U strcasecmp\n- U strerror\n- U strtol\n-\n-dr_crc32.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-0000000000000020 r .LC2\n-0000000000000030 r .LC3\n-0000000000000040 r .LC4\n-0000000000000000 b dr_ste_crc_tab32\n-0000000000000000 T rdmacore50_0_dr_crc32_init_table\n-0000000000000400 T rdmacore50_0_dr_crc32_slice8_calc\n \n-dr_ptrn.c.o:\n+dr_arg.c.o:\n U __errno_location\n+ U __stack_chk_fail\n U calloc\n+0000000000000000 t dr_arg_pool_alloc_objs\n U free\n- U ibv_get_device_name\n- U memcpy\n+ U mlx5dv_devx_obj_destroy\n+ U pthread_mutex_destroy\n+ U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n+00000000000001c0 T rdmacore50_0_dr_arg_get_obj\n+00000000000001b0 T rdmacore50_0_dr_arg_get_object_id\n+0000000000000390 T rdmacore50_0_dr_arg_mngr_create\n+0000000000000500 T rdmacore50_0_dr_arg_mngr_destroy\n+0000000000000330 T rdmacore50_0_dr_arg_put_obj\n+ U rdmacore50_0_dr_devx_create_modify_header_arg\n U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n- U rdmacore50_0_dr_icm_alloc_chunk\n- U rdmacore50_0_dr_icm_free_chunk\n- U rdmacore50_0_dr_icm_pool_create\n- U rdmacore50_0_dr_icm_pool_destroy\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_icm_pool_sync_pool\n-0000000000000010 T rdmacore50_0_dr_ptrn_cache_get_pattern\n-0000000000000370 T rdmacore50_0_dr_ptrn_cache_put_pattern\n-00000000000003d0 T rdmacore50_0_dr_ptrn_mngr_create\n-0000000000000460 T rdmacore50_0_dr_ptrn_mngr_destroy\n-0000000000000000 T rdmacore50_0_dr_ptrn_sync_pool\n- U rdmacore50_0_dr_send_postsend_pattern\n+ U rdmacore50_0_dr_send_postsend_args\n+\n+dr_buddy.c.o:\n+ U __errno_location\n+ U calloc\n+ U free\n+ U rdmacore50_0_bitmap_find_first_bit\n+0000000000000250 T rdmacore50_0_dr_buddy_alloc_mem\n+00000000000001e0 T rdmacore50_0_dr_buddy_cleanup\n+0000000000000400 T rdmacore50_0_dr_buddy_free_mem\n+0000000000000000 T rdmacore50_0_dr_buddy_init\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,27 +1,27 @@\n ---------- 0 0 0 15454 1970-01-01 00:00:00.000000 /\n ?rw-r--r-- 0 0 0 30392 1970-01-01 00:00:00.000000 dr_ste_v0.c.o\n-?rw-r--r-- 0 0 0 146720 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 33456 1970-01-01 00:00:00.000000 dr_action.c.o\n ?rw-r--r-- 0 0 0 55712 1970-01-01 00:00:00.000000 dr_ste_v1.c.o\n-?rw-r--r-- 0 0 0 3672 1970-01-01 00:00:00.000000 dr_buddy.c.o\n-?rw-r--r-- 0 0 0 85472 1970-01-01 00:00:00.000000 mlx5_vfio.c.o\n-?rw-r--r-- 0 0 0 48512 1970-01-01 00:00:00.000000 mlx5.c.o\n-?rw-r--r-- 0 0 0 19080 1970-01-01 00:00:00.000000 dr_rule.c.o\n+?rw-r--r-- 0 0 0 21896 1970-01-01 00:00:00.000000 dr_matcher.c.o\n ?rw-r--r-- 0 0 0 3880 1970-01-01 00:00:00.000000 dbrec.c.o\n-?rw-r--r-- 0 0 0 4712 1970-01-01 00:00:00.000000 dr_arg.c.o\n+?rw-r--r-- 0 0 0 117640 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 19080 1970-01-01 00:00:00.000000 dr_rule.c.o\n+?rw-r--r-- 0 0 0 85472 1970-01-01 00:00:00.000000 mlx5_vfio.c.o\n+?rw-r--r-- 0 0 0 3256 1970-01-01 00:00:00.000000 dr_crc32.c.o\n+?rw-r--r-- 0 0 0 11464 1970-01-01 00:00:00.000000 buf.c.o\n ?rw-r--r-- 0 0 0 3320 1970-01-01 00:00:00.000000 dr_ste_v2.c.o\n+?rw-r--r-- 0 0 0 15648 1970-01-01 00:00:00.000000 dr_dbg.c.o\n+?rw-r--r-- 0 0 0 10608 1970-01-01 00:00:00.000000 dr_domain.c.o\n+?rw-r--r-- 0 0 0 15624 1970-01-01 00:00:00.000000 dr_send.c.o\n+?rw-r--r-- 0 0 0 33456 1970-01-01 00:00:00.000000 dr_action.c.o\n ?rw-r--r-- 0 0 0 62336 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 4504 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n+?rw-r--r-- 0 0 0 8688 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n+?rw-r--r-- 0 0 0 48512 1970-01-01 00:00:00.000000 mlx5.c.o\n+?rw-r--r-- 0 0 0 4288 1970-01-01 00:00:00.000000 dr_table.c.o\n ?rw-r--r-- 0 0 0 4352 1970-01-01 00:00:00.000000 dr_vports.c.o\n ?rw-r--r-- 0 0 0 26976 1970-01-01 00:00:00.000000 dr_ste.c.o\n ?rw-r--r-- 0 0 0 7344 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r-- 0 0 0 10608 1970-01-01 00:00:00.000000 dr_domain.c.o\n-?rw-r--r-- 0 0 0 117640 1970-01-01 00:00:00.000000 verbs.c.o\n-?rw-r--r-- 0 0 0 15624 1970-01-01 00:00:00.000000 dr_send.c.o\n-?rw-r--r-- 0 0 0 15648 1970-01-01 00:00:00.000000 dr_dbg.c.o\n ?rw-r--r-- 0 0 0 15800 1970-01-01 00:00:00.000000 dr_devx.c.o\n-?rw-r--r-- 0 0 0 8688 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n-?rw-r--r-- 0 0 0 21896 1970-01-01 00:00:00.000000 dr_matcher.c.o\n-?rw-r--r-- 0 0 0 4288 1970-01-01 00:00:00.000000 dr_table.c.o\n-?rw-r--r-- 0 0 0 11464 1970-01-01 00:00:00.000000 buf.c.o\n-?rw-r--r-- 0 0 0 3256 1970-01-01 00:00:00.000000 dr_crc32.c.o\n-?rw-r--r-- 0 0 0 4504 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n+?rw-r--r-- 0 0 0 146720 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 4712 1970-01-01 00:00:00.000000 dr_arg.c.o\n+?rw-r--r-- 0 0 0 3672 1970-01-01 00:00:00.000000 dr_buddy.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmthca-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libmthca-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,17 +1,30 @@\n \n Archive index:\n-rdmacore50_0_mthca_poll_cq in cq.c.o\n-rdmacore50_0_mthca_tavor_arm_cq in cq.c.o\n-rdmacore50_0_mthca_arbel_arm_cq in cq.c.o\n-rdmacore50_0_mthca_arbel_cq_event in cq.c.o\n-rdmacore50_0___mthca_cq_clean in cq.c.o\n-rdmacore50_0_mthca_cq_clean in cq.c.o\n-rdmacore50_0_mthca_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mthca_alloc_cq_buf in cq.c.o\n+rdmacore50_0_mthca_query_device in verbs.c.o\n+rdmacore50_0_mthca_query_port in verbs.c.o\n+rdmacore50_0_mthca_alloc_pd in verbs.c.o\n+rdmacore50_0_mthca_free_pd in verbs.c.o\n+rdmacore50_0_mthca_reg_mr in verbs.c.o\n+rdmacore50_0_mthca_dereg_mr in verbs.c.o\n+rdmacore50_0_mthca_create_cq in verbs.c.o\n+rdmacore50_0_mthca_resize_cq in verbs.c.o\n+rdmacore50_0_mthca_destroy_cq in verbs.c.o\n+rdmacore50_0_mthca_create_srq in verbs.c.o\n+rdmacore50_0_mthca_modify_srq in verbs.c.o\n+rdmacore50_0_mthca_query_srq in verbs.c.o\n+rdmacore50_0_mthca_destroy_srq in verbs.c.o\n+rdmacore50_0_mthca_create_qp in verbs.c.o\n+rdmacore50_0_mthca_query_qp in verbs.c.o\n+rdmacore50_0_mthca_modify_qp in verbs.c.o\n+rdmacore50_0_mthca_destroy_qp in verbs.c.o\n+rdmacore50_0_mthca_create_ah in verbs.c.o\n+rdmacore50_0_mthca_destroy_ah in verbs.c.o\n+rdmacore50_0_mthca_alloc_buf in buf.c.o\n+rdmacore50_0_mthca_free_buf in buf.c.o\n rdmacore50_0_mthca_alloc_db in memfree.c.o\n rdmacore50_0_mthca_set_db_qn in memfree.c.o\n rdmacore50_0_mthca_free_db in memfree.c.o\n rdmacore50_0_mthca_alloc_db_tab in memfree.c.o\n rdmacore50_0_mthca_free_db_tab in memfree.c.o\n rdmacore50_0_mthca_alloc_av in ah.c.o\n rdmacore50_0_mthca_free_av in ah.c.o\n@@ -25,56 +38,97 @@\n rdmacore50_0_mthca_store_qp in qp.c.o\n rdmacore50_0_mthca_clear_qp in qp.c.o\n rdmacore50_0_mthca_free_err_wqe in qp.c.o\n rdmacore50_0_mthca_free_srq_wqe in srq.c.o\n rdmacore50_0_mthca_tavor_post_srq_recv in srq.c.o\n rdmacore50_0_mthca_arbel_post_srq_recv in srq.c.o\n rdmacore50_0_mthca_alloc_srq_buf in srq.c.o\n+rdmacore50_0_mthca_poll_cq in cq.c.o\n+rdmacore50_0_mthca_tavor_arm_cq in cq.c.o\n+rdmacore50_0_mthca_arbel_arm_cq in cq.c.o\n+rdmacore50_0_mthca_arbel_cq_event in cq.c.o\n+rdmacore50_0___mthca_cq_clean in cq.c.o\n+rdmacore50_0_mthca_cq_clean in cq.c.o\n+rdmacore50_0_mthca_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mthca_alloc_cq_buf in cq.c.o\n verbs_provider_mthca in mthca.c.o\n-rdmacore50_0_mthca_query_device in verbs.c.o\n-rdmacore50_0_mthca_query_port in verbs.c.o\n-rdmacore50_0_mthca_alloc_pd in verbs.c.o\n-rdmacore50_0_mthca_free_pd in verbs.c.o\n-rdmacore50_0_mthca_reg_mr in verbs.c.o\n-rdmacore50_0_mthca_dereg_mr in verbs.c.o\n-rdmacore50_0_mthca_create_cq in verbs.c.o\n-rdmacore50_0_mthca_resize_cq in verbs.c.o\n-rdmacore50_0_mthca_destroy_cq in verbs.c.o\n-rdmacore50_0_mthca_create_srq in verbs.c.o\n-rdmacore50_0_mthca_modify_srq in verbs.c.o\n-rdmacore50_0_mthca_query_srq in verbs.c.o\n-rdmacore50_0_mthca_destroy_srq in verbs.c.o\n-rdmacore50_0_mthca_create_qp in verbs.c.o\n-rdmacore50_0_mthca_query_qp in verbs.c.o\n-rdmacore50_0_mthca_modify_qp in verbs.c.o\n-rdmacore50_0_mthca_destroy_qp in verbs.c.o\n-rdmacore50_0_mthca_create_ah in verbs.c.o\n-rdmacore50_0_mthca_destroy_ah in verbs.c.o\n-rdmacore50_0_mthca_alloc_buf in buf.c.o\n-rdmacore50_0_mthca_free_buf in buf.c.o\n \n-cq.c.o:\n+verbs.c.o:\n 0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __printf_chk\n+0000000000000000 r .LC2\n+ U __snprintf_chk\n U __stack_chk_fail\n+ U free\n+ U malloc\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U pthread_spin_init\n U pthread_spin_lock\n U pthread_spin_unlock\n-00000000000008a0 T rdmacore50_0___mthca_cq_clean\n- U rdmacore50_0_mthca_alloc_buf\n-0000000000000c60 T rdmacore50_0_mthca_alloc_cq_buf\n-0000000000000800 T rdmacore50_0_mthca_arbel_arm_cq\n-0000000000000890 T rdmacore50_0_mthca_arbel_cq_event\n-0000000000000b70 T rdmacore50_0_mthca_cq_clean\n-0000000000000bc0 T rdmacore50_0_mthca_cq_resize_copy_cqes\n- U rdmacore50_0_mthca_find_qp\n- U rdmacore50_0_mthca_free_err_wqe\n- U rdmacore50_0_mthca_free_srq_wqe\n-0000000000000000 T rdmacore50_0_mthca_poll_cq\n-00000000000007c0 T rdmacore50_0_mthca_tavor_arm_cq\n+ U rdmacore50_0___mthca_cq_clean\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_create_cq\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_srq\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ibv_cmd_modify_srq\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_query_qp\n+ U rdmacore50_0_ibv_cmd_query_srq\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+ U rdmacore50_0_ibv_cmd_resize_cq\n+ U rdmacore50_0_mthca_alloc_av\n+ U rdmacore50_0_mthca_alloc_cq_buf\n+ U rdmacore50_0_mthca_alloc_db\n+00000000000000f0 T rdmacore50_0_mthca_alloc_pd\n+ U rdmacore50_0_mthca_alloc_qp_buf\n+ U rdmacore50_0_mthca_alloc_srq_buf\n+ U rdmacore50_0_mthca_clear_qp\n+ U rdmacore50_0_mthca_cq_clean\n+ U rdmacore50_0_mthca_cq_resize_copy_cqes\n+0000000000001520 T rdmacore50_0_mthca_create_ah\n+00000000000002d0 T rdmacore50_0_mthca_create_cq\n+0000000000000d30 T rdmacore50_0_mthca_create_qp\n+0000000000000920 T rdmacore50_0_mthca_create_srq\n+00000000000002a0 T rdmacore50_0_mthca_dereg_mr\n+0000000000001570 T rdmacore50_0_mthca_destroy_ah\n+0000000000000880 T rdmacore50_0_mthca_destroy_cq\n+0000000000001330 T rdmacore50_0_mthca_destroy_qp\n+0000000000000ca0 T rdmacore50_0_mthca_destroy_srq\n+ U rdmacore50_0_mthca_free_av\n+ U rdmacore50_0_mthca_free_buf\n+ U rdmacore50_0_mthca_free_db\n+00000000000001b0 T rdmacore50_0_mthca_free_pd\n+ U rdmacore50_0_mthca_init_qp_indices\n+0000000000001230 T rdmacore50_0_mthca_modify_qp\n+0000000000000c20 T rdmacore50_0_mthca_modify_srq\n+0000000000000000 T rdmacore50_0_mthca_query_device\n+00000000000000a0 T rdmacore50_0_mthca_query_port\n+00000000000011f0 T rdmacore50_0_mthca_query_qp\n+0000000000000c60 T rdmacore50_0_mthca_query_srq\n+00000000000001e0 T rdmacore50_0_mthca_reg_mr\n+0000000000000660 T rdmacore50_0_mthca_resize_cq\n+ U rdmacore50_0_mthca_set_db_qn\n+ U rdmacore50_0_mthca_store_qp\n+\n+buf.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U mmap\n+ U munmap\n+0000000000000000 T rdmacore50_0_mthca_alloc_buf\n+0000000000000090 T rdmacore50_0_mthca_free_buf\n \n memfree.c.o:\n U free\n U malloc\n U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n@@ -131,14 +185,34 @@\n U pthread_spin_unlock\n U rdmacore50_0_mthca_alloc_buf\n 0000000000000430 T rdmacore50_0_mthca_alloc_srq_buf\n 00000000000002b0 T rdmacore50_0_mthca_arbel_post_srq_recv\n 0000000000000000 T rdmacore50_0_mthca_free_srq_wqe\n 0000000000000070 T rdmacore50_0_mthca_tavor_post_srq_recv\n \n+cq.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __printf_chk\n+ U __stack_chk_fail\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+00000000000008a0 T rdmacore50_0___mthca_cq_clean\n+ U rdmacore50_0_mthca_alloc_buf\n+0000000000000c60 T rdmacore50_0_mthca_alloc_cq_buf\n+0000000000000800 T rdmacore50_0_mthca_arbel_arm_cq\n+0000000000000890 T rdmacore50_0_mthca_arbel_cq_event\n+0000000000000b70 T rdmacore50_0_mthca_cq_clean\n+0000000000000bc0 T rdmacore50_0_mthca_cq_resize_copy_cqes\n+ U rdmacore50_0_mthca_find_qp\n+ U rdmacore50_0_mthca_free_err_wqe\n+ U rdmacore50_0_mthca_free_srq_wqe\n+0000000000000000 T rdmacore50_0_mthca_poll_cq\n+00000000000007c0 T rdmacore50_0_mthca_tavor_arm_cq\n+\n mthca.c.o:\n U __stack_chk_fail\n U calloc\n 0000000000000000 t drv__register_driver\n U free\n 0000000000000000 r hca_table\n U mmap\n@@ -189,81 +263,7 @@\n U rdmacore50_0_mthca_tavor_post_send\n U rdmacore50_0_mthca_tavor_post_srq_recv\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U sysconf\n 0000000000000000 D verbs_provider_mthca\n-\n-verbs.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC2\n- U __snprintf_chk\n- U __stack_chk_fail\n- U free\n- U malloc\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0___mthca_cq_clean\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_create_cq\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_ibv_cmd_reg_mr\n- U rdmacore50_0_ibv_cmd_resize_cq\n- U rdmacore50_0_mthca_alloc_av\n- U rdmacore50_0_mthca_alloc_cq_buf\n- U rdmacore50_0_mthca_alloc_db\n-00000000000000f0 T rdmacore50_0_mthca_alloc_pd\n- U rdmacore50_0_mthca_alloc_qp_buf\n- U rdmacore50_0_mthca_alloc_srq_buf\n- U rdmacore50_0_mthca_clear_qp\n- U rdmacore50_0_mthca_cq_clean\n- U rdmacore50_0_mthca_cq_resize_copy_cqes\n-0000000000001520 T rdmacore50_0_mthca_create_ah\n-00000000000002d0 T rdmacore50_0_mthca_create_cq\n-0000000000000d30 T rdmacore50_0_mthca_create_qp\n-0000000000000920 T rdmacore50_0_mthca_create_srq\n-00000000000002a0 T rdmacore50_0_mthca_dereg_mr\n-0000000000001570 T rdmacore50_0_mthca_destroy_ah\n-0000000000000880 T rdmacore50_0_mthca_destroy_cq\n-0000000000001330 T rdmacore50_0_mthca_destroy_qp\n-0000000000000ca0 T rdmacore50_0_mthca_destroy_srq\n- U rdmacore50_0_mthca_free_av\n- U rdmacore50_0_mthca_free_buf\n- U rdmacore50_0_mthca_free_db\n-00000000000001b0 T rdmacore50_0_mthca_free_pd\n- U rdmacore50_0_mthca_init_qp_indices\n-0000000000001230 T rdmacore50_0_mthca_modify_qp\n-0000000000000c20 T rdmacore50_0_mthca_modify_srq\n-0000000000000000 T rdmacore50_0_mthca_query_device\n-00000000000000a0 T rdmacore50_0_mthca_query_port\n-00000000000011f0 T rdmacore50_0_mthca_query_qp\n-0000000000000c60 T rdmacore50_0_mthca_query_srq\n-00000000000001e0 T rdmacore50_0_mthca_reg_mr\n-0000000000000660 T rdmacore50_0_mthca_resize_cq\n- U rdmacore50_0_mthca_set_db_qn\n- U rdmacore50_0_mthca_store_qp\n-\n-buf.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_mthca_alloc_buf\n-0000000000000090 T rdmacore50_0_mthca_free_buf\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,9 +1,9 @@\n ---------- 0 0 0 1762 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 8144 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 15152 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 buf.c.o\n ?rw-r--r-- 0 0 0 3568 1970-01-01 00:00:00.000000 memfree.c.o\n ?rw-r--r-- 0 0 0 3184 1970-01-01 00:00:00.000000 ah.c.o\n ?rw-r--r-- 0 0 0 9232 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 3840 1970-01-01 00:00:00.000000 srq.c.o\n+?rw-r--r-- 0 0 0 8144 1970-01-01 00:00:00.000000 cq.c.o\n ?rw-r--r-- 0 0 0 9600 1970-01-01 00:00:00.000000 mthca.c.o\n-?rw-r--r-- 0 0 0 15152 1970-01-01 00:00:00.000000 verbs.c.o\n-?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 buf.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libqedr-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libqedr-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,13 +1,9 @@\n \n Archive index:\n-rdmacore50_0_qelr_chain_get_last_elem in qelr_chain.c.o\n-rdmacore50_0_qelr_chain_reset in qelr_chain.c.o\n-rdmacore50_0_qelr_chain_alloc in qelr_chain.c.o\n-rdmacore50_0_qelr_chain_free in qelr_chain.c.o\n rdmacore50_0_qelr_query_device in qelr_verbs.c.o\n rdmacore50_0_qelr_query_port in qelr_verbs.c.o\n rdmacore50_0_qelr_alloc_pd in qelr_verbs.c.o\n rdmacore50_0_qelr_dealloc_pd in qelr_verbs.c.o\n rdmacore50_0_qelr_reg_mr in qelr_verbs.c.o\n rdmacore50_0_qelr_dereg_mr in qelr_verbs.c.o\n rdmacore50_0_qelr_create_cq in qelr_verbs.c.o\n@@ -31,25 +27,18 @@\n rdmacore50_0_qelr_get_srq_num in qelr_verbs.c.o\n rdmacore50_0_qelr_create_srq_ex in qelr_verbs.c.o\n rdmacore50_0_qelr_create_qp_ex in qelr_verbs.c.o\n rdmacore50_0_qelr_create_qp in qelr_verbs.c.o\n rdmacore50_0_qelr_dp_level in qelr_main.c.o\n rdmacore50_0_qelr_dp_module in qelr_main.c.o\n verbs_provider_qedr in qelr_main.c.o\n-\n-qelr_chain.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000040 T rdmacore50_0_qelr_chain_alloc\n-0000000000000130 T rdmacore50_0_qelr_chain_free\n-0000000000000000 T rdmacore50_0_qelr_chain_get_last_elem\n-0000000000000020 T rdmacore50_0_qelr_chain_reset\n+rdmacore50_0_qelr_chain_get_last_elem in qelr_chain.c.o\n+rdmacore50_0_qelr_chain_reset in qelr_chain.c.o\n+rdmacore50_0_qelr_chain_alloc in qelr_chain.c.o\n+rdmacore50_0_qelr_chain_free in qelr_chain.c.o\n \n qelr_verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000030 r .LC1\n 0000000000000270 r .LC10\n 00000000000002e0 r .LC11\n 0000000000000318 r .LC12\n@@ -305,7 +294,18 @@\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U stderr\n U strtol\n U sysconf\n 0000000000000000 D verbs_provider_qedr\n+\n+qelr_chain.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U mmap\n+ U munmap\n+0000000000000040 T rdmacore50_0_qelr_chain_alloc\n+0000000000000130 T rdmacore50_0_qelr_chain_free\n+0000000000000000 T rdmacore50_0_qelr_chain_get_last_elem\n+0000000000000020 T rdmacore50_0_qelr_chain_reset\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 1146 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 2184 1970-01-01 00:00:00.000000 qelr_chain.c.o\n ?rw-r--r-- 0 0 0 53272 1970-01-01 00:00:00.000000 qelr_verbs.c.o\n ?rw-r--r-- 0 0 0 11432 1970-01-01 00:00:00.000000 qelr_main.c.o\n+?rw-r--r-- 0 0 0 2184 1970-01-01 00:00:00.000000 qelr_chain.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libvmw_pvrdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libvmw_pvrdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,16 +1,17 @@\n \n Archive index:\n-rdmacore50_0_pvrdma_alloc_cq_buf in cq.c.o\n-rdmacore50_0_pvrdma_poll_cq in cq.c.o\n-rdmacore50_0_pvrdma_cq_clean_int in cq.c.o\n-rdmacore50_0_pvrdma_cq_clean in cq.c.o\n-rdmacore50_0_pvrdma_create_cq in cq.c.o\n-rdmacore50_0_pvrdma_destroy_cq in cq.c.o\n-rdmacore50_0_pvrdma_req_notify_cq in cq.c.o\n+rdmacore50_0_pvrdma_query_device in verbs.c.o\n+rdmacore50_0_pvrdma_query_port in verbs.c.o\n+rdmacore50_0_pvrdma_alloc_pd in verbs.c.o\n+rdmacore50_0_pvrdma_free_pd in verbs.c.o\n+rdmacore50_0_pvrdma_reg_mr in verbs.c.o\n+rdmacore50_0_pvrdma_dereg_mr in verbs.c.o\n+rdmacore50_0_pvrdma_create_ah in verbs.c.o\n+rdmacore50_0_pvrdma_destroy_ah in verbs.c.o\n rdmacore50_0_pvrdma_alloc_buf in pvrdma_main.c.o\n rdmacore50_0_pvrdma_free_buf in pvrdma_main.c.o\n verbs_provider_vmw_pvrdma in pvrdma_main.c.o\n rdmacore50_0_pvrdma_alloc_qp_buf in qp.c.o\n rdmacore50_0_pvrdma_init_srq_queue in qp.c.o\n rdmacore50_0_pvrdma_modify_srq in qp.c.o\n rdmacore50_0_pvrdma_query_srq in qp.c.o\n@@ -20,42 +21,45 @@\n rdmacore50_0_pvrdma_modify_qp in qp.c.o\n rdmacore50_0_pvrdma_destroy_qp in qp.c.o\n rdmacore50_0_pvrdma_post_send in qp.c.o\n rdmacore50_0_pvrdma_post_recv in qp.c.o\n rdmacore50_0_pvrdma_post_srq_recv in qp.c.o\n rdmacore50_0_pvrdma_alloc_srq_buf in qp.c.o\n rdmacore50_0_pvrdma_create_srq in qp.c.o\n-rdmacore50_0_pvrdma_query_device in verbs.c.o\n-rdmacore50_0_pvrdma_query_port in verbs.c.o\n-rdmacore50_0_pvrdma_alloc_pd in verbs.c.o\n-rdmacore50_0_pvrdma_free_pd in verbs.c.o\n-rdmacore50_0_pvrdma_reg_mr in verbs.c.o\n-rdmacore50_0_pvrdma_dereg_mr in verbs.c.o\n-rdmacore50_0_pvrdma_create_ah in verbs.c.o\n-rdmacore50_0_pvrdma_destroy_ah in verbs.c.o\n+rdmacore50_0_pvrdma_alloc_cq_buf in cq.c.o\n+rdmacore50_0_pvrdma_poll_cq in cq.c.o\n+rdmacore50_0_pvrdma_cq_clean_int in cq.c.o\n+rdmacore50_0_pvrdma_cq_clean in cq.c.o\n+rdmacore50_0_pvrdma_create_cq in cq.c.o\n+rdmacore50_0_pvrdma_destroy_cq in cq.c.o\n+rdmacore50_0_pvrdma_req_notify_cq in cq.c.o\n \n-cq.c.o:\n+verbs.c.o:\n+0000000000000000 r .LC0\n+ U __snprintf_chk\n U __stack_chk_fail\n+ U calloc\n U free\n+ U ibv_query_port\n+ U ibv_resolve_eth_l2_from_gid\n U malloc\n- U memset\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_ibv_cmd_create_cq\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_pvrdma_alloc_buf\n-0000000000000000 T rdmacore50_0_pvrdma_alloc_cq_buf\n-00000000000002f0 T rdmacore50_0_pvrdma_cq_clean\n-00000000000001e0 T rdmacore50_0_pvrdma_cq_clean_int\n-0000000000000420 T rdmacore50_0_pvrdma_create_cq\n-00000000000005b0 T rdmacore50_0_pvrdma_destroy_cq\n- U rdmacore50_0_pvrdma_free_buf\n-0000000000000060 T rdmacore50_0_pvrdma_poll_cq\n-00000000000005f0 T rdmacore50_0_pvrdma_req_notify_cq\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+00000000000000f0 T rdmacore50_0_pvrdma_alloc_pd\n+00000000000002b0 T rdmacore50_0_pvrdma_create_ah\n+0000000000000280 T rdmacore50_0_pvrdma_dereg_mr\n+0000000000000460 T rdmacore50_0_pvrdma_destroy_ah\n+0000000000000190 T rdmacore50_0_pvrdma_free_pd\n+0000000000000000 T rdmacore50_0_pvrdma_query_device\n+00000000000000a0 T rdmacore50_0_pvrdma_query_port\n+00000000000001c0 T rdmacore50_0_pvrdma_reg_mr\n \n pvrdma_main.c.o:\n U __errno_location\n U __stack_chk_fail\n U calloc\n 0000000000000000 t drv__register_driver\n U free\n@@ -140,30 +144,26 @@\n 0000000000000d50 T rdmacore50_0_pvrdma_post_recv\n 0000000000000950 T rdmacore50_0_pvrdma_post_send\n 00000000000010a0 T rdmacore50_0_pvrdma_post_srq_recv\n 0000000000000680 T rdmacore50_0_pvrdma_query_qp\n 0000000000000210 T rdmacore50_0_pvrdma_query_srq\n U stderr\n \n-verbs.c.o:\n-0000000000000000 r .LC0\n- U __snprintf_chk\n+cq.c.o:\n U __stack_chk_fail\n- U calloc\n U free\n- U ibv_query_port\n- U ibv_resolve_eth_l2_from_gid\n U malloc\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_reg_mr\n-00000000000000f0 T rdmacore50_0_pvrdma_alloc_pd\n-00000000000002b0 T rdmacore50_0_pvrdma_create_ah\n-0000000000000280 T rdmacore50_0_pvrdma_dereg_mr\n-0000000000000460 T rdmacore50_0_pvrdma_destroy_ah\n-0000000000000190 T rdmacore50_0_pvrdma_free_pd\n-0000000000000000 T rdmacore50_0_pvrdma_query_device\n-00000000000000a0 T rdmacore50_0_pvrdma_query_port\n-00000000000001c0 T rdmacore50_0_pvrdma_reg_mr\n+ U memset\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_ibv_cmd_create_cq\n+ U rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_pvrdma_alloc_buf\n+0000000000000000 T rdmacore50_0_pvrdma_alloc_cq_buf\n+00000000000002f0 T rdmacore50_0_pvrdma_cq_clean\n+00000000000001e0 T rdmacore50_0_pvrdma_cq_clean_int\n+0000000000000420 T rdmacore50_0_pvrdma_create_cq\n+00000000000005b0 T rdmacore50_0_pvrdma_destroy_cq\n+ U rdmacore50_0_pvrdma_free_buf\n+0000000000000060 T rdmacore50_0_pvrdma_poll_cq\n+00000000000005f0 T rdmacore50_0_pvrdma_req_notify_cq\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1114 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 4400 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 4488 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 7640 1970-01-01 00:00:00.000000 pvrdma_main.c.o\n ?rw-r--r-- 0 0 0 11832 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r-- 0 0 0 4488 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 4400 1970-01-01 00:00:00.000000 cq.c.o\n"}]}]}]}]}, {"source1": "librdmacm-dev_50.0-2_amd64.deb", "source2": "librdmacm-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 2652 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 123796 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 123784 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/librdmacm.a", "source2": "./usr/lib/x86_64-linux-gnu/librdmacm.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,14 +1,9 @@\n \n Archive index:\n-rdmacore50_0_idx_insert in indexer.c.o\n-rdmacore50_0_idx_remove in indexer.c.o\n-rdmacore50_0_idx_replace in indexer.c.o\n-rdmacore50_0_idm_set in indexer.c.o\n-rdmacore50_0_idm_clear in indexer.c.o\n rdma_free_devices in cma.c.o\n rdma_destroy_event_channel in cma.c.o\n rdmacore50_0_ucma_addrlen in cma.c.o\n rdmacore50_0_af_ib_support in cma.c.o\n rdma_bind_addr in cma.c.o\n rdma_init_qp_attr in cma.c.o\n rdma_create_srq_ex in cma.c.o\n@@ -47,17 +42,19 @@\n rdma_create_ep in cma.c.o\n rdmacore50_0_ucma_max_qpsize in cma.c.o\n rdmacore50_0_ucma_get_port in cma.c.o\n rdma_get_src_port in cma.c.o\n rdma_get_dst_port in cma.c.o\n rdma_set_local_ece in cma.c.o\n rdma_get_remote_ece in cma.c.o\n-rdmacore50_0_ucma_set_sid in addrinfo.c.o\n-rdma_freeaddrinfo in addrinfo.c.o\n-rdma_getaddrinfo in addrinfo.c.o\n+rdmacore50_0_idx_insert in indexer.c.o\n+rdmacore50_0_idx_remove in indexer.c.o\n+rdmacore50_0_idx_replace in indexer.c.o\n+rdmacore50_0_idm_set in indexer.c.o\n+rdmacore50_0_idm_clear in indexer.c.o\n rdmacore50_0_ucma_ib_init in acm.c.o\n rdmacore50_0_ucma_ib_cleanup in acm.c.o\n rdmacore50_0_ucma_ib_resolve in acm.c.o\n rbind in rsocket.c.o\n rlisten in rsocket.c.o\n rconnect in rsocket.c.o\n rrecv in rsocket.c.o\n@@ -80,26 +77,17 @@\n rgetsockopt in rsocket.c.o\n rfcntl in rsocket.c.o\n riomap in rsocket.c.o\n riounmap in rsocket.c.o\n rsocket in rsocket.c.o\n rclose in rsocket.c.o\n riowrite in rsocket.c.o\n-\n-indexer.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-0000000000000020 r .LC2\n- U __errno_location\n- U calloc\n-0000000000000240 T rdmacore50_0_idm_clear\n-00000000000001b0 T rdmacore50_0_idm_set\n-0000000000000000 T rdmacore50_0_idx_insert\n-0000000000000160 T rdmacore50_0_idx_remove\n-0000000000000190 T rdmacore50_0_idx_replace\n+rdmacore50_0_ucma_set_sid in addrinfo.c.o\n+rdma_freeaddrinfo in addrinfo.c.o\n+rdma_getaddrinfo in addrinfo.c.o\n \n cma.c.o:\n 0000000000000000 r .LC0\n 000000000000000b r .LC11\n 0000000000000027 r .LC12\n 0000000000000040 r .LC13\n 000000000000005d r .LC14\n@@ -264,32 +252,25 @@\n 0000000000001ca0 t ucma_process_conn_resp\n 0000000000000f10 t ucma_query_addr\n 00000000000001f0 t ucma_query_gid\n 0000000000000310 t ucma_query_path\n 0000000000001180 t ucma_query_route\n U write\n \n-addrinfo.c.o:\n+indexer.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+0000000000000020 r .LC2\n U __errno_location\n- U __stack_chk_fail\n U calloc\n- U free\n- U freeaddrinfo\n- U getaddrinfo\n- U malloc\n- U memcpy\n-0000000000000000 b nohints\n-0000000000000160 T rdma_freeaddrinfo\n-0000000000000210 T rdma_getaddrinfo\n- U rdmacore50_0_ucma_get_port\n- U rdmacore50_0_ucma_ib_resolve\n- U rdmacore50_0_ucma_init\n-00000000000000d0 T rdmacore50_0_ucma_set_sid\n- U strdup\n-0000000000000000 t ucma_convert_in6.isra.0\n+0000000000000240 T rdmacore50_0_idm_clear\n+00000000000001b0 T rdmacore50_0_idm_set\n+0000000000000000 T rdmacore50_0_idx_insert\n+0000000000000160 T rdmacore50_0_idx_remove\n+0000000000000190 T rdmacore50_0_idx_replace\n \n acm.c.o:\n 0000000000000000 r .LC0\n 0000000000000003 r .LC1\n 0000000000000013 r .LC2\n 0000000000000000 r .LC3\n 0000000000000000 r .LC5\n@@ -510,7 +491,26 @@\n U tfind\n U tsearch\n 00000000000000c0 d udp_svc\n 0000000000000818 b udp_svc_fds\n 00000000000056a0 t udp_svc_run\n 0000000000000000 d wake_up_interval\n U write\n+\n+addrinfo.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U freeaddrinfo\n+ U getaddrinfo\n+ U malloc\n+ U memcpy\n+0000000000000000 b nohints\n+0000000000000160 T rdma_freeaddrinfo\n+0000000000000210 T rdma_getaddrinfo\n+ U rdmacore50_0_ucma_get_port\n+ U rdmacore50_0_ucma_ib_resolve\n+ U rdmacore50_0_ucma_init\n+00000000000000d0 T rdmacore50_0_ucma_set_sid\n+ U strdup\n+0000000000000000 t ucma_convert_in6.isra.0\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,6 +1,6 @@\n ---------- 0 0 0 1684 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 indexer.c.o\n ?rw-r--r-- 0 0 0 62312 1970-01-01 00:00:00.000000 cma.c.o\n-?rw-r--r-- 0 0 0 4992 1970-01-01 00:00:00.000000 addrinfo.c.o\n+?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 indexer.c.o\n ?rw-r--r-- 0 0 0 6768 1970-01-01 00:00:00.000000 acm.c.o\n ?rw-r--r-- 0 0 0 82544 1970-01-01 00:00:00.000000 rsocket.c.o\n+?rw-r--r-- 0 0 0 4992 1970-01-01 00:00:00.000000 addrinfo.c.o\n"}]}]}]}]}]}