Diff of the two buildlogs: -- --- b1/build.log 2023-06-10 03:16:52.161551261 +0000 +++ b2/build.log 2023-06-10 05:02:19.664733975 +0000 @@ -1,6 +1,6 @@ I: pbuilder: network access will be disabled during build -I: Current time: Fri Jun 9 06:58:40 -12 2023 -I: pbuilder-time-stamp: 1686337120 +I: Current time: Sat Jun 10 17:24:17 +14 2023 +I: pbuilder-time-stamp: 1686367457 I: Building the build Environment I: extracting base tarball [/var/cache/pbuilder/bookworm-reproducible-base.tgz] I: copying local configuration @@ -16,7 +16,7 @@ I: copying [./yosys_0.23.orig.tar.gz] I: copying [./yosys_0.23-6.debian.tar.xz] I: Extracting source -gpgv: Signature made Sat Dec 3 10:16:42 2022 -12 +gpgv: Signature made Sun Dec 4 12:16:42 2022 +14 gpgv: using RSA key 57A1BF15B4F6F99B89EDB29FD39481AE1E79ACF7 gpgv: Can't check signature: No public key dpkg-source: warning: cannot verify inline signature for ./yosys_0.23-6.dsc: no acceptable signature found @@ -39,135 +39,167 @@ dpkg-source: info: applying 0020-autotest-Print-log-on-error.patch I: Not using root during the build. I: Installing the build-deps -I: user script /srv/workspace/pbuilder/22085/tmp/hooks/D02_print_environment starting +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/D01_modify_environment starting +debug: Running on jtx1c. +I: Changing host+domainname to test build reproducibility +I: Adding a custom variable just for the fun of it... +I: Changing /bin/sh to bash +'/bin/sh' -> '/bin/bash' +lrwxrwxrwx 1 root root 9 Jun 10 17:24 /bin/sh -> /bin/bash +I: Setting pbuilder2's login shell to /bin/bash +I: Setting pbuilder2's GECOS to second user,second room,second work-phone,second home-phone,second other +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/D01_modify_environment finished +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/D02_print_environment starting I: set - BUILDDIR='/build' - BUILDUSERGECOS='first user,first room,first work-phone,first home-phone,first other' - BUILDUSERNAME='pbuilder1' - BUILD_ARCH='armhf' - DEBIAN_FRONTEND='noninteractive' - DEB_BUILD_OPTIONS='buildinfo=+all reproducible=+all parallel=3 ' - DISTRIBUTION='bookworm' - HOME='/root' - HOST_ARCH='armhf' + BASH=/bin/sh + BASHOPTS=checkwinsize:cmdhist:complete_fullquote:extquote:force_fignore:globasciiranges:globskipdots:hostcomplete:interactive_comments:patsub_replacement:progcomp:promptvars:sourcepath + BASH_ALIASES=() + BASH_ARGC=() + BASH_ARGV=() + BASH_CMDS=() + BASH_LINENO=([0]="12" [1]="0") + BASH_LOADABLES_PATH=/usr/local/lib/bash:/usr/lib/bash:/opt/local/lib/bash:/usr/pkg/lib/bash:/opt/pkg/lib/bash:. + BASH_SOURCE=([0]="/tmp/hooks/D02_print_environment" [1]="/tmp/hooks/D02_print_environment") + BASH_VERSINFO=([0]="5" [1]="2" [2]="15" [3]="1" [4]="release" [5]="arm-unknown-linux-gnueabihf") + BASH_VERSION='5.2.15(1)-release' + BUILDDIR=/build + BUILDUSERGECOS='second user,second room,second work-phone,second home-phone,second other' + BUILDUSERNAME=pbuilder2 + BUILD_ARCH=armhf + DEBIAN_FRONTEND=noninteractive + DEB_BUILD_OPTIONS='buildinfo=+all reproducible=+all parallel=4 ' + DIRSTACK=() + DISTRIBUTION=bookworm + EUID=0 + FUNCNAME=([0]="Echo" [1]="main") + GROUPS=() + HOME=/root + HOSTNAME=i-capture-the-hostname + HOSTTYPE=arm + HOST_ARCH=armhf IFS=' ' - INVOCATION_ID='322d2a9af1d94910af4a371fddd5e094' - LANG='C' - LANGUAGE='en_US:en' - LC_ALL='C' - MAIL='/var/mail/root' - OPTIND='1' - PATH='/usr/sbin:/usr/bin:/sbin:/bin:/usr/games' - PBCURRENTCOMMANDLINEOPERATION='build' - PBUILDER_OPERATION='build' - PBUILDER_PKGDATADIR='/usr/share/pbuilder' - PBUILDER_PKGLIBDIR='/usr/lib/pbuilder' - PBUILDER_SYSCONFDIR='/etc' - PPID='22085' - PS1='# ' - PS2='> ' + INVOCATION_ID=c62d470577b44fb9a8592cc8167977e7 + LANG=C + LANGUAGE=it_CH:it + LC_ALL=C + MACHTYPE=arm-unknown-linux-gnueabihf + MAIL=/var/mail/root + OPTERR=1 + OPTIND=1 + OSTYPE=linux-gnueabihf + PATH=/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/i/capture/the/path + PBCURRENTCOMMANDLINEOPERATION=build + PBUILDER_OPERATION=build + PBUILDER_PKGDATADIR=/usr/share/pbuilder + PBUILDER_PKGLIBDIR=/usr/lib/pbuilder + PBUILDER_SYSCONFDIR=/etc + PIPESTATUS=([0]="0") + POSIXLY_CORRECT=y + PPID=7990 PS4='+ ' - PWD='/' - SHELL='/bin/bash' - SHLVL='2' - SUDO_COMMAND='/usr/bin/timeout -k 18.1h 18h /usr/bin/ionice -c 3 /usr/bin/nice /usr/sbin/pbuilder --build --configfile /srv/reproducible-results/rbuild-debian/r-b-build.oLfZVhiS/pbuilderrc_pah1 --distribution bookworm --hookdir /etc/pbuilder/first-build-hooks --debbuildopts -b --basetgz /var/cache/pbuilder/bookworm-reproducible-base.tgz --buildresult /srv/reproducible-results/rbuild-debian/r-b-build.oLfZVhiS/b1 --logfile b1/build.log yosys_0.23-6.dsc' - SUDO_GID='113' - SUDO_UID='107' - SUDO_USER='jenkins' - TERM='unknown' - TZ='/usr/share/zoneinfo/Etc/GMT+12' - USER='root' - _='/usr/bin/systemd-run' - http_proxy='http://10.0.0.15:3142/' + PWD=/ + SHELL=/bin/bash + SHELLOPTS=braceexpand:errexit:hashall:interactive-comments:posix + SHLVL=3 + SUDO_COMMAND='/usr/bin/timeout -k 24.1h 24h /usr/bin/ionice -c 3 /usr/bin/nice -n 11 /usr/bin/unshare --uts -- /usr/sbin/pbuilder --build --configfile /srv/reproducible-results/rbuild-debian/r-b-build.oLfZVhiS/pbuilderrc_Ldcn --distribution bookworm --hookdir /etc/pbuilder/rebuild-hooks --debbuildopts -b --basetgz /var/cache/pbuilder/bookworm-reproducible-base.tgz --buildresult /srv/reproducible-results/rbuild-debian/r-b-build.oLfZVhiS/b2 --logfile b2/build.log --extrapackages usrmerge yosys_0.23-6.dsc' + SUDO_GID=114 + SUDO_UID=108 + SUDO_USER=jenkins + TERM=unknown + TZ=/usr/share/zoneinfo/Etc/GMT-14 + UID=0 + USER=root + _='I: set' + http_proxy=http://10.0.0.15:3142/ I: uname -a - Linux cbxi4pro0 5.10.0-23-armmp #1 SMP Debian 5.10.179-1 (2023-05-12) armv7l GNU/Linux + Linux i-capture-the-hostname 5.10.0-23-arm64 #1 SMP Debian 5.10.179-1 (2023-05-12) aarch64 GNU/Linux I: ls -l /bin total 5072 - -rwxr-xr-x 1 root root 838488 Apr 23 09:24 bash - -rwxr-xr-x 3 root root 67144 Sep 18 2022 bunzip2 - -rwxr-xr-x 3 root root 67144 Sep 18 2022 bzcat - lrwxrwxrwx 1 root root 6 Sep 18 2022 bzcmp -> bzdiff - -rwxr-xr-x 1 root root 2225 Sep 18 2022 bzdiff - lrwxrwxrwx 1 root root 6 Sep 18 2022 bzegrep -> bzgrep - -rwxr-xr-x 1 root root 4893 Nov 27 2021 bzexe - lrwxrwxrwx 1 root root 6 Sep 18 2022 bzfgrep -> bzgrep - -rwxr-xr-x 1 root root 3775 Sep 18 2022 bzgrep - -rwxr-xr-x 3 root root 67144 Sep 18 2022 bzip2 - -rwxr-xr-x 1 root root 67112 Sep 18 2022 bzip2recover - lrwxrwxrwx 1 root root 6 Sep 18 2022 bzless -> bzmore - -rwxr-xr-x 1 root root 1297 Sep 18 2022 bzmore - -rwxr-xr-x 1 root root 67632 Sep 20 2022 cat - -rwxr-xr-x 1 root root 67676 Sep 20 2022 chgrp - -rwxr-xr-x 1 root root 67644 Sep 20 2022 chmod - -rwxr-xr-x 1 root root 67684 Sep 20 2022 chown - -rwxr-xr-x 1 root root 133532 Sep 20 2022 cp - -rwxr-xr-x 1 root root 132868 Jan 5 01:20 dash - -rwxr-xr-x 1 root root 133220 Sep 20 2022 date - -rwxr-xr-x 1 root root 67732 Sep 20 2022 dd - -rwxr-xr-x 1 root root 68104 Sep 20 2022 df - -rwxr-xr-x 1 root root 133632 Sep 20 2022 dir - -rwxr-xr-x 1 root root 59128 Mar 22 21:02 dmesg - lrwxrwxrwx 1 root root 8 Dec 19 01:33 dnsdomainname -> hostname - lrwxrwxrwx 1 root root 8 Dec 19 01:33 domainname -> hostname - -rwxr-xr-x 1 root root 67560 Sep 20 2022 echo - -rwxr-xr-x 1 root root 41 Jan 24 02:43 egrep - -rwxr-xr-x 1 root root 67548 Sep 20 2022 false - -rwxr-xr-x 1 root root 41 Jan 24 02:43 fgrep - -rwxr-xr-x 1 root root 55748 Mar 22 21:02 findmnt - -rwsr-xr-x 1 root root 26208 Mar 22 20:15 fusermount - -rwxr-xr-x 1 root root 128608 Jan 24 02:43 grep - -rwxr-xr-x 2 root root 2346 Apr 9 2022 gunzip - -rwxr-xr-x 1 root root 6447 Apr 9 2022 gzexe - -rwxr-xr-x 1 root root 64220 Apr 9 2022 gzip - -rwxr-xr-x 1 root root 67032 Dec 19 01:33 hostname - -rwxr-xr-x 1 root root 67720 Sep 20 2022 ln - -rwxr-xr-x 1 root root 35132 Mar 22 21:51 login - -rwxr-xr-x 1 root root 133632 Sep 20 2022 ls - -rwxr-xr-x 1 root root 136808 Mar 22 21:02 lsblk - -rwxr-xr-x 1 root root 67800 Sep 20 2022 mkdir - -rwxr-xr-x 1 root root 67764 Sep 20 2022 mknod - -rwxr-xr-x 1 root root 67596 Sep 20 2022 mktemp - -rwxr-xr-x 1 root root 38504 Mar 22 21:02 more - -rwsr-xr-x 1 root root 38496 Mar 22 21:02 mount - -rwxr-xr-x 1 root root 9824 Mar 22 21:02 mountpoint - -rwxr-xr-x 1 root root 133532 Sep 20 2022 mv - lrwxrwxrwx 1 root root 8 Dec 19 01:33 nisdomainname -> hostname - lrwxrwxrwx 1 root root 14 Apr 2 18:25 pidof -> /sbin/killall5 - -rwxr-xr-x 1 root root 67608 Sep 20 2022 pwd - lrwxrwxrwx 1 root root 4 Apr 23 09:24 rbash -> bash - -rwxr-xr-x 1 root root 67600 Sep 20 2022 readlink - -rwxr-xr-x 1 root root 67672 Sep 20 2022 rm - -rwxr-xr-x 1 root root 67600 Sep 20 2022 rmdir - -rwxr-xr-x 1 root root 67400 Nov 2 2022 run-parts - -rwxr-xr-x 1 root root 133372 Jan 5 07:55 sed - lrwxrwxrwx 1 root root 4 Jan 5 01:20 sh -> dash - -rwxr-xr-x 1 root root 67584 Sep 20 2022 sleep - -rwxr-xr-x 1 root root 67644 Sep 20 2022 stty - -rwsr-xr-x 1 root root 50800 Mar 22 21:02 su - -rwxr-xr-x 1 root root 67584 Sep 20 2022 sync - -rwxr-xr-x 1 root root 336764 Apr 6 02:25 tar - -rwxr-xr-x 1 root root 67144 Nov 2 2022 tempfile - -rwxr-xr-x 1 root root 133224 Sep 20 2022 touch - -rwxr-xr-x 1 root root 67548 Sep 20 2022 true - -rwxr-xr-x 1 root root 9768 Mar 22 20:15 ulockmgr_server - -rwsr-xr-x 1 root root 22108 Mar 22 21:02 umount - -rwxr-xr-x 1 root root 67572 Sep 20 2022 uname - -rwxr-xr-x 2 root root 2346 Apr 9 2022 uncompress - -rwxr-xr-x 1 root root 133632 Sep 20 2022 vdir - -rwxr-xr-x 1 root root 42608 Mar 22 21:02 wdctl - lrwxrwxrwx 1 root root 8 Dec 19 01:33 ypdomainname -> hostname - -rwxr-xr-x 1 root root 1984 Apr 9 2022 zcat - -rwxr-xr-x 1 root root 1678 Apr 9 2022 zcmp - -rwxr-xr-x 1 root root 6460 Apr 9 2022 zdiff - -rwxr-xr-x 1 root root 29 Apr 9 2022 zegrep - -rwxr-xr-x 1 root root 29 Apr 9 2022 zfgrep - -rwxr-xr-x 1 root root 2081 Apr 9 2022 zforce - -rwxr-xr-x 1 root root 8103 Apr 9 2022 zgrep - -rwxr-xr-x 1 root root 2206 Apr 9 2022 zless - -rwxr-xr-x 1 root root 1842 Apr 9 2022 zmore - -rwxr-xr-x 1 root root 4577 Apr 9 2022 znew -I: user script /srv/workspace/pbuilder/22085/tmp/hooks/D02_print_environment finished + -rwxr-xr-x 1 root root 838488 Apr 24 11:24 bash + -rwxr-xr-x 3 root root 67144 Sep 19 2022 bunzip2 + -rwxr-xr-x 3 root root 67144 Sep 19 2022 bzcat + lrwxrwxrwx 1 root root 6 Sep 19 2022 bzcmp -> bzdiff + -rwxr-xr-x 1 root root 2225 Sep 19 2022 bzdiff + lrwxrwxrwx 1 root root 6 Sep 19 2022 bzegrep -> bzgrep + -rwxr-xr-x 1 root root 4893 Nov 28 2021 bzexe + lrwxrwxrwx 1 root root 6 Sep 19 2022 bzfgrep -> bzgrep + -rwxr-xr-x 1 root root 3775 Sep 19 2022 bzgrep + -rwxr-xr-x 3 root root 67144 Sep 19 2022 bzip2 + -rwxr-xr-x 1 root root 67112 Sep 19 2022 bzip2recover + lrwxrwxrwx 1 root root 6 Sep 19 2022 bzless -> bzmore + -rwxr-xr-x 1 root root 1297 Sep 19 2022 bzmore + -rwxr-xr-x 1 root root 67632 Sep 21 2022 cat + -rwxr-xr-x 1 root root 67676 Sep 21 2022 chgrp + -rwxr-xr-x 1 root root 67644 Sep 21 2022 chmod + -rwxr-xr-x 1 root root 67684 Sep 21 2022 chown + -rwxr-xr-x 1 root root 133532 Sep 21 2022 cp + -rwxr-xr-x 1 root root 132868 Jan 6 03:20 dash + -rwxr-xr-x 1 root root 133220 Sep 21 2022 date + -rwxr-xr-x 1 root root 67732 Sep 21 2022 dd + -rwxr-xr-x 1 root root 68104 Sep 21 2022 df + -rwxr-xr-x 1 root root 133632 Sep 21 2022 dir + -rwxr-xr-x 1 root root 59128 Mar 23 23:02 dmesg + lrwxrwxrwx 1 root root 8 Dec 20 03:33 dnsdomainname -> hostname + lrwxrwxrwx 1 root root 8 Dec 20 03:33 domainname -> hostname + -rwxr-xr-x 1 root root 67560 Sep 21 2022 echo + -rwxr-xr-x 1 root root 41 Jan 25 04:43 egrep + -rwxr-xr-x 1 root root 67548 Sep 21 2022 false + -rwxr-xr-x 1 root root 41 Jan 25 04:43 fgrep + -rwxr-xr-x 1 root root 55748 Mar 23 23:02 findmnt + -rwsr-xr-x 1 root root 26208 Mar 23 22:15 fusermount + -rwxr-xr-x 1 root root 128608 Jan 25 04:43 grep + -rwxr-xr-x 2 root root 2346 Apr 10 2022 gunzip + -rwxr-xr-x 1 root root 6447 Apr 10 2022 gzexe + -rwxr-xr-x 1 root root 64220 Apr 10 2022 gzip + -rwxr-xr-x 1 root root 67032 Dec 20 03:33 hostname + -rwxr-xr-x 1 root root 67720 Sep 21 2022 ln + -rwxr-xr-x 1 root root 35132 Mar 23 23:51 login + -rwxr-xr-x 1 root root 133632 Sep 21 2022 ls + -rwxr-xr-x 1 root root 136808 Mar 23 23:02 lsblk + -rwxr-xr-x 1 root root 67800 Sep 21 2022 mkdir + -rwxr-xr-x 1 root root 67764 Sep 21 2022 mknod + -rwxr-xr-x 1 root root 67596 Sep 21 2022 mktemp + -rwxr-xr-x 1 root root 38504 Mar 23 23:02 more + -rwsr-xr-x 1 root root 38496 Mar 23 23:02 mount + -rwxr-xr-x 1 root root 9824 Mar 23 23:02 mountpoint + -rwxr-xr-x 1 root root 133532 Sep 21 2022 mv + lrwxrwxrwx 1 root root 8 Dec 20 03:33 nisdomainname -> hostname + lrwxrwxrwx 1 root root 14 Apr 3 20:25 pidof -> /sbin/killall5 + -rwxr-xr-x 1 root root 67608 Sep 21 2022 pwd + lrwxrwxrwx 1 root root 4 Apr 24 11:24 rbash -> bash + -rwxr-xr-x 1 root root 67600 Sep 21 2022 readlink + -rwxr-xr-x 1 root root 67672 Sep 21 2022 rm + -rwxr-xr-x 1 root root 67600 Sep 21 2022 rmdir + -rwxr-xr-x 1 root root 67400 Nov 3 2022 run-parts + -rwxr-xr-x 1 root root 133372 Jan 6 09:55 sed + lrwxrwxrwx 1 root root 9 Jun 10 17:24 sh -> /bin/bash + -rwxr-xr-x 1 root root 67584 Sep 21 2022 sleep + -rwxr-xr-x 1 root root 67644 Sep 21 2022 stty + -rwsr-xr-x 1 root root 50800 Mar 23 23:02 su + -rwxr-xr-x 1 root root 67584 Sep 21 2022 sync + -rwxr-xr-x 1 root root 336764 Apr 7 04:25 tar + -rwxr-xr-x 1 root root 67144 Nov 3 2022 tempfile + -rwxr-xr-x 1 root root 133224 Sep 21 2022 touch + -rwxr-xr-x 1 root root 67548 Sep 21 2022 true + -rwxr-xr-x 1 root root 9768 Mar 23 22:15 ulockmgr_server + -rwsr-xr-x 1 root root 22108 Mar 23 23:02 umount + -rwxr-xr-x 1 root root 67572 Sep 21 2022 uname + -rwxr-xr-x 2 root root 2346 Apr 10 2022 uncompress + -rwxr-xr-x 1 root root 133632 Sep 21 2022 vdir + -rwxr-xr-x 1 root root 42608 Mar 23 23:02 wdctl + lrwxrwxrwx 1 root root 8 Dec 20 03:33 ypdomainname -> hostname + -rwxr-xr-x 1 root root 1984 Apr 10 2022 zcat + -rwxr-xr-x 1 root root 1678 Apr 10 2022 zcmp + -rwxr-xr-x 1 root root 6460 Apr 10 2022 zdiff + -rwxr-xr-x 1 root root 29 Apr 10 2022 zegrep + -rwxr-xr-x 1 root root 29 Apr 10 2022 zfgrep + -rwxr-xr-x 1 root root 2081 Apr 10 2022 zforce + -rwxr-xr-x 1 root root 8103 Apr 10 2022 zgrep + -rwxr-xr-x 1 root root 2206 Apr 10 2022 zless + -rwxr-xr-x 1 root root 1842 Apr 10 2022 zmore + -rwxr-xr-x 1 root root 4577 Apr 10 2022 znew +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/D02_print_environment finished -> Attempting to satisfy build-dependencies -> Creating pbuilder-satisfydepends-dummy package Package: pbuilder-satisfydepends-dummy @@ -420,7 +452,7 @@ Get: 167 http://deb.debian.org/debian bookworm/main armhf texlive-publishers all 2022.20230122-4 [21.1 MB] Get: 168 http://deb.debian.org/debian bookworm/main armhf texlive-science all 2022.20230122-4 [3722 kB] Get: 169 http://deb.debian.org/debian bookworm/main armhf txt2man all 1.7.1-4 [35.4 kB] -Fetched 876 MB in 2min 11s (6693 kB/s) +Fetched 876 MB in 1min 41s (8648 kB/s) debconf: delaying package configuration, since apt-utils is not installed Selecting previously unselected package m4. (Reading database ... (Reading database ... 5% (Reading database ... 10% (Reading database ... 15% (Reading database ... 20% (Reading database ... 25% (Reading database ... 30% (Reading database ... 35% (Reading database ... 40% (Reading database ... 45% (Reading database ... 50% (Reading database ... 55% (Reading database ... 60% (Reading database ... 65% (Reading database ... 70% (Reading database ... 75% (Reading database ... 80% (Reading database ... 85% (Reading database ... 90% (Reading database ... 95% (Reading database ... 100% (Reading database ... 19324 files and directories currently installed.) @@ -1134,8 +1166,19 @@ Writing extended state information... Building tag database... -> Finished parsing the build-deps +Reading package lists... +Building dependency tree... +Reading state information... +usrmerge is already the newest version (35). +0 upgraded, 0 newly installed, 0 to remove and 0 not upgraded. I: Building the package -I: Running cd /build/yosys-0.23/ && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-buildpackage -us -uc -b && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-genchanges -S > ../yosys_0.23-6_source.changes +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/A99_set_merged_usr starting +Re-configuring usrmerge... +removed '/etc/unsupported-skip-usrmerge-conversion' +The system has been successfully converted. +I: user script /srv/workspace/pbuilder/7990/tmp/hooks/A99_set_merged_usr finished +hostname: Name or service not known +I: Running cd /build/yosys-0.23/ && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/i/capture/the/path" HOME="/nonexistent/second-build" dpkg-buildpackage -us -uc -b && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/i/capture/the/path" HOME="/nonexistent/second-build" dpkg-genchanges -S > ../yosys_0.23-6_source.changes dpkg-buildpackage: info: source package yosys dpkg-buildpackage: info: source version 0.23-6 dpkg-buildpackage: info: source distribution unstable @@ -1147,16 +1190,17 @@ debian/rules override_dh_auto_clean make[1]: Entering directory '/build/yosys-0.23' dh_auto_clean - make -j3 clean + make -j4 clean make[2]: Entering directory '/build/yosys-0.23' rm -rf share rm -rf kernel/*.pyh if test -d manual; then cd manual && sh clean.sh; fi +find ./PRESENTATION_ExOth/ -name '*.dot' | xargs rm -f +find ./CHAPTER_Prog/ -name 'stubnets.so' | xargs rm -f +find ./CHAPTER_Prog/ -name 'stubnets.d' | xargs rm -f +find ./CHAPTER_Prog/ -name '*.log' | xargs rm -f find ./PRESENTATION_ExSyn/ -name '*.dot' | xargs rm -f -find ./PRESENTATION_Intro/ -name 'counter_00.dot' | xargs rm -f -find ./PRESENTATION_Intro/ -name 'counter_01.dot' | xargs rm -f -find ./PRESENTATION_Intro/ -name 'counter_02.dot' | xargs rm -f -find ./PRESENTATION_Intro/ -name 'counter_03.dot' | xargs rm -f +find ./PRESENTATION_ExAdv/ -name '*.dot' | xargs rm -f find ./ -name '*.aux' | xargs rm -f find ./ -name '*.bbl' | xargs rm -f find ./ -name '*.blg' | xargs rm -f @@ -1169,13 +1213,12 @@ find ./ -name '*.nav' | xargs rm -f find ./ -name '*.vrb' | xargs rm -f find ./ -name '*.ok' | xargs rm -f +find ./PRESENTATION_Intro/ -name 'counter_00.dot' | xargs rm -f +find ./PRESENTATION_Intro/ -name 'counter_01.dot' | xargs rm -f +find ./PRESENTATION_Intro/ -name 'counter_02.dot' | xargs rm -f +find ./PRESENTATION_Intro/ -name 'counter_03.dot' | xargs rm -f find ./PRESENTATION_Prog/ -name 'my_cmd.so' | xargs rm -f find ./PRESENTATION_Prog/ -name 'my_cmd.d' | xargs rm -f -find ./CHAPTER_Prog/ -name 'stubnets.so' | xargs rm -f -find ./CHAPTER_Prog/ -name 'stubnets.d' | xargs rm -f -find ./CHAPTER_Prog/ -name '*.log' | xargs rm -f -find ./PRESENTATION_ExAdv/ -name '*.dot' | xargs rm -f -find ./PRESENTATION_ExOth/ -name '*.dot' | xargs rm -f rm -f kernel/version_7ce5011c24b.o kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o kernel/yosys.o kernel/binding.o kernel/cellaigs.o kernel/celledges.o kernel/satgen.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o kernel/fstdata.o libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/BigIntegerUtils.o libs/bigint/BigUnsigned.o libs/bigint/BigUnsignedInABase.o libs/sha1/sha1.o libs/json11/json11.o libs/subcircuit/subcircuit.o libs/ezsat/ezsat.o libs/ezsat/ezminisat.o libs/minisat/Options.o libs/minisat/SimpSolver.o libs/minisat/Solver.o libs/minisat/System.o libs/fst/fstapi.o libs/fst/fastlz.o libs/fst/lz4.o frontends/aiger/aigerparse.o frontends/ast/ast.o frontends/ast/simplify.o frontends/ast/genrtlil.o frontends/ast/dpicall.o frontends/ast/ast_binding.o frontends/blif/blifparse.o frontends/json/jsonparse.o frontends/liberty/liberty.o frontends/rpc/rpc_frontend.o frontends/rtlil/rtlil_parser.tab.o frontends/rtlil/rtlil_lexer.o frontends/rtlil/rtlil_frontend.o frontends/verific/verific.o frontends/verilog/verilog_parser.tab.o frontends/verilog/verilog_lexer.o frontends/verilog/preproc.o frontends/verilog/verilog_frontend.o frontends/verilog/const2ast.o passes/cmds/exec.o passes/cmds/add.o passes/cmds/delete.o passes/cmds/design.o passes/cmds/select.o passes/cmds/show.o passes/cmds/rename.o passes/cmds/autoname.o passes/cmds/connect.o passes/cmds/scatter.o passes/cmds/setundef.o passes/cmds/splitnets.o passes/cmds/stat.o passes/cmds/setattr.o passes/cmds/copy.o passes/cmds/splice.o passes/cmds/scc.o passes/cmds/glift.o passes/cmds/torder.o passes/cmds/logcmd.o passes/cmds/tee.o passes/cmds/write_file.o passes/cmds/connwrappers.o passes/cmds/cover.o passes/cmds/trace.o passes/cmds/plugin.o passes/cmds/check.o passes/cmds/qwp.o passes/cmds/edgetypes.o passes/cmds/portlist.o passes/cmds/chformal.o passes/cmds/chtype.o passes/cmds/blackbox.o passes/cmds/ltp.o passes/cmds/bugpoint.o passes/cmds/scratchpad.o passes/cmds/logger.o passes/cmds/printattrs.o passes/cmds/sta.o passes/cmds/clean_zerowidth.o passes/equiv/equiv_make.o passes/equiv/equiv_miter.o passes/equiv/equiv_simple.o passes/equiv/equiv_status.o passes/equiv/equiv_add.o passes/equiv/equiv_remove.o passes/equiv/equiv_induct.o passes/equiv/equiv_struct.o passes/equiv/equiv_purge.o passes/equiv/equiv_mark.o passes/equiv/equiv_opt.o passes/fsm/fsm.o passes/fsm/fsm_detect.o passes/fsm/fsm_extract.o passes/fsm/fsm_opt.o passes/fsm/fsm_expand.o passes/fsm/fsm_recode.o passes/fsm/fsm_info.o passes/fsm/fsm_export.o passes/fsm/fsm_map.o passes/hierarchy/hierarchy.o passes/hierarchy/uniquify.o passes/hierarchy/submod.o passes/memory/memory.o passes/memory/memory_dff.o passes/memory/memory_share.o passes/memory/memory_collect.o passes/memory/memory_unpack.o passes/memory/memory_bram.o passes/memory/memory_map.o passes/memory/memory_memx.o passes/memory/memory_nordff.o passes/memory/memory_narrow.o passes/memory/memory_libmap.o passes/memory/memory_bmux2rom.o passes/memory/memlib.o passes/opt/opt.o passes/opt/opt_merge.o passes/opt/opt_mem.o passes/opt/opt_mem_feedback.o passes/opt/opt_mem_priority.o passes/opt/opt_mem_widen.o passes/opt/opt_muxtree.o passes/opt/opt_reduce.o passes/opt/opt_dff.o passes/opt/opt_share.o passes/opt/opt_clean.o passes/opt/opt_expr.o passes/opt/share.o passes/opt/wreduce.o passes/opt/opt_demorgan.o passes/opt/rmports.o passes/opt/opt_lut.o passes/opt/opt_lut_ins.o passes/opt/opt_ffinv.o passes/opt/pmux2shiftx.o passes/opt/muxpack.o passes/pmgen/test_pmgen.o passes/pmgen/ice40_dsp.o passes/pmgen/ice40_wrapcarry.o passes/pmgen/xilinx_dsp.o passes/pmgen/peepopt.o passes/pmgen/xilinx_srl.o passes/proc/proc.o passes/proc/proc_prune.o passes/proc/proc_clean.o passes/proc/proc_rmdead.o passes/proc/proc_init.o passes/proc/proc_arst.o passes/proc/proc_rom.o passes/proc/proc_mux.o passes/proc/proc_dlatch.o passes/proc/proc_dff.o passes/proc/proc_memwr.o passes/sat/sat.o passes/sat/freduce.o passes/sat/eval.o passes/sat/sim.o passes/sat/miter.o passes/sat/expose.o passes/sat/assertpmux.o passes/sat/clk2fflogic.o passes/sat/async2sync.o passes/sat/formalff.o passes/sat/supercover.o passes/sat/fmcombine.o passes/sat/mutate.o passes/sat/cutpoint.o passes/sat/fminit.o passes/sat/qbfsat.o passes/techmap/flatten.o passes/techmap/techmap.o passes/techmap/simplemap.o passes/techmap/dfflibmap.o passes/techmap/maccmap.o passes/techmap/libparse.o passes/techmap/abc.o passes/techmap/abc9.o passes/techmap/abc9_exe.o passes/techmap/abc9_ops.o passes/techmap/iopadmap.o passes/techmap/clkbufmap.o passes/techmap/hilomap.o passes/techmap/extract.o passes/techmap/extract_fa.o passes/techmap/extract_counter.o passes/techmap/extract_reduce.o passes/techmap/alumacc.o passes/techmap/dffinit.o passes/techmap/pmuxtree.o passes/techmap/bmuxmap.o passes/techmap/demuxmap.o passes/techmap/muxcover.o passes/techmap/aigmap.o passes/techmap/tribuf.o passes/techmap/lut2mux.o passes/techmap/nlutmap.o passes/techmap/shregmap.o passes/techmap/deminout.o passes/techmap/insbuf.o passes/techmap/attrmvcp.o passes/techmap/attrmap.o passes/techmap/zinit.o passes/techmap/dfflegalize.o passes/techmap/dffunmap.o passes/techmap/flowmap.o passes/techmap/extractinv.o passes/tests/test_autotb.o passes/tests/test_cell.o passes/tests/test_abcloop.o backends/aiger/aiger.o backends/aiger/xaiger.o backends/blif/blif.o backends/btor/btor.o backends/cxxrtl/cxxrtl_backend.o backends/edif/edif.o backends/firrtl/firrtl.o backends/intersynth/intersynth.o backends/jny/jny.o backends/json/json.o backends/rtlil/rtlil_backend.o backends/simplec/simplec.o backends/smt2/smt2.o backends/smv/smv.o backends/spice/spice.o backends/table/table.o backends/verilog/verilog_backend.o techlibs/achronix/synth_achronix.o techlibs/anlogic/synth_anlogic.o techlibs/anlogic/anlogic_eqn.o techlibs/anlogic/anlogic_fixcarry.o techlibs/common/synth.o techlibs/common/prep.o techlibs/coolrunner2/synth_coolrunner2.o techlibs/coolrunner2/coolrunner2_sop.o techlibs/coolrunner2/coolrunner2_fixup.o techlibs/easic/synth_easic.o techlibs/ecp5/synth_ecp5.o techlibs/ecp5/ecp5_gsr.o techlibs/efinix/synth_efinix.o techlibs/efinix/efinix_fixcarry.o techlibs/gatemate/synth_gatemate.o techlibs/gatemate/gatemate_foldinv.o techlibs/gowin/synth_gowin.o techlibs/greenpak4/synth_greenpak4.o techlibs/greenpak4/greenpak4_dffinv.o techlibs/ice40/synth_ice40.o techlibs/ice40/ice40_braminit.o techlibs/ice40/ice40_opt.o techlibs/intel/synth_intel.o techlibs/intel_alm/synth_intel_alm.o techlibs/machxo2/synth_machxo2.o techlibs/nexus/synth_nexus.o techlibs/quicklogic/synth_quicklogic.o techlibs/sf2/synth_sf2.o techlibs/xilinx/synth_xilinx.o techlibs/xilinx/xilinx_dffopt.o frontends/rtlil/rtlil_parser.tab.cc frontends/rtlil/rtlil_parser.tab.hh frontends/rtlil/rtlil_parser.output frontends/rtlil/rtlil_lexer.cc frontends/verilog/verilog_parser.tab.cc frontends/verilog/verilog_parser.tab.hh frontends/verilog/verilog_parser.output frontends/verilog/verilog_lexer.cc passes/pmgen/test_pmgen_pm.h passes/pmgen/ice40_dsp_pm.h passes/pmgen/ice40_wrapcarry_pm.h passes/pmgen/xilinx_dsp_pm.h passes/pmgen/xilinx_dsp48a_pm.h passes/pmgen/xilinx_dsp_CREG_pm.h passes/pmgen/xilinx_dsp_cascade_pm.h passes/pmgen/peepopt_pm.h passes/pmgen/xilinx_srl_pm.h techlibs/common/simlib_help.inc techlibs/common/simcells_help.inc yosys yosys-config yosys-abc yosys-filterlib yosys-smtbmc yosys-witness share/include/kernel/yosys.h share/include/kernel/hashlib.h share/include/kernel/log.h share/include/kernel/rtlil.h share/include/kernel/binding.h share/include/kernel/register.h share/include/kernel/celltypes.h share/include/kernel/celledges.h share/include/kernel/consteval.h share/include/kernel/constids.inc share/include/kernel/sigtools.h share/include/kernel/modtools.h share/include/kernel/macc.h share/include/kernel/utils.h share/include/kernel/satgen.h share/include/kernel/qcsat.h share/include/kernel/ff.h share/include/kernel/ffinit.h share/include/kernel/fstdata.h share/include/kernel/mem.h share/include/libs/ezsat/ezsat.h share/include/libs/ezsat/ezminisat.h share/include/libs/fst/fstapi.h share/include/libs/sha1/sha1.h share/include/libs/json11/json11.hpp share/include/passes/fsm/fsmdata.h share/include/frontends/ast/ast.h share/include/frontends/ast/ast_binding.h share/include/frontends/blif/blifparse.h share/include/backends/rtlil/rtlil_backend.h share/include/backends/cxxrtl/cxxrtl.h share/include/backends/cxxrtl/cxxrtl_vcd.h share/include/backends/cxxrtl/cxxrtl_capi.cc share/include/backends/cxxrtl/cxxrtl_capi.h share/include/backends/cxxrtl/cxxrtl_vcd_capi.cc share/include/backends/cxxrtl/cxxrtl_vcd_capi.h share/python3/smtio.py share/python3/ywio.py share/achronix/speedster22i/cells_sim.v share/achronix/speedster22i/cells_map.v share/anlogic/cells_map.v share/anlogic/arith_map.v share/anlogic/cells_sim.v share/anlogic/eagle_bb.v share/anlogic/lutrams.txt share/anlogic/lutrams_map.v share/anlogic/brams.txt share/anlogic/brams_map.v share/simlib.v share/simcells.v share/techmap.v share/smtmap.v share/pmux2mux.v share/adff2dff.v share/dff2ff.v share/gate2lut.v share/cmp2lut.v share/cells.lib share/mul2dsp.v share/abc9_model.v share/abc9_map.v share/abc9_unmap.v share/cmp2lcu.v share/coolrunner2/cells_latch.v share/coolrunner2/cells_sim.v share/coolrunner2/cells_counter_map.v share/coolrunner2/tff_extract.v share/coolrunner2/xc2_dff.lib share/ecp5/cells_ff.vh share/ecp5/cells_io.vh share/ecp5/cells_map.v share/ecp5/cells_sim.v share/ecp5/cells_bb.v share/ecp5/lutrams_map.v share/ecp5/lutrams.txt share/ecp5/brams_map.v share/ecp5/brams.txt share/ecp5/arith_map.v share/ecp5/latches_map.v share/ecp5/dsp_map.v share/efinix/cells_map.v share/efinix/arith_map.v share/efinix/cells_sim.v share/efinix/brams_map.v share/efinix/gbuf_map.v share/efinix/brams.txt share/gatemate/reg_map.v share/gatemate/mux_map.v share/gatemate/lut_map.v share/gatemate/mul_map.v share/gatemate/arith_map.v share/gatemate/cells_sim.v share/gatemate/cells_bb.v share/gatemate/brams_map.v share/gatemate/brams.txt share/gatemate/brams_init_20.vh share/gatemate/brams_init_40.vh share/gatemate/inv_map.v share/gatemate/lut_tree_cells.genlib share/gatemate/lut_tree_map.v share/gowin/cells_map.v share/gowin/cells_sim.v share/gowin/arith_map.v share/gowin/brams_map.v share/gowin/brams.txt share/gowin/lutrams_map.v share/gowin/lutrams.txt share/greenpak4/cells_blackbox.v share/greenpak4/cells_latch.v share/greenpak4/cells_map.v share/greenpak4/cells_sim.v share/greenpak4/cells_sim_ams.v share/greenpak4/cells_sim_digital.v share/greenpak4/cells_sim_wip.v share/greenpak4/gp_dff.lib share/ice40/arith_map.v share/ice40/cells_map.v share/ice40/ff_map.v share/ice40/cells_sim.v share/ice40/latches_map.v share/ice40/brams.txt share/ice40/brams_map.v share/ice40/spram.txt share/ice40/spram_map.v share/ice40/dsp_map.v share/ice40/abc9_model.v share/intel/common/m9k_bb.v share/intel/common/altpll_bb.v share/intel/common/brams_m9k.txt share/intel/common/brams_map_m9k.v share/intel/common/ff_map.v share/intel/max10/cells_sim.v share/intel/cyclone10lp/cells_sim.v share/intel/cycloneiv/cells_sim.v share/intel/cycloneive/cells_sim.v share/intel/max10/cells_map.v share/intel/cyclone10lp/cells_map.v share/intel/cycloneiv/cells_map.v share/intel/cycloneive/cells_map.v share/intel_alm/common/abc9_map.v share/intel_alm/common/abc9_unmap.v share/intel_alm/common/abc9_model.v share/intel_alm/common/alm_map.v share/intel_alm/common/alm_sim.v share/intel_alm/common/arith_alm_map.v share/intel_alm/common/dff_map.v share/intel_alm/common/dff_sim.v share/intel_alm/common/dsp_sim.v share/intel_alm/common/dsp_map.v share/intel_alm/common/mem_sim.v share/intel_alm/common/misc_sim.v share/intel_alm/cyclonev/cells_sim.v share/intel_alm/common/bram_m10k.txt share/intel_alm/common/bram_m10k_map.v share/intel_alm/common/bram_m20k.txt share/intel_alm/common/bram_m20k_map.v share/intel_alm/common/lutram_mlab.txt share/intel_alm/common/megafunction_bb.v share/intel_alm/common/quartus_rename.v share/machxo2/cells_map.v share/machxo2/cells_sim.v share/machxo2/lutrams.txt share/machxo2/lutrams_map.v share/machxo2/brams.txt share/machxo2/brams_map.v share/nexus/cells_map.v share/nexus/cells_sim.v share/nexus/parse_init.vh share/nexus/cells_xtra.v share/nexus/lutrams_map.v share/nexus/lutrams.txt share/nexus/brams_map.v share/nexus/brams.txt share/nexus/lrams_map.v share/nexus/lrams.txt share/nexus/arith_map.v share/nexus/latches_map.v share/nexus/dsp_map.v share/quicklogic/pp3_ffs_map.v share/quicklogic/pp3_lut_map.v share/quicklogic/pp3_latches_map.v share/quicklogic/pp3_cells_map.v share/quicklogic/cells_sim.v share/quicklogic/lut_sim.v share/quicklogic/pp3_cells_sim.v share/quicklogic/abc9_model.v share/quicklogic/abc9_map.v share/quicklogic/abc9_unmap.v share/sf2/arith_map.v share/sf2/cells_map.v share/sf2/cells_sim.v share/xilinx/cells_map.v share/xilinx/cells_sim.v share/xilinx/cells_xtra.v share/xilinx/lutrams_xcv.txt share/xilinx/lutrams_xcv_map.v share/xilinx/lutrams_xc5v.txt share/xilinx/lutrams_xcu.txt share/xilinx/lutrams_xc5v_map.v share/xilinx/brams_xcv.txt share/xilinx/brams_xcv_map.v share/xilinx/brams_defs.vh share/xilinx/brams_xc2v.txt share/xilinx/brams_xc2v_map.v share/xilinx/brams_xc3sda.txt share/xilinx/brams_xc3sda_map.v share/xilinx/brams_xc4v.txt share/xilinx/brams_xc4v_map.v share/xilinx/brams_xc5v_map.v share/xilinx/brams_xc6v_map.v share/xilinx/brams_xcu_map.v share/xilinx/urams.txt share/xilinx/urams_map.v share/xilinx/arith_map.v share/xilinx/ff_map.v share/xilinx/lut_map.v share/xilinx/mux_map.v share/xilinx/xc3s_mult_map.v share/xilinx/xc3sda_dsp_map.v share/xilinx/xc6s_dsp_map.v share/xilinx/xc4v_dsp_map.v share/xilinx/xc5v_dsp_map.v share/xilinx/xc7_dsp_map.v share/xilinx/xcu_dsp_map.v share/xilinx/abc9_model.v passes/pmgen/test_pmgen_pm.h passes/pmgen/ice40_dsp_pm.h passes/pmgen/ice40_wrapcarry_pm.h passes/pmgen/xilinx_dsp_pm.h passes/pmgen/xilinx_dsp48a_pm.h passes/pmgen/xilinx_dsp_CREG_pm.h passes/pmgen/xilinx_dsp_cascade_pm.h passes/pmgen/peepopt_pm.h passes/pmgen/xilinx_srl_pm.h passes/techmap/filterlib.o techlibs/gatemate/lut_tree_lib.mk .cc rm -f kernel/version_*.o kernel/version_*.cc rm -f libs/*/*.d frontends/*/*.d passes/*/*.d backends/*/*.d kernel/*.d techlibs/*/*.d @@ -1209,26 +1252,30 @@ debian/rules override_dh_auto_build-arch make[1]: Entering directory '/build/yosys-0.23' dh_auto_build -- all - make -j3 "INSTALL=install --strip-program=true" all + make -j4 "INSTALL=install --strip-program=true" all make[2]: Entering directory '/build/yosys-0.23' [Makefile.conf] CONFIG := gcc [Makefile.conf] ABCEXTERNAL=berkeley-abc [Makefile.conf] ABCPULL=0 [Makefile.conf] STRIP=: rm -f kernel/version_*.o kernel/version_*.d kernel/version_*.cc -mkdir -p kernel/ mkdir -p kernel && echo "namespace Yosys { extern const char *yosys_version_str; const char *yosys_version_str=\"Yosys 0.23 (git sha1 7ce5011c24b)\"; }" > kernel/version_7ce5011c24b.cc +mkdir -p kernel/ gcc -o kernel/driver.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/driver.cc mkdir -p techlibs/common python3 techlibs/common/cellhelp.py techlibs/common/simlib.v > techlibs/common/simlib_help.inc.new mkdir -p techlibs/common python3 techlibs/common/cellhelp.py techlibs/common/simcells.v > techlibs/common/simcells_help.inc.new -mv techlibs/common/simlib_help.inc.new techlibs/common/simlib_help.inc mkdir -p kernel/ gcc -o kernel/rtlil.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/rtlil.cc -mv techlibs/common/simcells_help.inc.new techlibs/common/simcells_help.inc +mv techlibs/common/simlib_help.inc.new techlibs/common/simlib_help.inc mkdir -p kernel/ gcc -o kernel/log.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DYOSYS_SRC='"./"' kernel/log.cc +mv techlibs/common/simcells_help.inc.new techlibs/common/simcells_help.inc +mkdir -p kernel/ +gcc -o kernel/calc.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/calc.cc +mkdir -p kernel/ +gcc -o kernel/yosys.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"berkeley-abc"' -DYOSYS_DATDIR='"/usr/share/yosys"' -DYOSYS_PROGRAM_PREFIX='""' kernel/yosys.cc In file included from /usr/include/c++/12/bits/stl_algobase.h:67, from /usr/include/c++/12/bits/stl_tree.h:63, from /usr/include/c++/12/map:60, @@ -1239,10 +1286,6 @@ 260 | operator*() const | ^~~~~~~~ mkdir -p kernel/ -gcc -o kernel/calc.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/calc.cc -mkdir -p kernel/ -gcc -o kernel/yosys.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"berkeley-abc"' -DYOSYS_DATDIR='"/usr/share/yosys"' -DYOSYS_PROGRAM_PREFIX='""' kernel/yosys.cc -mkdir -p kernel/ gcc -o kernel/binding.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/binding.cc mkdir -p kernel/ gcc -o kernel/cellaigs.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/cellaigs.cc @@ -1278,6 +1321,12 @@ gcc -o libs/subcircuit/subcircuit.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/subcircuit/subcircuit.cc mkdir -p libs/ezsat/ gcc -o libs/ezsat/ezsat.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/ezsat/ezsat.cc +mkdir -p libs/ezsat/ +gcc -o libs/ezsat/ezminisat.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/ezsat/ezminisat.cc +mkdir -p libs/minisat/ +gcc -o libs/minisat/Options.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/Options.cc +mkdir -p libs/minisat/ +gcc -o libs/minisat/SimpSolver.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/SimpSolver.cc kernel/satgen.cc: In member function 'bool Yosys::SatGen::importCell(Yosys::RTLIL::Cell*, int)': kernel/satgen.cc:1237:67: warning: 'undef_srst' may be used uninitialized [-Wmaybe-uninitialized] 1237 | std::tie(d, undef_d) = mux(srst, undef_srst, rval, undef_rval, d, undef_d); @@ -1297,12 +1346,6 @@ kernel/satgen.cc:1200:37: note: 'undef_srst' was declared here 1200 | int undef_srst; | ^~~~~~~~~~ -mkdir -p libs/ezsat/ -gcc -o libs/ezsat/ezminisat.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/ezsat/ezminisat.cc -mkdir -p libs/minisat/ -gcc -o libs/minisat/Options.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/Options.cc -mkdir -p libs/minisat/ -gcc -o libs/minisat/SimpSolver.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/SimpSolver.cc In file included from libs/minisat/Sort.h:24, from libs/minisat/SimpSolver.cc:27: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Size) [with T = Minisat::vec; _Size = int; Size = int]': @@ -1318,6 +1361,8 @@ | ^~~ mkdir -p libs/minisat/ gcc -o libs/minisat/Solver.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/Solver.cc +mkdir -p libs/minisat/ +gcc -o libs/minisat/System.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/System.cc In file included from libs/minisat/Alg.h:24, from libs/minisat/Solver.cc:29: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Size) [with T = Minisat::vec; _Size = int; Size = int]': @@ -1331,8 +1376,6 @@ libs/minisat/Vec.h:39:7: note: 'class Minisat::vec' declared here 39 | class vec { | ^~~ -mkdir -p libs/minisat/ -gcc -o libs/minisat/System.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/System.cc mkdir -p libs/fst/ gcc -o libs/fst/fstapi.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/fst/fstapi.cc mkdir -p libs/fst/ @@ -1367,10 +1410,10 @@ mkdir -p frontends/json/ gcc -o frontends/json/jsonparse.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/json/jsonparse.cc mkdir -p frontends/liberty/ -gcc -o frontends/liberty/liberty.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/liberty/liberty.cc mkdir -p frontends/rpc/ -gcc -o frontends/rpc/rpc_frontend.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rpc/rpc_frontend.cc mkdir -p frontends/rtlil/ +gcc -o frontends/liberty/liberty.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/liberty/liberty.cc +gcc -o frontends/rpc/rpc_frontend.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rpc/rpc_frontend.cc bison -o frontends/rtlil/rtlil_parser.tab.cc -d -r all -b frontends/rtlil/rtlil_parser frontends/rtlil/rtlil_parser.y mkdir -p frontends/rtlil/ flex -o frontends/rtlil/rtlil_lexer.cc frontends/rtlil/rtlil_lexer.l @@ -1444,6 +1487,8 @@ gcc -o passes/cmds/qwp.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/qwp.cc mkdir -p passes/cmds/ gcc -o passes/cmds/edgetypes.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/edgetypes.cc +mkdir -p passes/cmds/ +gcc -o passes/cmds/portlist.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/portlist.cc In file included from /usr/include/c++/12/vector:70, from ./kernel/yosys.h:45, from passes/cmds/qwp.cc:20: @@ -1460,6 +1505,8 @@ /usr/include/c++/12/bits/stl_vector.h:1287:28: note: parameter passing for argument of type '__gnu_cxx::__normal_iterator<{anonymous}::QwpWorker::Node*, std::vector<{anonymous}::QwpWorker::Node> >' changed in GCC 7.1 1287 | _M_realloc_insert(end(), __x); | ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~ +mkdir -p passes/cmds/ +gcc -o passes/cmds/chformal.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chformal.cc /usr/include/c++/12/bits/vector.tcc: In member function 'void std::vector<_Tp, _Alloc>::_M_realloc_insert(iterator, _Args&& ...) [with _Args = {const double&}; _Tp = double; _Alloc = std::allocator]': /usr/include/c++/12/bits/vector.tcc:439:7: note: parameter passing for argument of type 'std::vector::iterator' changed in GCC 7.1 439 | vector<_Tp, _Alloc>:: @@ -1532,6 +1579,8 @@ /usr/include/c++/12/bits/stl_algo.h:1854:30: note: parameter passing for argument of type '__gnu_cxx::__normal_iterator*, std::vector > >' changed in GCC 7.1 1854 | std::__insertion_sort(__first, __last, __comp); | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~ +mkdir -p passes/cmds/ +gcc -o passes/cmds/chtype.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chtype.cc In member function 'void std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {std::pair}; _Tp = std::pair; _Alloc = std::allocator >]', inlined from 'void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = std::pair; _Alloc = std::allocator >]' at /usr/include/c++/12/bits/stl_vector.h:1294:21, inlined from 'void {anonymous}::QwpWorker::run_worker(int)' at passes/cmds/qwp.cc:524:25: @@ -1543,12 +1592,6 @@ 526 | std::sort(sorted_pos.begin(), sorted_pos.end()); | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ mkdir -p passes/cmds/ -gcc -o passes/cmds/portlist.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/portlist.cc -mkdir -p passes/cmds/ -gcc -o passes/cmds/chformal.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chformal.cc -mkdir -p passes/cmds/ -gcc -o passes/cmds/chtype.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chtype.cc -mkdir -p passes/cmds/ gcc -o passes/cmds/blackbox.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/blackbox.cc mkdir -p passes/cmds/ gcc -o passes/cmds/ltp.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/ltp.cc @@ -1640,6 +1683,8 @@ gcc -o passes/opt/opt.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_merge.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_merge.cc +mkdir -p passes/opt/ +gcc -o passes/opt/opt_mem.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem.cc In file included from /usr/include/c++/12/vector:70, from passes/memory/memlib.h:24, from passes/memory/memlib.cc:20: @@ -1655,8 +1700,6 @@ 1287 | _M_realloc_insert(end(), __x); | ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~ mkdir -p passes/opt/ -gcc -o passes/opt/opt_mem.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem.cc -mkdir -p passes/opt/ gcc -o passes/opt/opt_mem_feedback.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem_feedback.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_mem_priority.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem_priority.cc @@ -1785,6 +1828,12 @@ gcc -o passes/techmap/iopadmap.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/iopadmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/clkbufmap.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/clkbufmap.cc +mkdir -p passes/techmap/ +gcc -o passes/techmap/hilomap.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/hilomap.cc +mkdir -p passes/techmap/ +gcc -o passes/techmap/extract.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract.cc +mkdir -p passes/techmap/ +gcc -o passes/techmap/extract_fa.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_fa.cc passes/techmap/abc.cc: In member function 'virtual void {anonymous}::AbcPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/techmap/abc.cc:1953:50: warning: 'g_argidx' may be used uninitialized [-Wmaybe-uninitialized] 1953 | cmd_error(args, g_argidx, stringf("Unsupported gate type: %s", g.c_str())); @@ -1793,12 +1842,6 @@ 1671 | size_t argidx, g_argidx; | ^~~~~~~~ mkdir -p passes/techmap/ -gcc -o passes/techmap/hilomap.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/hilomap.cc -mkdir -p passes/techmap/ -gcc -o passes/techmap/extract.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract.cc -mkdir -p passes/techmap/ -gcc -o passes/techmap/extract_fa.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_fa.cc -mkdir -p passes/techmap/ gcc -o passes/techmap/extract_counter.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_counter.cc mkdir -p passes/techmap/ gcc -o passes/techmap/extract_reduce.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_reduce.cc @@ -2242,32 +2285,32 @@ mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/alm_sim.v share/intel_alm/common/alm_sim.v mkdir -p share/intel_alm/common -mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/arith_alm_map.v share/intel_alm/common/arith_alm_map.v +mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dff_map.v share/intel_alm/common/dff_map.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dff_sim.v share/intel_alm/common/dff_sim.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dsp_sim.v share/intel_alm/common/dsp_sim.v mkdir -p share/intel_alm/common -mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dsp_map.v share/intel_alm/common/dsp_map.v +mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/mem_sim.v share/intel_alm/common/mem_sim.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/misc_sim.v share/intel_alm/common/misc_sim.v mkdir -p share/intel_alm/cyclonev cp "./"/techlibs/intel_alm/cyclonev/cells_sim.v share/intel_alm/cyclonev/cells_sim.v mkdir -p share/intel_alm/common -mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/bram_m10k.txt share/intel_alm/common/bram_m10k.txt -cp "./"/techlibs/intel_alm/common/bram_m10k_map.v share/intel_alm/common/bram_m10k_map.v mkdir -p share/intel_alm/common +cp "./"/techlibs/intel_alm/common/bram_m10k_map.v share/intel_alm/common/bram_m10k_map.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/bram_m20k.txt share/intel_alm/common/bram_m20k.txt -cp "./"/techlibs/intel_alm/common/bram_m20k_map.v share/intel_alm/common/bram_m20k_map.v mkdir -p share/intel_alm/common +cp "./"/techlibs/intel_alm/common/bram_m20k_map.v share/intel_alm/common/bram_m20k_map.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/lutram_mlab.txt share/intel_alm/common/lutram_mlab.txt +mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/megafunction_bb.v share/intel_alm/common/megafunction_bb.v mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/quartus_rename.v share/intel_alm/common/quartus_rename.v @@ -2286,26 +2329,26 @@ mkdir -p share/nexus cp "./"/techlibs/nexus/cells_map.v share/nexus/cells_map.v mkdir -p share/nexus -cp "./"/techlibs/nexus/cells_sim.v share/nexus/cells_sim.v mkdir -p share/nexus +cp "./"/techlibs/nexus/cells_sim.v share/nexus/cells_sim.v cp "./"/techlibs/nexus/parse_init.vh share/nexus/parse_init.vh mkdir -p share/nexus -mkdir -p share/nexus cp "./"/techlibs/nexus/cells_xtra.v share/nexus/cells_xtra.v -cp "./"/techlibs/nexus/lutrams_map.v share/nexus/lutrams_map.v mkdir -p share/nexus +cp "./"/techlibs/nexus/lutrams_map.v share/nexus/lutrams_map.v mkdir -p share/nexus cp "./"/techlibs/nexus/lutrams.txt share/nexus/lutrams.txt -cp "./"/techlibs/nexus/brams_map.v share/nexus/brams_map.v mkdir -p share/nexus +cp "./"/techlibs/nexus/brams_map.v share/nexus/brams_map.v mkdir -p share/nexus cp "./"/techlibs/nexus/brams.txt share/nexus/brams.txt +mkdir -p share/nexus cp "./"/techlibs/nexus/lrams_map.v share/nexus/lrams_map.v mkdir -p share/nexus cp "./"/techlibs/nexus/lrams.txt share/nexus/lrams.txt mkdir -p share/nexus -mkdir -p share/nexus cp "./"/techlibs/nexus/arith_map.v share/nexus/arith_map.v +mkdir -p share/nexus cp "./"/techlibs/nexus/latches_map.v share/nexus/latches_map.v mkdir -p share/nexus cp "./"/techlibs/nexus/dsp_map.v share/nexus/dsp_map.v @@ -2316,22 +2359,22 @@ mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_latches_map.v share/quicklogic/pp3_latches_map.v mkdir -p share/quicklogic -mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_cells_map.v share/quicklogic/pp3_cells_map.v -cp "./"/techlibs/quicklogic/cells_sim.v share/quicklogic/cells_sim.v mkdir -p share/quicklogic +cp "./"/techlibs/quicklogic/cells_sim.v share/quicklogic/cells_sim.v mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/lut_sim.v share/quicklogic/lut_sim.v +mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_cells_sim.v share/quicklogic/pp3_cells_sim.v mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/abc9_model.v share/quicklogic/abc9_model.v mkdir -p share/quicklogic -mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/abc9_map.v share/quicklogic/abc9_map.v +mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/abc9_unmap.v share/quicklogic/abc9_unmap.v mkdir -p share/sf2 -mkdir -p share/sf2 cp "./"/techlibs/sf2/arith_map.v share/sf2/arith_map.v +mkdir -p share/sf2 cp "./"/techlibs/sf2/cells_map.v share/sf2/cells_map.v mkdir -p share/sf2 cp "./"/techlibs/sf2/cells_sim.v share/sf2/cells_sim.v @@ -2340,52 +2383,52 @@ mkdir -p share/xilinx cp "./"/techlibs/xilinx/cells_sim.v share/xilinx/cells_sim.v mkdir -p share/xilinx -mkdir -p share/xilinx cp "./"/techlibs/xilinx/cells_xtra.v share/xilinx/cells_xtra.v -cp "./"/techlibs/xilinx/lutrams_xcv.txt share/xilinx/lutrams_xcv.txt mkdir -p share/xilinx -cp "./"/techlibs/xilinx/lutrams_xcv_map.v share/xilinx/lutrams_xcv_map.v mkdir -p share/xilinx +cp "./"/techlibs/xilinx/lutrams_xcv.txt share/xilinx/lutrams_xcv.txt +cp "./"/techlibs/xilinx/lutrams_xcv_map.v share/xilinx/lutrams_xcv_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/lutrams_xc5v.txt share/xilinx/lutrams_xc5v.txt -cp "./"/techlibs/xilinx/lutrams_xcu.txt share/xilinx/lutrams_xcu.txt mkdir -p share/xilinx +cp "./"/techlibs/xilinx/lutrams_xcu.txt share/xilinx/lutrams_xcu.txt mkdir -p share/xilinx cp "./"/techlibs/xilinx/lutrams_xc5v_map.v share/xilinx/lutrams_xc5v_map.v +mkdir -p share/xilinx cp "./"/techlibs/xilinx/brams_xcv.txt share/xilinx/brams_xcv.txt mkdir -p share/xilinx cp "./"/techlibs/xilinx/brams_xcv_map.v share/xilinx/brams_xcv_map.v mkdir -p share/xilinx -mkdir -p share/xilinx cp "./"/techlibs/xilinx/brams_defs.vh share/xilinx/brams_defs.vh -cp "./"/techlibs/xilinx/brams_xc2v.txt share/xilinx/brams_xc2v.txt mkdir -p share/xilinx -cp "./"/techlibs/xilinx/brams_xc2v_map.v share/xilinx/brams_xc2v_map.v mkdir -p share/xilinx +cp "./"/techlibs/xilinx/brams_xc2v.txt share/xilinx/brams_xc2v.txt +cp "./"/techlibs/xilinx/brams_xc2v_map.v share/xilinx/brams_xc2v_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/brams_xc3sda.txt share/xilinx/brams_xc3sda.txt -cp "./"/techlibs/xilinx/brams_xc3sda_map.v share/xilinx/brams_xc3sda_map.v mkdir -p share/xilinx +cp "./"/techlibs/xilinx/brams_xc3sda_map.v share/xilinx/brams_xc3sda_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/brams_xc4v.txt share/xilinx/brams_xc4v.txt -cp "./"/techlibs/xilinx/brams_xc4v_map.v share/xilinx/brams_xc4v_map.v mkdir -p share/xilinx +mkdir -p share/xilinx +cp "./"/techlibs/xilinx/brams_xc4v_map.v share/xilinx/brams_xc4v_map.v cp "./"/techlibs/xilinx/brams_xc5v_map.v share/xilinx/brams_xc5v_map.v mkdir -p share/xilinx -cp "./"/techlibs/xilinx/brams_xc6v_map.v share/xilinx/brams_xc6v_map.v mkdir -p share/xilinx +cp "./"/techlibs/xilinx/brams_xc6v_map.v share/xilinx/brams_xc6v_map.v cp "./"/techlibs/xilinx/brams_xcu_map.v share/xilinx/brams_xcu_map.v mkdir -p share/xilinx -mkdir -p share/xilinx cp "./"/techlibs/xilinx/urams.txt share/xilinx/urams.txt +mkdir -p share/xilinx cp "./"/techlibs/xilinx/urams_map.v share/xilinx/urams_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/arith_map.v share/xilinx/arith_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/ff_map.v share/xilinx/ff_map.v mkdir -p share/xilinx -mkdir -p share/xilinx cp "./"/techlibs/xilinx/lut_map.v share/xilinx/lut_map.v +mkdir -p share/xilinx cp "./"/techlibs/xilinx/mux_map.v share/xilinx/mux_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc3s_mult_map.v share/xilinx/xc3s_mult_map.v @@ -2396,14 +2439,14 @@ cp "./"/techlibs/xilinx/xc6s_dsp_map.v share/xilinx/xc6s_dsp_map.v cp "./"/techlibs/xilinx/xc4v_dsp_map.v share/xilinx/xc4v_dsp_map.v mkdir -p share/xilinx -mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc5v_dsp_map.v share/xilinx/xc5v_dsp_map.v +mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc7_dsp_map.v share/xilinx/xc7_dsp_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/xcu_dsp_map.v share/xilinx/xcu_dsp_map.v mkdir -p share/xilinx -cp "./"/techlibs/xilinx/abc9_model.v share/xilinx/abc9_model.v mkdir -p kernel/ +cp "./"/techlibs/xilinx/abc9_model.v share/xilinx/abc9_model.v gcc -o kernel/version_7ce5011c24b.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/version_7ce5011c24b.cc mkdir -p kernel/ gcc -o kernel/register.o -c -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/register.cc @@ -2439,21 +2482,21 @@ make[1]: Entering directory '/build/yosys-0.23' sed -i 's/REPLACEWITHDATE/December 03, 2022/' manual/presentation.tex PDF_DATE=D:20221203221520Z dh_auto_build -- all manual - make -j3 "INSTALL=install --strip-program=true" all manual + make -j4 "INSTALL=install --strip-program=true" all manual make[2]: Entering directory '/build/yosys-0.23' [Makefile.conf] CONFIG := gcc [Makefile.conf] ABCEXTERNAL=berkeley-abc [Makefile.conf] ABCPULL=0 [Makefile.conf] STRIP=: - cd manual && PDF_DATE=D:20221203221520Z bash appnotes.sh - Build successful. + Build successful. + for job in APPNOTE_010_Verilog_to_BLIF APPNOTE_011_Design_Investigation APPNOTE_012_Verilog_to_BTOR + '[' -f APPNOTE_010_Verilog_to_BLIF.ok -a APPNOTE_010_Verilog_to_BLIF.ok -nt APPNOTE_010_Verilog_to_BLIF.tex ']' + '[' -f APPNOTE_010_Verilog_to_BLIF/make.sh ']' ++ '[' -f APPNOTE_010_Verilog_to_BLIF.aux ']' ++ true + + old_md5= + pdflatex -shell-escape -halt-on-error '\pdfinfo{/CreationDate(D:20221203221520Z)/ModDate(D:20221203221520Z)}\input{APPNOTE_010_Verilog_to_BLIF.tex}' This is pdfTeX, Version 3.141592653-2.6-1.40.24 (TeX Live 2022/Debian) (preloaded format=pdflatex) @@ -5464,9 +5507,9 @@ Dumping module counter to page 1. Exec: dot -Tpdf 'counter_03.dot' > 'counter_03.pdf.new' && mv 'counter_03.pdf.new' 'counter_03.pdf' -End of script. Logfile hash: a1e6cccca1, CPU: user 0.77s system 0.12s, MEM: 10.00 MB peak +End of script. Logfile hash: a1e6cccca1, CPU: user 0.20s system 0.01s, MEM: 9.98 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 76% 4x show (4 sec), 11% 1x abc (0 sec), ... +Time spent: 78% 4x show (1 sec), 11% 1x abc (0 sec), ... make[3]: Leaving directory '/build/yosys-0.23/manual/PRESENTATION_Intro' + sed -i 's#/CreationDate (D:[^)]\+)#/CreationDate (D:20221203221520Z)#' PRESENTATION_Intro/counter_00.pdf PRESENTATION_Intro/counter_01.pdf PRESENTATION_Intro/counter_02.pdf PRESENTATION_Intro/counter_03.pdf + make -C PRESENTATION_ExSyn @@ -5561,9 +5604,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'proc_01.dot' > 'proc_01.pdf.new' && mv 'proc_01.pdf.new' 'proc_01.pdf' -End of script. Logfile hash: c6fd6e6895, CPU: user 0.06s system 0.02s, MEM: 8.60 MB peak +End of script. Logfile hash: c6fd6e6895, CPU: user 0.02s system 0.00s, MEM: 8.51 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 96% 1x show (1 sec), 1% 1x clean (0 sec), ... +Time spent: 97% 1x show (0 sec), 0% 1x clean (0 sec), ... ../../yosys -p 'script proc_02.ys; show -notitle -prefix proc_02 -format pdf' /----------------------------------------------------------------------------\ @@ -5655,9 +5698,9 @@ Exec: dot -Tpdf 'proc_02.dot' > 'proc_02.pdf.new' && mv 'proc_02.pdf.new' 'proc_02.pdf' Warnings: 1 unique messages, 1 total -End of script. Logfile hash: 6c9c8edaef, CPU: user 0.06s system 0.02s, MEM: 8.59 MB peak +End of script. Logfile hash: 6c9c8edaef, CPU: user 0.02s system 0.00s, MEM: 8.61 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 97% 1x show (1 sec), 1% 1x clean (0 sec), ... +Time spent: 97% 1x show (0 sec), 0% 1x clean (0 sec), ... ../../yosys -p 'script proc_03.ys; show -notitle -prefix proc_03 -format pdf' /----------------------------------------------------------------------------\ @@ -5746,9 +5789,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'proc_03.dot' > 'proc_03.pdf.new' && mv 'proc_03.pdf.new' 'proc_03.pdf' -End of script. Logfile hash: 13c48860df, CPU: user 0.06s system 0.03s, MEM: 8.59 MB peak +End of script. Logfile hash: 13c48860df, CPU: user 0.02s system 0.00s, MEM: 8.52 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 96% 1x show (1 sec), 1% 1x clean (0 sec), ... +Time spent: 97% 1x show (0 sec), 0% 1x clean (0 sec), ... ../../yosys -p 'script opt_01.ys; show -notitle -prefix opt_01 -format pdf' /----------------------------------------------------------------------------\ @@ -5860,9 +5903,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'opt_01.dot' > 'opt_01.pdf.new' && mv 'opt_01.pdf.new' 'opt_01.pdf' -End of script. Logfile hash: 9f52b2c276, CPU: user 0.10s system 0.03s, MEM: 8.62 MB peak +End of script. Logfile hash: 9f52b2c276, CPU: user 0.03s system 0.01s, MEM: 8.62 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 92% 1x show (1 sec), 2% 3x opt_expr (0 sec), ... +Time spent: 93% 1x show (0 sec), 2% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_02.ys; show -notitle -prefix opt_02 -format pdf' /----------------------------------------------------------------------------\ @@ -5971,9 +6014,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'opt_02.dot' > 'opt_02.pdf.new' && mv 'opt_02.pdf.new' 'opt_02.pdf' -End of script. Logfile hash: 5a4000bb43, CPU: user 0.15s system 0.02s, MEM: 8.58 MB peak +End of script. Logfile hash: 5a4000bb43, CPU: user 0.03s system 0.01s, MEM: 8.51 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 90% 1x show (1 sec), 3% 3x opt_expr (0 sec), ... +Time spent: 93% 1x show (0 sec), 2% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_03.ys; show -notitle -prefix opt_03 -format pdf' /----------------------------------------------------------------------------\ @@ -6082,9 +6125,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'opt_03.dot' > 'opt_03.pdf.new' && mv 'opt_03.pdf.new' 'opt_03.pdf' -End of script. Logfile hash: 0cd024bc02, CPU: user 0.11s system 0.03s, MEM: 8.60 MB peak +End of script. Logfile hash: 0cd024bc02, CPU: user 0.03s system 0.01s, MEM: 8.59 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 92% 1x show (1 sec), 2% 3x opt_expr (0 sec), ... +Time spent: 93% 1x show (0 sec), 2% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_04.ys; show -notitle -prefix opt_04 -format pdf' /----------------------------------------------------------------------------\ @@ -6273,9 +6316,9 @@ Exec: dot -Tpdf 'opt_04.dot' > 'opt_04.pdf.new' && mv 'opt_04.pdf.new' 'opt_04.pdf' Warnings: 4 unique messages, 4 total -End of script. Logfile hash: 350e16de2a, CPU: user 0.14s system 0.03s, MEM: 8.48 MB peak +End of script. Logfile hash: 350e16de2a, CPU: user 0.03s system 0.01s, MEM: 8.56 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 90% 1x show (1 sec), 3% 4x opt_expr (0 sec), ... +Time spent: 91% 1x show (0 sec), 2% 4x opt_expr (0 sec), ... ../../yosys -p 'script memory_01.ys; show -notitle -prefix memory_01 -format pdf' /----------------------------------------------------------------------------\ @@ -6501,9 +6544,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'memory_01.dot' > 'memory_01.pdf.new' && mv 'memory_01.pdf.new' 'memory_01.pdf' -End of script. Logfile hash: d4215140a5, CPU: user 0.25s system 0.02s, MEM: 8.72 MB peak +End of script. Logfile hash: d4215140a5, CPU: user 0.07s system 0.00s, MEM: 8.73 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 83% 1x show (1 sec), 4% 5x opt_expr (0 sec), ... +Time spent: 84% 1x show (0 sec), 3% 5x opt_expr (0 sec), ... ../../yosys -p 'script memory_02.ys; show -notitle -prefix memory_02 -format pdf' /----------------------------------------------------------------------------\ @@ -6763,9 +6806,9 @@ Exec: dot -Tpdf 'memory_02.dot' > 'memory_02.pdf.new' && mv 'memory_02.pdf.new' 'memory_02.pdf' Warnings: 7 unique messages, 7 total -End of script. Logfile hash: 38542be5e8, CPU: user 0.30s system 0.02s, MEM: 8.73 MB peak +End of script. Logfile hash: 38542be5e8, CPU: user 0.07s system 0.01s, MEM: 8.62 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 81% 1x show (1 sec), 4% 5x opt_expr (0 sec), ... +Time spent: 84% 1x show (0 sec), 3% 5x opt_clean (0 sec), ... ../../yosys -p 'script techmap_01.ys; show -notitle -prefix techmap_01 -format pdf' /----------------------------------------------------------------------------\ @@ -6835,9 +6878,9 @@ Exec: dot -Tpdf 'techmap_01.dot' > 'techmap_01.pdf.new' && mv 'techmap_01.pdf.new' 'techmap_01.pdf' Warnings: 7 unique messages, 7 total -End of script. Logfile hash: f7cde0dc8c, CPU: user 0.07s system 0.03s, MEM: 8.61 MB peak +End of script. Logfile hash: f7cde0dc8c, CPU: user 0.03s system 0.00s, MEM: 8.34 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 96% 1x show (1 sec), 1% 1x techmap (0 sec), ... +Time spent: 96% 1x show (0 sec), 1% 1x techmap (0 sec), ... ../../yosys -p 'script abc_01.ys; show -notitle -prefix abc_01 -format pdf' /----------------------------------------------------------------------------\ @@ -7085,9 +7128,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'abc_01.dot' > 'abc_01.pdf.new' && mv 'abc_01.pdf.new' 'abc_01.pdf' -End of script. Logfile hash: 12acbed0ed, CPU: user 0.34s system 0.04s, MEM: 10.03 MB peak +End of script. Logfile hash: 12acbed0ed, CPU: user 0.08s system 0.02s, MEM: 10.11 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 60% 1x show (1 sec), 23% 1x abc (0 sec), ... +Time spent: 63% 1x show (0 sec), 22% 1x abc (0 sec), ... make[3]: Leaving directory '/build/yosys-0.23/manual/PRESENTATION_ExSyn' + sed -i 's#/CreationDate (D:[^)]\+)#/CreationDate (D:20221203221520Z)#' PRESENTATION_ExSyn/abc_01.pdf PRESENTATION_ExSyn/memory_01.pdf PRESENTATION_ExSyn/memory_02.pdf PRESENTATION_ExSyn/opt_01.pdf PRESENTATION_ExSyn/opt_02.pdf PRESENTATION_ExSyn/opt_03.pdf PRESENTATION_ExSyn/opt_04.pdf PRESENTATION_ExSyn/proc_01.pdf PRESENTATION_ExSyn/proc_02.pdf PRESENTATION_ExSyn/proc_03.pdf PRESENTATION_ExSyn/techmap_01.pdf + make -C PRESENTATION_ExAdv @@ -7243,9 +7286,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'select.dot' > 'select.pdf.new' && mv 'select.pdf.new' 'select.pdf' -End of script. Logfile hash: 75f2ae3a3a, CPU: user 0.19s system 0.03s, MEM: 8.73 MB peak +End of script. Logfile hash: 75f2ae3a3a, CPU: user 0.05s system 0.00s, MEM: 8.73 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 87% 1x show (1 sec), 4% 4x opt_expr (0 sec), ... +Time spent: 89% 1x show (0 sec), 3% 4x opt_expr (0 sec), ... ../../yosys red_or3x1_test.ys /----------------------------------------------------------------------------\ @@ -7316,9 +7359,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'red_or3x1.dot' > 'red_or3x1.pdf.new' && mv 'red_or3x1.pdf.new' 'red_or3x1.pdf' -End of script. Logfile hash: 129023a082, CPU: user 0.09s system 0.03s, MEM: 8.64 MB peak +End of script. Logfile hash: 129023a082, CPU: user 0.02s system 0.01s, MEM: 8.64 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 95% 1x show (1 sec), 2% 1x techmap (0 sec), ... +Time spent: 96% 1x show (0 sec), 1% 1x techmap (0 sec), ... ../../yosys sym_mul_test.ys /----------------------------------------------------------------------------\ @@ -7385,9 +7428,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'sym_mul.dot' > 'sym_mul.pdf.new' && mv 'sym_mul.pdf.new' 'sym_mul.pdf' -End of script. Logfile hash: 772afb568b, CPU: user 0.06s system 0.03s, MEM: 8.35 MB peak +End of script. Logfile hash: 772afb568b, CPU: user 0.01s system 0.01s, MEM: 8.64 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 96% 1x show (1 sec), 1% 4x read_verilog (0 sec), ... +Time spent: 97% 1x show (0 sec), 0% 1x clean (0 sec), ... ../../yosys mymul_test.ys /----------------------------------------------------------------------------\ @@ -7490,9 +7533,9 @@ Exec: dot -Tpdf 'mymul.dot' > 'mymul.pdf.new' && mv 'mymul.pdf.new' 'mymul.pdf' Warnings: 1 unique messages, 1 total -End of script. Logfile hash: 126d691da5, CPU: user 0.19s system 0.02s, MEM: 8.89 MB peak +End of script. Logfile hash: 126d691da5, CPU: user 0.04s system 0.00s, MEM: 8.97 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 89% 1x show (1 sec), 2% 2x clean (0 sec), ... +Time spent: 91% 1x show (0 sec), 2% 2x clean (0 sec), ... ../../yosys mulshift_test.ys /----------------------------------------------------------------------------\ @@ -7565,9 +7608,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'mulshift.dot' > 'mulshift.pdf.new' && mv 'mulshift.pdf.new' 'mulshift.pdf' -End of script. Logfile hash: e867b57f97, CPU: user 0.20s system 0.03s, MEM: 8.93 MB peak +End of script. Logfile hash: e867b57f97, CPU: user 0.04s system 0.01s, MEM: 8.84 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 86% 1x show (1 sec), 4% 1x techmap (0 sec), ... +Time spent: 89% 1x show (0 sec), 3% 3x clean (0 sec), ... ../../yosys addshift_test.ys /----------------------------------------------------------------------------\ @@ -7627,9 +7670,9 @@ Dumping module test to page 1. Exec: dot -Tpdf 'addshift.dot' > 'addshift.pdf.new' && mv 'addshift.pdf.new' 'addshift.pdf' -End of script. Logfile hash: d1e94967df, CPU: user 0.07s system 0.02s, MEM: 8.57 MB peak +End of script. Logfile hash: d1e94967df, CPU: user 0.02s system 0.00s, MEM: 8.58 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 97% 1x show (1 sec), 1% 1x clean (0 sec), ... +Time spent: 97% 1x show (0 sec), 0% 1x clean (0 sec), ... ../../yosys macc_simple_test.ys /----------------------------------------------------------------------------\ @@ -7986,9 +8029,9 @@ Dumping module macc_16_16_32 to page 1. Exec: dot -Tpdf 'macc_simple_xmap.dot' > 'macc_simple_xmap.pdf.new' && mv 'macc_simple_xmap.pdf.new' 'macc_simple_xmap.pdf' -End of script. Logfile hash: 4903010725, CPU: user 0.35s system 0.06s, MEM: 8.53 MB peak +End of script. Logfile hash: 4903010725, CPU: user 0.08s system 0.02s, MEM: 8.42 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 96% 7x show (8 sec), 1% 7x clean (0 sec), ... +Time spent: 97% 7x show (2 sec), 0% 7x clean (0 sec), ... ../../yosys macc_xilinx_test.ys /----------------------------------------------------------------------------\ @@ -8277,9 +8320,9 @@ Exec: dot -Tpdf 'macc_xilinx_xmap.dot' > 'macc_xilinx_xmap.pdf.new' && mv 'macc_xilinx_xmap.pdf.new' 'macc_xilinx_xmap.pdf' Warnings: 15 unique messages, 54 total -End of script. Logfile hash: 1adef8c574, CPU: user 0.95s system 0.06s, MEM: 9.53 MB peak +End of script. Logfile hash: 1adef8c574, CPU: user 0.23s system 0.02s, MEM: 9.49 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 93% 11x show (12 sec), 2% 12x clean (0 sec), ... +Time spent: 94% 11x show (3 sec), 2% 12x clean (0 sec), ... make[3]: Leaving directory '/build/yosys-0.23/manual/PRESENTATION_ExAdv' + sed -i 's#/CreationDate (D:[^)]\+)#/CreationDate (D:20221203221520Z)#' PRESENTATION_ExAdv/addshift.pdf PRESENTATION_ExAdv/macc_simple_test_00a.pdf PRESENTATION_ExAdv/macc_simple_test_00b.pdf PRESENTATION_ExAdv/macc_simple_test_01a.pdf PRESENTATION_ExAdv/macc_simple_test_01b.pdf PRESENTATION_ExAdv/macc_simple_test_02a.pdf PRESENTATION_ExAdv/macc_simple_test_02b.pdf PRESENTATION_ExAdv/macc_simple_xmap.pdf PRESENTATION_ExAdv/macc_xilinx_test1a.pdf PRESENTATION_ExAdv/macc_xilinx_test1b.pdf PRESENTATION_ExAdv/macc_xilinx_test1c.pdf PRESENTATION_ExAdv/macc_xilinx_test1d.pdf PRESENTATION_ExAdv/macc_xilinx_test1e.pdf PRESENTATION_ExAdv/macc_xilinx_test2a.pdf PRESENTATION_ExAdv/macc_xilinx_test2b.pdf PRESENTATION_ExAdv/macc_xilinx_test2c.pdf PRESENTATION_ExAdv/macc_xilinx_test2d.pdf PRESENTATION_ExAdv/macc_xilinx_test2e.pdf PRESENTATION_ExAdv/macc_xilinx_xmap.pdf PRESENTATION_ExAdv/mulshift.pdf PRESENTATION_ExAdv/mymul.pdf PRESENTATION_ExAdv/red_or3x1.pdf PRESENTATION_ExAdv/select.pdf PRESENTATION_ExAdv/sym_mul.pdf + make -C PRESENTATION_ExOth @@ -8435,9 +8478,9 @@ \out 632435482 25b2331a 00100101101100100011001100011010 Warnings: 6 unique messages, 8 total -End of script. Logfile hash: 2a009ab0aa, CPU: user 0.21s system 0.03s, MEM: 9.07 MB peak +End of script. Logfile hash: 2a009ab0aa, CPU: user 0.05s system 0.00s, MEM: 9.06 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 93% 2x show (2 sec), 1% 1x submod (0 sec), ... +Time spent: 94% 2x show (0 sec), 1% 1x sat (0 sec), ... ../../yosys -l equiv.log_new equiv.ys /----------------------------------------------------------------------------\ @@ -8523,9 +8566,9 @@ \____ $$$|__/|________/|__/|_______/|__/ \__/ -End of script. Logfile hash: 40f4b7a027, CPU: user 0.17s system 0.02s, MEM: 9.27 MB peak +End of script. Logfile hash: 40f4b7a027, CPU: user 0.05s system 0.00s, MEM: 9.29 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 74% 1x sat (0 sec), 15% 1x techmap (0 sec), ... +Time spent: 75% 1x sat (0 sec), 14% 1x techmap (0 sec), ... mv equiv.log_new equiv.log ../../yosys -l axis_test.log_new axis_test.ys @@ -9503,9 +9546,9 @@ init \uut.tdata 64 40 01000000 init \uut.tvalid 1 1 1 -End of script. Logfile hash: 47aa44b032, CPU: user 12.29s system 0.85s, MEM: 84.57 MB peak +End of script. Logfile hash: 47aa44b032, CPU: user 3.61s system 0.15s, MEM: 84.62 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 98% 1x sat (12 sec), 0% 3x read_verilog (0 sec), ... +Time spent: 98% 1x sat (3 sec), 0% 3x read_verilog (0 sec), ... mv axis_test.log_new axis_test.log make[3]: Leaving directory '/build/yosys-0.23/manual/PRESENTATION_ExOth' + sed -i 's#/CreationDate (D:[^)]\+)#/CreationDate (D:20221203221520Z)#' PRESENTATION_ExOth/scrambler_p01.pdf PRESENTATION_ExOth/scrambler_p02.pdf @@ -9530,9 +9573,9 @@ Modules in current design: $abstract\absval_ref (0 wires, 0 cells) -End of script. Logfile hash: a25069ff9d, CPU: user 0.03s system 0.03s, MEM: 8.85 MB peak +End of script. Logfile hash: a25069ff9d, CPU: user 0.01s system 0.01s, MEM: 8.78 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 95% 2x read_verilog (0 sec), 2% 1x my_cmd (0 sec), ... +Time spent: 93% 2x read_verilog (0 sec), 3% 1x read (0 sec), ... mv test0.log_new test0.log ../../yosys -Ql test1.log_new -m ./my_cmd.so -p 'clean; test1; dump' absval_ref.v @@ -9578,9 +9621,9 @@ module $abstract\absval_ref end -End of script. Logfile hash: 01cda1039c, CPU: user 0.03s system 0.03s, MEM: 8.87 MB peak +End of script. Logfile hash: 01cda1039c, CPU: user 0.01s system 0.00s, MEM: 8.71 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 75% 1x clean (0 sec), 16% 2x read_verilog (0 sec), ... +Time spent: 71% 1x clean (0 sec), 19% 2x read_verilog (0 sec), ... mv test1.log_new test1.log ../../yosys -Ql test2.log_new -m ./my_cmd.so -p 'hierarchy -top test; test2' sigmap_test.v @@ -9621,9 +9664,9 @@ Log message #8. Log message #9. -End of script. Logfile hash: 8350de3c5a, CPU: user 0.04s system 0.02s, MEM: 8.87 MB peak +End of script. Logfile hash: 8350de3c5a, CPU: user 0.01s system 0.00s, MEM: 8.86 MB peak Yosys 0.23 (git sha1 7ce5011c24b) -Time spent: 47% 2x read_verilog (0 sec), 39% 1x hierarchy (0 sec), ... +Time spent: 60% 2x read_verilog (0 sec), 30% 1x hierarchy (0 sec), ... mv test2.log_new test2.log make[3]: Leaving directory '/build/yosys-0.23/manual/PRESENTATION_Prog' + set -ex @@ -16353,7 +16396,7 @@ debian/rules override_dh_auto_test make[1]: Entering directory '/build/yosys-0.23' dh_auto_test - make -j3 test + make -j4 test make[2]: Entering directory '/build/yosys-0.23' [Makefile.conf] CONFIG := gcc [Makefile.conf] ABCEXTERNAL=berkeley-abc @@ -16364,61 +16407,61 @@ + gcc -Wall -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -o /build/yosys-0.23/tests/tools/cmp_tbdata /build/yosys-0.23/tests/tools/cmp_tbdata.c + gcc -Wall -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -o /build/yosys-0.23/tests/tools/cmp_tbdata /build/yosys-0.23/tests/tools/cmp_tbdata.c + gcc -Wall -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -o /build/yosys-0.23/tests/tools/cmp_tbdata /build/yosys-0.23/tests/tools/cmp_tbdata.c -Test: case_expr_extend -> ok ++ gcc -Wall -g -O2 -ffile-prefix-map=/build/yosys-0.23=. -fstack-protector-strong -Wformat -Werror=format-security -o /build/yosys-0.23/tests/tools/cmp_tbdata /build/yosys-0.23/tests/tools/cmp_tbdata.c Test: case_expr_query -> ok +Test: case_expr_extend -> ok Test: arrays02 -> ok Test: implicit_ports -> ok -Test: defvalue -> ok Test: lesser_size_cast -> ok +Test: defvalue -> ok Test: local_loop_var -> ok Test: matching_end_labels -> ok Test: memwr_port_connection -> ok Test: unnamed_block_decl -> ok Test: macro_arg_spaces -> ok -Test: always01 -> ok Test: aes_kexp128 -> ok +Test: always01 -> ok Test: always02 -> ok -Test: asgn_binop -> ok Test: always03 -> ok -Test: arrays01 -> ok Test: arraycells -> ok +Test: arrays01 -> ok +Test: asgn_binop -> ok Test: attrib01_module -> ok Test: attrib02_port_decl -> ok Test: attrib03_parameter -> ok -Test: attrib04_net_var -> ok Test: attrib06_operator_suffix -> ok +Test: attrib04_net_var -> ok Test: attrib08_mod_inst -> ok -Test: attrib09_case -> ok Test: case_expr_const -> ok -Test: carryadd -> ok Test: case_expr_non_const -> ok +Test: carryadd -> ok +Test: attrib09_case -> ok Test: const_branch_finish -> ok Test: const_fold_func -> ok Test: const_func_shadow -> ok Test: constpower -> ok -Test: constmuldivmod -> ok Test: dff_different_styles -> ok Test: dff_init -> ok Test: fiedler-cooley -> ok +Test: constmuldivmod -> ok Test: forgen01 -> ok Test: forgen02 -> ok Test: forloops -> ok -Test: dynslice -> ok Test: fsm -> ok +Test: dynslice -> ok Test: func_block -> ok Test: func_recurse -> ok -Test: genblk_collide -> ok Test: genblk_dive -> ok +Test: genblk_collide -> ok Test: func_width_scope -> ok Test: genblk_order -> ok Test: genblk_port_shadow -> ok Test: graphtest -> ok Test: hierarchy -> ok Test: hierdefparam -> ok -Test: case_large -> ok -Test: ifdef_1 -> ok Test: i2c_master_tests -> ok Test: ifdef_2 -> ok +Test: ifdef_1 -> ok Test: localparam_attr -> ok Test: loop_prefix_case -> ok Test: loop_var_shadow -> ok @@ -16426,81 +16469,81 @@ Test: loops -> ok Test: macros -> ok Test: mem2reg_bounds_tern -> ok +Test: case_large -> ok Test: generate -> ok Test: mem2reg -> ok +Test: module_scope -> ok Test: mem_arst -> ok Test: module_scope_case -> ok -Test: module_scope -> ok -Test: muxtree -> ok Test: named_genblk -> ok Test: nested_genblk_resolve -> ok -Test: multiplier -> ok +Test: muxtree -> ok Test: omsp_dbg_uart -> ok Test: param_attr -> ok +Test: multiplier -> ok Test: paramods -> ok -Test: operators -> ok Test: process -> ok Test: realexpr -> ok -Test: memory -> ok -Test: partsel -> ok -Test: retime -> ok Test: repwhile -> ok +Test: retime -> ok +Test: operators -> ok Test: scopes -> ok +Test: partsel -> ok Test: signed_full_slice -> ok Test: signedexpr -> ok Test: specify -> ok Test: string_format -> ok +Test: memory -> ok Test: subbytes -> ok -Test: sincos -> ok Test: undef_eqx_nex -> ok -Test: task_func -> ok +Test: sincos -> ok Test: usb_phy_tests -> ok Test: verilog_primitives -> ok +Test: task_func -> ok Test: values -> ok -Test: vloghammer -> ok -Test: wandwor -> ok Test: rotate -> ok +Test: wandwor -> ok +Test: vloghammer -> ok Test: wreduce -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/simple' cd tests/simple_abc9 && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/simple_abc9' +Test: always02 -> ok Test: always01 -> ok Test: aes_kexp128 -> ok -Test: always02 -> ok Test: always03 -> ok Test: arrays01 -> ok Test: arraycells -> ok Test: attrib01_module -> ok Test: attrib02_port_decl -> ok -Test: attrib04_net_var -> ok Test: attrib03_parameter -> ok -Test: attrib08_mod_inst -> ok +Test: attrib04_net_var -> ok Test: attrib06_operator_suffix -> ok +Test: attrib08_mod_inst -> ok Test: attrib09_case -> ok Test: case_expr_const -> ok Test: carryadd -> ok Test: case_expr_non_const -> ok Test: const_branch_finish -> ok Test: const_fold_func -> ok -Test: abc9 -> ok Test: const_func_shadow -> ok Test: constpower -> ok +Test: abc9 -> ok Test: dff_different_styles -> ok Test: dff_init -> ok -Test: constmuldivmod -> ok Test: fiedler-cooley -> ok Test: forgen01 -> ok +Test: constmuldivmod -> ok Test: forgen02 -> ok Test: forloops -> ok Test: fsm -> ok Test: func_block -> ok Test: func_recurse -> ok -Test: func_width_scope -> ok Test: genblk_collide -> ok +Test: func_width_scope -> ok Test: genblk_dive -> ok Test: genblk_order -> ok Test: genblk_port_shadow -> ok -Test: generate -> ok Test: graphtest -> ok Test: hierarchy -> ok Test: hierdefparam -> ok @@ -16510,9 +16553,9 @@ Test: localparam_attr -> ok Test: loop_prefix_case -> ok Test: loop_var_shadow -> ok -Test: loops -> ok +Test: generate -> ok Test: macro_arg_surrounding_spaces -> ok -Test: dynslice -> ok +Test: loops -> ok Test: macros -> ok Test: mem2reg_bounds_tern -> ok Test: mem2reg -> ok @@ -16522,74 +16565,75 @@ Test: multiplier -> ok Test: muxtree -> ok Test: named_genblk -> ok -Test: case_large -> ok Test: nested_genblk_resolve -> ok Test: omsp_dbg_uart -> ok +Test: dynslice -> ok Test: param_attr -> ok -Test: paramods -> ok Test: memory -> ok +Test: paramods -> ok Test: process -> ok Test: realexpr -> ok Test: repwhile -> ok Test: retime -> ok Test: rotate -> ok +Test: case_large -> ok Test: scopes -> ok -Test: signed_full_slice -> ok Test: signedexpr -> ok +Test: signed_full_slice -> ok Test: partsel -> ok Test: string_format -> ok Test: subbytes -> ok -Test: operators -> ok Test: undef_eqx_nex -> ok Test: usb_phy_tests -> ok +Test: operators -> ok Test: task_func -> ok Test: verilog_primitives -> ok Test: values -> ok Test: wandwor -> ok Test: vloghammer -> ok -Test: arrays02 -> ok Test: sincos -> ok +Test: arrays02 -> ok Test: case_expr_extend -> ok Test: case_expr_query -> ok Test: defvalue -> ok +Test: wreduce -> ok Test: implicit_ports -> ok -Test: asgn_binop -> ok -Test: lesser_size_cast -> ok Test: local_loop_var -> ok +Test: lesser_size_cast -> ok Test: matching_end_labels -> ok -Test: wreduce -> ok Test: memwr_port_connection -> ok Test: unnamed_block_decl -> ok +Test: asgn_binop -> ok Test: macro_arg_spaces -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/simple_abc9' cd tests/hana && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/hana' Test: test_parse2synthtrans -> ok Test: test_parser -> ok -Test: test_simulation_and -> ok Test: test_simulation_always -> ok Test: test_simulation_buffer -> ok +Test: test_simulation_and -> ok Test: test_simulation_inc -> ok Test: test_simulation_decoder -> ok +Test: test_simulation_mux -> ok +Test: test_intermout -> ok Test: test_simulation_nand -> ok Test: test_simulation_nor -> ok -Test: test_intermout -> ok -Test: test_simulation_mux -> ok Test: test_simulation_seq -> ok Test: test_simulation_or -> ok Test: test_simulation_sop -> ok -Test: test_simulation_techmap -> ok Test: test_simulation_vlib -> ok -Test: test_simulation_xnor -> ok +Test: test_simulation_techmap -> ok Test: test_simulation_shifter -> ok +Test: test_simulation_xnor -> ok Test: test_simulation_xor -> ok Test: test_simulation_techmap_tech -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/hana' cd tests/asicworld && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/asicworld' +Test: code_hdl_models_clk_div -> ok Test: code_hdl_models_GrayCounter -> ok Test: code_hdl_models_arbiter -> ok -Test: code_hdl_models_clk_div -> ok Test: code_hdl_models_d_ff_gates -> ok Test: code_hdl_models_clk_div_45 -> ok Test: code_hdl_models_d_latch_gates -> ok @@ -16597,10 +16641,10 @@ Test: code_hdl_models_decoder_using_assign -> ok Test: code_hdl_models_decoder_using_case -> ok Test: code_hdl_models_dff_async_reset -> ok -Test: code_hdl_models_dff_sync_reset -> ok Test: code_hdl_models_encoder_4to2_gates -> ok -Test: code_hdl_models_encoder_using_case -> ok +Test: code_hdl_models_dff_sync_reset -> ok Test: code_hdl_models_full_adder_gates -> ok +Test: code_hdl_models_encoder_using_case -> ok Test: code_hdl_models_encoder_using_if -> ok Test: code_hdl_models_full_subtracter_gates -> ok Test: code_hdl_models_gray_counter -> ok @@ -16608,59 +16652,59 @@ Test: code_hdl_models_lfsr -> ok Test: code_hdl_models_lfsr_updown -> ok Test: code_hdl_models_mux_2to1_gates -> ok -Test: code_hdl_models_mux_using_assign -> ok Test: code_hdl_models_mux_using_case -> ok +Test: code_hdl_models_mux_using_assign -> ok Test: code_hdl_models_mux_using_if -> ok Test: code_hdl_models_one_hot_cnt -> ok -Test: code_hdl_models_parity_using_assign -> ok Test: code_hdl_models_parallel_crc -> ok +Test: code_hdl_models_parity_using_assign -> ok Test: code_hdl_models_parity_using_bitwise -> ok Test: code_hdl_models_parity_using_function -> ok Test: code_hdl_models_rom_using_case -> ok Test: code_hdl_models_pri_encoder_using_assign -> ok -Test: code_hdl_models_tff_async_reset -> ok Test: code_hdl_models_serial_crc -> ok +Test: code_hdl_models_tff_async_reset -> ok Test: code_hdl_models_tff_sync_reset -> ok Test: code_hdl_models_up_counter -> ok Test: code_hdl_models_up_counter_load -> ok Test: code_hdl_models_up_down_counter -> ok -Test: code_hdl_models_uart -> ok +Test: code_specman_switch_fabric -> ok Test: code_tidbits_asyn_reset -> ok Test: code_tidbits_blocking -> ok -Test: code_specman_switch_fabric -> ok +Test: code_hdl_models_uart -> ok Test: code_tidbits_fsm_using_always -> ok Test: code_tidbits_fsm_using_function -> ok Test: code_tidbits_nonblocking -> ok Test: code_tidbits_fsm_using_single_always -> ok Test: code_tidbits_reg_combo_example -> ok Test: code_tidbits_reg_seq_example -> ok -Test: code_tidbits_syn_reset -> ok Test: code_tidbits_wire_example -> ok +Test: code_tidbits_syn_reset -> ok Test: code_verilog_tutorial_addbit -> ok Test: code_verilog_tutorial_always_example -> ok Test: code_verilog_tutorial_bus_con -> ok Test: code_verilog_tutorial_comment -> ok Test: code_verilog_tutorial_counter -> ok Test: code_verilog_tutorial_d_ff -> ok +Test: code_verilog_tutorial_escape_id -> ok Test: code_verilog_tutorial_decoder -> ok Test: code_verilog_tutorial_decoder_always -> ok -Test: code_hdl_models_cam -> ok -Test: code_verilog_tutorial_escape_id -> ok Test: code_verilog_tutorial_first_counter -> ok -Test: code_verilog_tutorial_explicit -> ok Test: code_verilog_tutorial_flip_flop -> ok -Test: code_verilog_tutorial_if_else -> ok +Test: code_verilog_tutorial_explicit -> ok Test: code_verilog_tutorial_good_code -> ok -Test: code_verilog_tutorial_fsm_full -> ok +Test: code_verilog_tutorial_if_else -> ok Test: code_verilog_tutorial_multiply -> ok +Test: code_verilog_tutorial_fsm_full -> ok Test: code_verilog_tutorial_mux_21 -> ok Test: code_verilog_tutorial_n_out_primitive -> ok Test: code_verilog_tutorial_parallel_if -> ok -Test: code_verilog_tutorial_simple_function -> ok Test: code_verilog_tutorial_parity -> ok +Test: code_verilog_tutorial_simple_function -> ok Test: code_verilog_tutorial_simple_if -> ok Test: code_verilog_tutorial_task_global -> ok Test: code_verilog_tutorial_v2k_reg -> ok +Test: code_hdl_models_cam -> ok Test: code_verilog_tutorial_tri_buf -> ok Test: code_verilog_tutorial_which_clock -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/asicworld' @@ -16677,34 +16721,31 @@ cd tests/fsm && bash run-test.sh "" generating tests.. -PRNG seed: 202873736 +PRNG seed: 2005318974 running tests.. make[3]: Entering directory '/build/yosys-0.23/tests/fsm' -[0][1][2]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +[0][1][2][3]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[4]K[5]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[3]K[4]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[6]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[5]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[7]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[6]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[8]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[7]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[9]K[10]K[11]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[8]K[9]K[10]K[11]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[12]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: @@ -16716,102 +16757,83 @@ K[14]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[15]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[15]K[16]K[17]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[16]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[17]K[18]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[19]K[20]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[21]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[18]K[19]K[20]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[22]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[23]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[21]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[24]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[22]K[23]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[25]K[26]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[24]K[25]K[26]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[27]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[28]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[28]K[29]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[29]K[30]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +T[30]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[31]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[32]K[33]K[34]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: - Users of state reg look like FSM recoding might result in larger circuit. - Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[35]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[32]K[33]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[36]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[34]K[35]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[37]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[38]K[39]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[36]K[37]K[38]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[40]K[41]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[39]T[40]K[41]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[42]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[42]K[43]K[44]K[45]K[46]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[43]K[44]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +K[47]K[48]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[45]K[46]K[47]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: +Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! -K[48]K[49]KKT +K[49]KKKK make[3]: Leaving directory '/build/yosys-0.23/tests/fsm' cd tests/techmap && bash run-test.sh make[3]: Entering directory '/build/yosys-0.23/tests/techmap' Warning: wire '\Q' is assigned in a block at < ok Test: firrtl_938 -> ok -Test: amber23_sram_byte_en -> ok Test: no_implicit_en -> ok +Test: amber23_sram_byte_en -> ok Test: issue00710 -> ok Test: issue00335 -> ok +Test: shared_ports -> ok Test: read_arst -> ok Test: read_two_mux -> ok -Test: shared_ports -> ok Test: simple_sram_byte_en -> ok Test: trans_addr_enable -> ok Test: trans_sdp -> ok -Test: trans_sp -> ok Test: wide_all -> ok +Test: trans_sp -> ok Test: wide_read_async -> ok Test: wide_read_mixed -> ok +Test: wide_read_trans -> ok Test: wide_read_sync -> ok Test: wide_thru_priority -> ok -Test: wide_read_trans -> ok Test: wide_write -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/memories' Testing expectations for amber23_sram_byte_en.v .. ok. @@ -17078,50 +17101,50 @@ Test: t_async_small_block -> ok Test: t_sync_big -> ok Test: t_sync_big_sdp -> ok -Test: t_async_big -> ok Test: t_sync_small -> ok Test: t_sync_small_block -> ok Test: t_sync_small_block_attr -> ok Test: t_tdp -> ok Test: t_sync_2clk -> ok Test: t_sync_shared -> ok -Test: t_sync_big_lut -> ok +Test: t_sync_2clk_shared -> ok Test: t_sync_trans_old_old -> ok Test: t_sync_trans_old_new -> ok -Test: t_sync_2clk_shared -> ok Test: t_sync_trans_old_none -> ok Test: t_sync_trans_new_old -> ok +Test: t_async_big -> ok Test: t_sync_trans_new_new -> ok Test: t_sync_trans_new_none -> ok Test: t_sp_nc_none -> ok Test: t_sp_new_none -> ok -Test: t_sp_nc_nc -> ok Test: t_sp_old_none -> ok +Test: t_sp_nc_nc -> ok +Test: t_sync_big_lut -> ok Test: t_sp_new_nc -> ok Test: t_sp_old_nc -> ok Test: t_sp_nc_new -> ok Test: t_sp_new_new -> ok -Test: t_sp_old_new -> ok Test: t_sp_nc_old -> ok +Test: t_sp_old_new -> ok Test: t_sp_new_old -> ok Test: t_sp_old_old -> ok Test: t_sp_nc_new_only -> ok Test: t_sp_new_new_only -> ok -Test: t_sp_old_new_only -> ok Test: t_sp_nc_new_only_be -> ok +Test: t_sp_old_new_only -> ok Test: t_sp_new_new_only_be -> ok -Test: t_sp_old_new_only_be -> ok Test: t_sp_nc_new_be -> ok +Test: t_sp_old_new_only_be -> ok Test: t_sp_new_new_be -> ok -Test: t_sp_old_new_be -> ok Test: t_sp_nc_old_be -> ok Test: t_sp_new_old_be -> ok +Test: t_sp_old_new_be -> ok Test: t_sp_old_old_be -> ok Test: t_sp_nc_nc_be -> ok Test: t_sp_new_nc_be -> ok Test: t_sp_nc_auto -> ok -Test: t_sp_old_nc_be -> ok Test: t_sp_new_auto -> ok +Test: t_sp_old_nc_be -> ok Test: t_sp_old_auto -> ok Test: t_sp_nc_auto_be -> ok Test: t_sp_new_auto_be -> ok @@ -17131,17 +17154,16 @@ Test: t_sp_init_x_x_ce -> ok Test: t_sp_init_0_x -> ok Test: t_sp_init_0_x_re -> ok -Test: t_async_big_block -> ok Test: t_sp_init_0_0 -> ok Test: t_sp_init_0_0_re -> ok -Test: t_sp_init_0_any_re -> ok Test: t_sp_init_0_any -> ok +Test: t_sp_init_0_any_re -> ok Test: t_sp_init_v_x -> ok -Test: t_sp_init_v_0 -> ok Test: t_sp_init_v_x_re -> ok +Test: t_sp_init_v_0 -> ok Test: t_sp_init_v_0_re -> ok -Test: t_sp_init_v_any_re -> ok Test: t_sp_init_v_any -> ok +Test: t_sp_init_v_any_re -> ok Test: t_sp_arst_x_x -> ok Test: t_sp_arst_x_x_re -> ok Test: t_sp_arst_0_x -> ok @@ -17168,6 +17190,7 @@ Test: t_sp_arst_e_any_re -> ok Test: t_sp_arst_e_init -> ok Test: t_sp_arst_e_init_re -> ok +Test: t_async_big_block -> ok Test: t_sp_arst_n_x -> ok Test: t_sp_arst_n_x_re -> ok Test: t_sp_arst_n_0 -> ok @@ -17186,11 +17209,11 @@ Test: t_sp_srst_0_any_re -> ok Test: t_sp_srst_0_init -> ok Test: t_sp_srst_0_init_re -> ok -Test: t_sp_srst_v_x_re -> ok Test: t_sp_srst_v_x -> ok +Test: t_sp_srst_v_x_re -> ok Test: t_sp_srst_v_0 -> ok -Test: t_sp_srst_v_any -> ok Test: t_sp_srst_v_0_re -> ok +Test: t_sp_srst_v_any -> ok Test: t_sp_srst_v_any_re -> ok Test: t_sp_srst_v_any_re_gated -> ok Test: t_sp_srst_v_any_ce -> ok @@ -17198,14 +17221,14 @@ Test: t_sp_srst_v_init -> ok Test: t_sp_srst_v_init_re -> ok Test: t_sp_srst_e_x -> ok -Test: t_sp_srst_e_0 -> ok Test: t_sp_srst_e_x_re -> ok +Test: t_sp_srst_e_0 -> ok Test: t_sp_srst_e_0_re -> ok Test: t_sp_srst_e_any -> ok Test: t_sp_srst_e_any_re -> ok Test: t_sp_srst_e_init -> ok -Test: t_sp_srst_e_init_re -> ok Test: t_sp_srst_n_x -> ok +Test: t_sp_srst_e_init_re -> ok Test: t_sp_srst_n_x_re -> ok Test: t_sp_srst_n_0 -> ok Test: t_sp_srst_n_0_re -> ok @@ -17232,17 +17255,17 @@ Test: t_wide_sdp_a6r2w0b0x0 -> ok Test: t_wide_sdp_a6r3w0b0x0 -> ok Test: t_wide_sdp_a6r4w0b0x0 -> ok -Test: t_wide_sdp_a6r5w0b0x0 -> ok Test: t_wide_sdp_a6r0w1b0x0 -> ok Test: t_wide_sdp_a6r0w1b1x0 -> ok -Test: t_wide_sdp_a6r0w2b2x0 -> ok +Test: t_wide_sdp_a6r5w0b0x0 -> ok Test: t_wide_sdp_a6r0w2b0x0 -> ok +Test: t_wide_sdp_a6r0w2b2x0 -> ok Test: t_wide_sdp_a6r0w3b2x0 -> ok Test: t_wide_sdp_a6r0w4b2x0 -> ok Test: t_wide_sdp_a7r0w0b0x0 -> ok -Test: t_wide_sdp_a6r0w5b2x0 -> ok Test: t_wide_sdp_a7r1w0b0x0 -> ok Test: t_wide_sdp_a7r2w0b0x0 -> ok +Test: t_wide_sdp_a6r0w5b2x0 -> ok Test: t_wide_sdp_a7r3w0b0x0 -> ok Test: t_wide_sdp_a7r4w0b0x0 -> ok Test: t_wide_sdp_a7r0w1b0x0 -> ok @@ -17251,39 +17274,39 @@ Test: t_wide_sdp_a7r0w2b0x0 -> ok Test: t_wide_sdp_a7r0w2b2x0 -> ok Test: t_wide_sdp_a7r0w3b2x0 -> ok -Test: t_wide_sp_mix_a6r1w1b1 -> ok Test: t_wide_sdp_a7r0w4b2x0 -> ok -Test: t_wide_sdp_a7r0w5b2x0 -> ok +Test: t_wide_sp_mix_a6r1w1b1 -> ok Test: t_wide_sp_mix_a7r1w1b1 -> ok +Test: t_wide_sdp_a7r0w5b2x0 -> ok Test: t_wide_sp_mix_a8r1w1b1 -> ok Test: t_wide_sp_mix_a6r0w0b0 -> ok Test: t_wide_sp_mix_a6r1w0b0 -> ok Test: t_wide_sp_mix_a6r2w0b0 -> ok Test: t_wide_sp_mix_a6r3w0b0 -> ok Test: t_wide_sp_mix_a6r4w0b0 -> ok -Test: t_wide_sp_mix_a6r5w0b0 -> ok Test: t_wide_sp_mix_a6r0w1b0 -> ok Test: t_wide_sp_mix_a6r0w1b1 -> ok +Test: t_wide_sp_mix_a6r5w0b0 -> ok Test: t_wide_sp_mix_a6r0w2b0 -> ok Test: t_wide_sp_mix_a6r0w2b2 -> ok Test: t_wide_sp_mix_a6r0w3b2 -> ok -Test: t_wide_sp_mix_a7r0w0b0 -> ok Test: t_wide_sp_mix_a6r0w4b2 -> ok -Test: t_wide_sp_mix_a6r0w5b2 -> ok +Test: t_wide_sp_mix_a7r0w0b0 -> ok Test: t_wide_sp_mix_a7r1w0b0 -> ok +Test: t_wide_sp_mix_a6r0w5b2 -> ok Test: t_wide_sp_mix_a7r2w0b0 -> ok Test: t_wide_sp_mix_a7r3w0b0 -> ok Test: t_wide_sp_mix_a7r4w0b0 -> ok -Test: t_wide_sp_mix_a7r5w0b0 -> ok Test: t_wide_sp_mix_a7r0w1b0 -> ok +Test: t_wide_sp_mix_a7r5w0b0 -> ok Test: t_wide_sp_mix_a7r0w1b1 -> ok Test: t_wide_sp_mix_a7r0w2b0 -> ok Test: t_wide_sp_mix_a7r0w2b2 -> ok Test: t_wide_sp_mix_a7r0w3b2 -> ok Test: t_wide_sp_mix_a7r0w4b2 -> ok Test: t_wide_sp_tied_a6r1w1b1 -> ok -Test: t_wide_sp_mix_a7r0w5b2 -> ok Test: t_wide_sp_tied_a7r1w1b1 -> ok +Test: t_wide_sp_mix_a7r0w5b2 -> ok Test: t_wide_sp_tied_a8r1w1b1 -> ok Test: t_wide_sp_tied_a6r0w0b0 -> ok Test: t_wide_sp_tied_a6r1w0b0 -> ok @@ -17291,8 +17314,8 @@ Test: t_wide_sp_tied_a6r3w0b0 -> ok Test: t_wide_sp_tied_a6r4w0b0 -> ok Test: t_wide_sp_tied_a6r0w1b0 -> ok -Test: t_wide_sp_tied_a6r5w0b0 -> ok Test: t_wide_sp_tied_a6r0w1b1 -> ok +Test: t_wide_sp_tied_a6r5w0b0 -> ok Test: t_wide_sp_tied_a6r0w2b0 -> ok Test: t_wide_sp_tied_a6r0w2b2 -> ok Test: t_wide_sp_tied_a6r0w3b2 -> ok @@ -17303,21 +17326,21 @@ Test: t_wide_sp_tied_a7r2w0b0 -> ok Test: t_wide_sp_tied_a7r3w0b0 -> ok Test: t_wide_sp_tied_a7r4w0b0 -> ok -Test: t_wide_sp_tied_a7r5w0b0 -> ok Test: t_wide_sp_tied_a7r0w1b0 -> ok Test: t_wide_sp_tied_a7r0w1b1 -> ok +Test: t_wide_sp_tied_a7r5w0b0 -> ok Test: t_wide_sp_tied_a7r0w2b0 -> ok Test: t_wide_sp_tied_a7r0w2b2 -> ok Test: t_wide_sp_tied_a7r0w3b2 -> ok -Test: t_wide_read_a6r1w1b1 -> ok Test: t_wide_sp_tied_a7r0w4b2 -> ok -Test: t_wide_sp_tied_a7r0w5b2 -> ok +Test: t_wide_read_a6r1w1b1 -> ok Test: t_wide_write_a6r1w1b1 -> ok Test: t_wide_read_a7r1w1b1 -> ok +Test: t_wide_sp_tied_a7r0w5b2 -> ok Test: t_wide_write_a7r1w1b1 -> ok Test: t_wide_read_a8r1w1b1 -> ok -Test: t_wide_write_a8r1w1b1 -> ok Test: t_wide_read_a6r0w0b0 -> ok +Test: t_wide_write_a8r1w1b1 -> ok Test: t_wide_write_a6r0w0b0 -> ok Test: t_wide_read_a6r1w0b0 -> ok Test: t_wide_write_a6r1w0b0 -> ok @@ -17328,23 +17351,23 @@ Test: t_wide_read_a6r4w0b0 -> ok Test: t_wide_write_a6r4w0b0 -> ok Test: t_wide_read_a6r5w0b0 -> ok -Test: t_wide_write_a6r5w0b0 -> ok Test: t_wide_read_a6r0w1b0 -> ok Test: t_wide_write_a6r0w1b0 -> ok Test: t_wide_read_a6r0w1b1 -> ok Test: t_wide_write_a6r0w1b1 -> ok +Test: t_wide_write_a6r5w0b0 -> ok Test: t_wide_read_a6r0w2b0 -> ok Test: t_wide_write_a6r0w2b0 -> ok -Test: t_wide_read_a6r0w2b2 -> ok Test: t_wide_write_a6r0w2b2 -> ok -Test: t_wide_write_a6r0w3b2 -> ok +Test: t_wide_read_a6r0w2b2 -> ok Test: t_wide_read_a6r0w3b2 -> ok -Test: t_wide_read_a6r0w4b2 -> ok +Test: t_wide_write_a6r0w3b2 -> ok Test: t_wide_write_a6r0w4b2 -> ok -Test: t_wide_read_a6r0w5b2 -> ok +Test: t_wide_read_a6r0w4b2 -> ok Test: t_wide_read_a7r0w0b0 -> ok -Test: t_wide_write_a6r0w5b2 -> ok Test: t_wide_write_a7r0w0b0 -> ok +Test: t_wide_write_a6r0w5b2 -> ok +Test: t_wide_read_a6r0w5b2 -> ok Test: t_wide_read_a7r1w0b0 -> ok Test: t_wide_write_a7r1w0b0 -> ok Test: t_wide_read_a7r2w0b0 -> ok @@ -17355,78 +17378,78 @@ Test: t_wide_write_a7r4w0b0 -> ok Test: t_wide_read_a7r5w0b0 -> ok Test: t_wide_read_a7r0w1b0 -> ok -Test: t_wide_write_a7r5w0b0 -> ok Test: t_wide_write_a7r0w1b0 -> ok Test: t_wide_read_a7r0w1b1 -> ok +Test: t_wide_write_a7r5w0b0 -> ok Test: t_wide_write_a7r0w1b1 -> ok Test: t_wide_read_a7r0w2b0 -> ok -Test: t_wide_write_a7r0w2b0 -> ok Test: t_wide_read_a7r0w2b2 -> ok +Test: t_wide_write_a7r0w2b0 -> ok Test: t_wide_write_a7r0w2b2 -> ok Test: t_wide_read_a7r0w3b2 -> ok Test: t_wide_write_a7r0w3b2 -> ok -Test: t_wide_read_a7r0w4b2 -> ok Test: t_wide_write_a7r0w4b2 -> ok -Test: t_wide_read_a7r0w5b2 -> ok +Test: t_wide_read_a7r0w4b2 -> ok Test: t_wide_write_a7r0w5b2 -> ok +Test: t_wide_read_a7r0w5b2 -> ok make[3]: Leaving directory '/build/yosys-0.23/tests/memlib' cd tests/bram && bash run-test.sh "" generating tests.. -PRNG seed: 155032 +PRNG seed: 980632 running tests.. make[3]: Entering directory '/build/yosys-0.23/tests/bram' ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 00_02. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 00_01. +Passed memory_bram test 00_04. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 00_04. +Passed memory_bram test 00_01. +Passed memory_bram test 00_02. +Passed memory_bram test 00_03. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 01_00. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 01_02. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. +Passed memory_bram test 01_02. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 00_03. +Passed memory_bram test 01_00. +Passed memory_bram test 01_03. Passed memory_bram test 01_04. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 01_03. Passed memory_bram test 02_00. -Passed memory_bram test 02_01. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 02_04. +Passed memory_bram test 02_01. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. +Passed memory_bram test 02_03. +Passed memory_bram test 02_04. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. Passed memory_bram test 03_00. -Passed memory_bram test 03_01. +Passed memory_bram test 03_02. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 02_03. +Passed memory_bram test 03_04. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. -Passed memory_bram test 03_02. -Passed memory_bram test 03_04. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. +Passed memory_bram test 04_02. Passed memory_bram test 04_00. Passed memory_bram test 04_01. ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. @@ -17434,14 +17457,14 @@ ../../techlibs/common/simlib.v:1373: warning: Port 1 (A) of $bmux expects 1 bits, got 32. ../../techlibs/common/simlib.v:1373: : Pruning (signed) 31 high bits of the expression. Passed memory_bram test 04_03. -Passed memory_bram test 04_02. +Passed memory_bram test 03_01. make[3]: Leaving directory '/build/yosys-0.23/tests/bram' cd tests/various && bash run-test.sh make[3]: Entering directory '/build/yosys-0.23/tests/various' Passed attrib05_port_conn.ys +Passed attrib07_func_call.ys Passed aiger_dff.ys Passed autoname.ys -Passed attrib07_func_call.ys Passed blackbox_wb.ys Passed bug1496.ys Passed bug1614.ys @@ -17452,16 +17475,15 @@ Passed bug1745.ys Passed bug1781.ys Passed bug1876.ys -Warning: Wire abc9_test027.$abc$91$o is used but has no driver. -Passed bug2014.ys Passed bug3462.ys -Passed bug1531.ys +Passed bug2014.ys +Warning: Wire abc9_test027.$abc$91$o is used but has no driver. Passed const_arg_loop.ys +Passed bug1531.ys Passed const_func_block_var.ys < ok -Test ../../techlibs/intel/cycloneiv/cells_sim.v -> ok Test ../../techlibs/intel/cycloneive/cells_sim.v -> ok +Test ../../techlibs/intel/cycloneiv/cells_sim.v -> ok +Test ../../techlibs/intel/cyclone10lp/cells_sim.v -> ok Test ../../techlibs/intel/max10/cells_sim.v -> ok Test ../../techlibs/intel_alm/cyclonev/cells_sim.v -> ok Test ../../techlibs/machxo2/cells_sim.v -> ok @@ -18047,23 +18070,22 @@ Warning: Resizing cell port SSCounter6o.lien.I0 from 32 bits to 1 bits. Warning: Resizing cell port SSCounter6o.lien.I1 from 32 bits to 1 bits. Passed add_sub.ys -Passed bug1597.ys -Passed bug1626.ys Passed bug1598.ys +Passed bug1597.ys Passed bug2061.ys -Passed adffs.ys +Passed bug1626.ys Passed counter.ys Passed dffs.ys -Passed fsm.ys +Passed adffs.ys Passed ice40_dsp.ys -Passed ice40_opt.ys +Passed fsm.ys Passed ice40_wrapcarry.ys -Passed latches.ys +Passed ice40_opt.ys Passed logic.ys -Passed dpram.ys +Passed latches.ys Passed macc.ys +Passed dpram.ys Passed mul.ys -Passed bug1644.ys Warning: wire '\data' is assigned in a block at rom.v:10.5-10.15. Warning: wire '\data' is assigned in a block at rom.v:11.5-11.15. Warning: wire '\data' is assigned in a block at rom.v:12.5-12.15. @@ -18075,30 +18097,33 @@ Passed shifter.ys Passed tribuf.ys Passed mux.ys +Passed bug1644.ys Passed memories.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/ice40' cd tests/arch/xilinx && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/xilinx' -Warning: Shift register inference not yet supported for family xc3s. -Passed add_sub.ys Warning: Resizing cell port block_ram.memory.0.0.DIADI from 64 bits to 16 bits. Warning: Resizing cell port block_ram.memory.0.0.DOADO from 64 bits to 16 bits. Warning: Resizing cell port block_ram.memory.0.0.DOBDO from 64 bits to 16 bits. Warning: Resizing cell port block_ram.memory.0.0.DOPADOP from 8 bits to 2 bits. Warning: Resizing cell port block_ram.memory.0.0.DOPBDOP from 8 bits to 2 bits. Warning: Resizing cell port block_ram.memory.0.0.WEA from 4 bits to 2 bits. -Warning: Whitebox '$paramod\FDRE\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. -Warning: Whitebox 'FDSE' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. -Warning: Whitebox '$paramod\FDRE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. -Warning: Whitebox '$paramod\FDSE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. -Passed adffs.ys +Warning: Shift register inference not yet supported for family xc3s. +Passed add_sub.ys Warning: Resizing cell port sync_ram_sdp.memory.0.0.DIADI from 64 bits to 16 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOADO from 64 bits to 16 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOBDO from 64 bits to 16 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOPADOP from 8 bits to 2 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOPBDOP from 8 bits to 2 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.WEA from 4 bits to 2 bits. +Warning: Whitebox '$paramod\FDRE\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. +Warning: Whitebox 'FDSE' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. +Warning: Whitebox '$paramod\FDRE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. +Warning: Whitebox '$paramod\FDSE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DIPADIP from 8 bits to 2 bits. +Passed adffs.ys +Passed bug1460.ys +Passed bug1462.ys Warning: Resizing cell port distributed_ram_manual.memory.0.0.DIADI from 64 bits to 16 bits. Warning: Resizing cell port distributed_ram_manual.memory.0.0.DOADO from 64 bits to 16 bits. Warning: Resizing cell port distributed_ram_manual.memory.0.0.DOBDO from 64 bits to 16 bits. @@ -18106,77 +18131,74 @@ Warning: Resizing cell port distributed_ram_manual.memory.0.0.DOPBDOP from 8 bits to 2 bits. Warning: Resizing cell port distributed_ram_manual.memory.0.0.WEA from 4 bits to 2 bits. Passed attributes_test.ys -Passed abc9_dff.ys -Passed bug1460.ys -Passed bug1462.ys Passed bug1480.ys +Warning: Wire top.\t is used but has no driver. +Warning: Wire top.\in is used but has no driver. +Passed bug1598.ys +Passed bug1605.ys Warning: Resizing cell port sync_ram_sdp.memory.0.0.DIADI from 64 bits to 32 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DIPADIP from 8 bits to 4 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOADO from 64 bits to 32 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOBDO from 64 bits to 32 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOPADOP from 8 bits to 4 bits. Warning: Resizing cell port sync_ram_sdp.memory.0.0.DOPBDOP from 8 bits to 4 bits. -Warning: Wire top.\t is used but has no driver. -Warning: Wire top.\in is used but has no driver. -Passed bug1598.ys -Passed bug1605.ys Passed counter.ys +Passed abc9_dff.ys Passed dsp_abc9.ys -Passed dffs.ys -Passed dsp_fastfir.ys -Passed blockram.ys /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:220: Warning: Range [1:0] select out of bounds on signal `\PORT_W_WR_EN': Setting 1 MSB bits to undef. /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:221: Warning: Range select [3:2] out of bounds on signal `\PORT_W_WR_EN': Setting all 2 result bits to undef. +Passed dffs.ys +Passed dsp_fastfir.ys Warning: Shift register inference not yet supported for family xc3se. Passed dsp_simd.ys Passed fsm.ys +Passed blockram.ys Passed logic.ys Passed latches.ys Passed macc.ys +Warning: Replacing memory \M with list of registers. See mul_unsigned.v:25 /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:220: Warning: Range [1:0] select out of bounds on signal `\PORT_W_WR_EN': Setting 1 MSB bits to undef. /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:221: Warning: Range select [3:2] out of bounds on signal `\PORT_W_WR_EN': Setting all 2 result bits to undef. Passed mul.ys -Warning: Replacing memory \M with list of registers. See mul_unsigned.v:25 /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:220: Warning: Range [1:0] select out of bounds on signal `\PORT_W_WR_EN': Setting 1 MSB bits to undef. /build/yosys-0.23/share/xilinx/brams_xc3sda_map.v:221: Warning: Range select [3:2] out of bounds on signal `\PORT_W_WR_EN': Setting all 2 result bits to undef. -Warning: Shift register inference not yet supported for family xc3s. Passed mul_unsigned.ys -Passed dsp_cascade.ys Warning: Shift register inference not yet supported for family xc3se. -Passed lutram.ys -Passed nosrl.ys +Passed mux.ys +Warning: Shift register inference not yet supported for family xc3s. Passed mux_lut4.ys Passed opt_lut_ins.ys +Passed dsp_cascade.ys +Passed lutram.ys +Passed nosrl.ys Passed shifter.ys -Passed mux.ys -Passed tribuf.ys Passed xilinx_dsp.ys Passed xilinx_srl.ys +Passed tribuf.ys Passed xilinx_dffopt.ys Passed pmgen_xilinx_srl.ys -Passed tribuf.sh Passed macc.sh +Passed tribuf.sh make[3]: Leaving directory '/build/yosys-0.23/tests/arch/xilinx' cd tests/arch/ecp5 && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/ecp5' Passed add_sub.ys +Passed bug1598.ys Passed bug1459.ys Passed bug1630.ys -Passed bug1598.ys -Passed bug2409.ys Warning: Whitebox '$paramod\TRELLIS_FF\REGSET=t24'010100110100010101010100' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Passed bug2731.ys +Passed bug2409.ys Passed counter.ys Passed adffs.ys -Passed dffs.ys Passed fsm.ys -Passed dpram.ys +Passed dffs.ys Passed latches_abc9.ys Passed logic.ys -Passed latches.ys +Passed dpram.ys Passed macc.ys +Passed latches.ys Passed mul.ys -Passed mux.ys Passed opt_lut_ins.ys Warning: wire '\data' is assigned in a block at rom.v:9.5-9.15. Warning: wire '\data' is assigned in a block at rom.v:10.5-10.15. @@ -18187,17 +18209,18 @@ Warning: wire '\data' is assigned in a block at rom.v:15.11-15.21. Passed rom.ys Passed shifter.ys -Passed lutram.ys Passed tribuf.ys +Passed mux.ys +Passed lutram.ys Passed memories.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/ecp5' cd tests/arch/machxo2 && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/machxo2' -Passed add_sub.ys Passed logic.ys +Passed add_sub.ys Passed dffs.ys -Passed fsm.ys Passed shifter.ys +Passed fsm.ys Passed tribuf.ys Passed mux.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/machxo2' @@ -18208,9 +18231,9 @@ Passed dffs.ys Passed adffs.ys Passed logic.ys -Passed fsm.ys Passed lutram.ys Passed shifter.ys +Passed fsm.ys Passed latches.ys Passed tribuf.ys Passed mux.ys @@ -18226,22 +18249,22 @@ Passed lutram.ys Passed shifter.ys Passed tribuf.ys -Passed blockram.ys Passed mux.ys +Passed blockram.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/anlogic' cd tests/arch/gowin && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/gowin' Passed add_sub.ys Passed counter.ys -Passed dffs.ys -Passed fsm.ys ERROR: FF myDFFP.$auto$ff.cc:266:slice$662 (type $_DFF_PP1_) cannot be legalized: unsupported initial value and async reset value combination Expected error pattern 'unsupported initial value and async reset value combination' found !!! Passed init-error.ys -Passed adffs.ys +Passed dffs.ys +Passed fsm.ys Passed logic.ys -Passed init.ys +Passed adffs.ys Passed shifter.ys +Passed init.ys Passed tribuf.ys Passed mux.ys Passed lutram.ys @@ -18251,30 +18274,30 @@ Passed blockram.ys Passed add_sub.ys Passed counter.ys +Passed logic.ys Passed dffs.ys Passed adffs.ys -Passed logic.ys Passed fsm.ys -Passed mul.ys Passed quartus_ice.ys +Passed mul.ys Passed shifter.ys -Passed mux.ys Passed tribuf.ys +Passed mux.ys Passed lutram.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/intel_alm' cd tests/arch/nexus && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/nexus' +Passed counter.ys Passed blockram.ys Passed add_sub.ys -Passed counter.ys Passed dffs.ys +Passed logic.ys Passed fsm.ys Passed adffs.ys -Passed logic.ys -Passed lutram.ys Passed shifter.ys -Passed mul.ys Passed tribuf.ys +Passed lutram.ys +Passed mul.ys Passed mux.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/nexus' cd tests/arch/quicklogic && bash run-test.sh "" @@ -18282,6 +18305,8 @@ Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. +Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. +Warning: Complex async reset for dff `\Q'. Warning: Complex async reset for dff `\Q'. Warning: Complex async reset for dff `\Q'. Warning: Complex async reset for dff `\Q'. @@ -18294,34 +18319,32 @@ Passed dffs.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. -Passed fsm.ys -Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. -Warning: Complex async reset for dff `\Q'. -Passed adffs.ys +Passed logic.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. -Passed logic.ys +Passed fsm.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed latches.ys +Passed adffs.ys Passed tribuf.ys Passed mux.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/quicklogic' cd tests/arch/gatemate && bash run-test.sh "" make[3]: Entering directory '/build/yosys-0.23/tests/arch/gatemate' -Passed add_sub.ys Passed counter.ys -Passed fsm.ys +Passed add_sub.ys Passed dffs.ys +Passed fsm.ys Passed logic.ys Passed adffs.ys Passed latches.ys -Passed mul.ys -Passed memory.ys -Passed luttrees.ys Passed mux.ys Passed shifter.ys +Passed mul.ys Passed tribuf.ys +Passed memory.ys +Passed luttrees.ys make[3]: Leaving directory '/build/yosys-0.23/tests/arch/gatemate' cd tests/rpc && bash run-test.sh Running exec.ys.. @@ -18343,81 +18366,79 @@ cd tests/verilog && bash run-test.sh make[3]: Entering directory '/build/yosys-0.23/tests/verilog' <